Siemens has entered into an agreement to acquire Austin, Texas-based Austemper Design Systems, a startup software company that offers analysis, auto-correction and simulation technology. This technology allows customers to test and harden IC designs for functional safety in applications such as automotive, industrial and aerospace systems. These are systems where functional safety and high reliability are mandatory for compliance to safety standards like ISO 26262.
ICs in these applications require three types of functional safety verification: for systemic faults, malicious faults and random hardware faults. Mentor’s existing Questa software (shown) is a leading technology for functional verification of systemic faults and provides solutions for verification of malicious faults for IC security. The software technology from Austemper adds state-of-the-art safety analysis, auto-correction and fault simulation technology to address random hardware faults. This is expected to complement Mentor’s existing functional safety offerings including its Tessent product suite and Veloce platform.
Design teams at leading semiconductor and IP companies use Austemper’s innovative technology to analyze the registered-transfer level (RTL) code versions of their designs for faults and vulnerabilities. It can automatically correct and harden vulnerable areas, subsequently performing fault simulation to ensure the design is hardened and no longer susceptible to errors. Moreover, the Austemper technology performs simulation at orders of magnitude faster than competing solutions.
Siemens will integrate Austemper’s technology into Mentor’s IC verification portfolio as part of Siemens’ larger digitalization strategy, leveraging Siemens’ world-wide sales channel to make this functional safety solution available to companies developing digital twins of safety-critical systems at the heart of autonomous vehicles, smart cities and industrial equipment in Factory 4.0.
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