Alliance Memory recently announced new high-speed CMOS double data rate synchronous DRAMs (DDR SDRAM) with densities of 256 Mb (AS4C32M8D1), 512 Mb (AS4C64M8D1), and 1 Gb (AS4C64M16D1) in the 60-ball 8-mm × 13-mm × 1.2 mm TFBGA package and the 66-pin TSOP II package with a 0.65-mm pin pitch. The devices provide reliable drop-in, pin-for-pin-compatible replacements for a number of similar solutions in industrial, medical, communications, and telecommunications products requiring high memory bandwidth. They are particularly well-suited to high performance in PC applications.
The AS4C32M8D1, AS4C64M8D1, and AS4C64M16D1 are internally configured as four banks of 32M word × 8 bits, 64M word × 8 bits, and 64M word × 16 bits, respectively. The DDR SDRAMs offer a synchronous interface. They operate from a single +2.5-V (±0.2 V) power supply, and they are lead (Pb)- and halogen-free.
The AS4C32M8D1, AS4C64M8D1, and AS4C64M16D1 feature fast clock rates of 200 MHz and 166 MHz. They are offered in commercial (0°C to 70°C) and industrial (–40°C to 85°C) temperature ranges. The DDR SDRAMs provide programmable read or write burst lengths of 2, 4, or 8. An automatic pre-charge function provides a self-timed row pre-charge initiated at the end of the burst sequence. Easy-to-use refresh functions include auto- or self-refresh, while a programmable mode register allows the system to choose the most suitable modes to maximize performance.
With the addition of the AS4C32M8D1, AS4C64M8D1, and AS4C64M16D1 to its portfolio, Alliance Memory now offers the most extensive lineup of DDR SDRAMs in the industry, featuring densities of 64 Mb, 128 Mb, 256 Mb, 512 Mb, and 1 Gb. For Alliance Memory’s customers, the devices eliminate costly redesigns by providing long-term support for end-of-life (EOL) components. In addition, the company doesn’t perform die shrinks, which frees up engineering resources.
Samples and production quantities are available with lead times of six to eight weeks for large orders. Pricing for US delivery starts at $1 per piece.
Source: Alliance Memory
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