NXP Semiconductors has announced a new family of high-performance safe microprocessors to control vehicle dynamics in next-generation electric and autonomous vehicles. The new NXP S32S microprocessors will manage the systems that accelerate, brake and steer vehicles safely, whether under the direct control of a driver or an autonomous vehicle’s control.
NXP is addressing the needs of carmakers developing future autonomous and hybrid electric vehicles with newly available 800 MHz MCU/MPUs. The first of the new S32 product lines, the S32S microprocessor offers the highest performance ASIL D capability available today, according to NXP.
The NXP S32S processors use an array of the new Arm Cortex-R52 cores, which integrate the highest level of safety features of any Arm processor. The array offers four fully independent ASIL D capable processing paths to support parallel safe computing. In addition, the S32S architecture supports a new “fail availability” capability allowing the device to continue to operate after detecting and isolating a failure—a critical capability for future autonomous applications.
NXP has partnered with OpenSynergy to develop a fully featured, real-time hypervisor supporting the NXP S32S products. OpenSynergy’s COQOS Micro SDK is one of the first hypervisor platforms that takes advantage of the Arm Cortex-R52’s special hardware features. It enables the integration of multiple real-time operating systems onto microcontrollers requiring high levels of safety (up to ISO26262 ASIL D). Multiple vendor independent OS/stacks can also run on a single microcontroller. COQOS Micro SDK provides secure, safe and fast context switching ahead of today’s software-only solutions in traditional microcontrollers.
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