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Floating-Point Library is Optimized RISC-V CPUs

SEGGER Microcontroller has announced that its stand-alone
Floating-Point Library is now extended by an assembly-optimized variant for
RISC-V. The floating-point library contains the complete set of arithmetic
functions, hand coded and fully optimized in assembly language for RISC-V. The
complete set of high-level mathematical functions is written in C, and uses
advanced algorithms to maximize performance. All functionality is fully
verified, for both single and double precision operations.

The RISC-V variant, like the variant for Arm, is
optimized for both high speed and small code size. The balance between size and
speed can be configured at library build time. The SEGGER Floating-Point
Library for RISC-V is much smaller than equivalent open-source libraries while
achieving up to 100 times the performance on some operations. SEGGER’s
Floating-Point Library is also a part of the SEGGER Runtime Library and already
included in Embedded Studio.

SEGGER Runtime Library webpage:

For more information on the SEGGER Floating-Point Library

For performance data see

Download Embedded Studio (Windows, Linux and macOS):

SEGGER Microcontroller |

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Floating-Point Library is Optimized RISC-V CPUs

by Circuit Cellar Staff time to read: 1 min