Low Latency 48-Port FPGA Networking Appliance

BittWare and LDA Technologies are collaborating on a low-latency 48-port FPGA networking appliance. The LDA e4 is a 10/25-Gbps-capable FPGA board enclosure that repurposes the serial links on BittWare’s PCIe FPGA boards into high-speed Ethernet ports.

Features, benefits, and specs:

  • 6″ FPGA-to-port trace lengths
  • Layer 1 replication, support for various CPUs and operating systems
  • A high-accuracy clock source enables accurate timestamping
  • Enables out-of-band management and a zero configuration option

Source: BittWare

FPGA Board Support Packages Simplify App Dev

BittWare recently announced the availability of Arria 10 FPGA Board Support Packages (BSPs) for Altera’s OpenCL SDK 16.0.2. With BittWare’s OpenCL BSPs, you can start developing applications for Altera’s Arria 10 1150GX FPGA using OpenCL.

Using OpenCL, you can code your systems and algorithms in a high-level C-based framework and directly create FPGA programming files from a pure software development flow. The applications are endless, from use in data centers to defense/aerospace systems.

BittWare ‘s Arria 10 BSPs are well suited for acceleration applications such as machine learning. The High Performance Computing (HPC) BSP is the traditional OpenCL model, using a host that moves data to the accelerator system over PCI Express (PCIe). The BSP platform is the standard platform for OpenCL accelerators. In addition, BittWare can provide custom BSPs specifically tailored to your requirements.

BittWare offers an OpenCL Developer’s Bundle comprising a low-profile Arria 10 1150GX FPGA-based PCIe board, BittWorks Lite II software tools, Altera’s OpenCL SDK, and Altera’s Quartus II. You can also get the Developer’s Bundle with a Stratix V board.

The Arria 10 OpenCL Bundle and BSP are currently available. Contact BittWare for pricing.

Source: BittWare

New FPGA Board Based on the Xilinx UltraScale VU190 Device

BittWare recently released a new COTS PCIe board based on Xilinx’s 20-nm UltraScale VU190 FPGA. The XUSP3R is a 3/4-length PCIe board offers up to four Gen3 x8 PCIe interfaces, along with four front panel QSFP28 cages, supporting 16 lanes of 25 Gbps or 4 lanes of 100 Gbps, including 100 GbE. Four DIMM sockets support massive memory configurations including up to 256 GB of DDR4 memory across four 72-bit wide banks.

Alternatively, each DIMM socket can be populated with BittWare’s dual bank QDR DIMMs, each providing 576 Mb of QDR-II+. An optional Hybrid Memory Cube (HMC) module with up to 4 GB is also available that can be populated in addition to, and independent of, the DIMMs. Together, these features make the XUSP3R well suited for a variety of data center and networking applications, including compute acceleration, network processing, cybersecurity, and storage.

The board also offers features and tools for simplified development and integration. A comprehensive Board Management Controller (BMC) with host software support for advanced system monitoring simplifies platform management. A complete software tool suite and FPGA development/project examples are also available.

The XUSP3R’s features and specs:

  • High-performance Xilinx Virtex UltraScale 190/160/125
  • Up to four independent PCIe Gen3 x8 interfaces
  • Four QSFP28 cages for 4x 100GbE, 16x 25GbE, 4x 40GbE, or 16x 10GbE (or combinations thereof)
  • Four DIMM sites that support DDR4-2133 SDRAM, QDR-IV, and QDR-II+
  • Optional HMC Module (in addition to, and independent of, the DIMM sites)
  • Board Management Controller for Intelligent Platform Management
  • USB 2.0 for programming, debug, or control with optional integrated Platform Cable USB functionality
  • Timestamping and synchronization support
  • Complete software support with BittWare’s BittWorks II Toolkit
  • FPGA development kit for FPGA board support IP and integration

The XUSP3R board is in production and shipping now. Contact BittWare for more details and pricing.

Source: BittWare

New Dev Kit for Xilinx FPGA-Enabled Accelerator Cards

BittWare recently announced upcoming availability of an OpenPOWER CAPI Developer’s Kit for its Xilinx FPGA-enabled accelerator cards. The kit is intended to give you a fast way to connect the Xilinx All Programmable FPGA to a CAPI-enabled IBM POWER8 system.

The kit includes:

  • BittWare XUSP3S FPGA accelerator card, which is a ¾-length PCIe board featuring the Xilinx Virtex UltraScale VU095, four QSFPs for 4× 100 GbE, and flexible memory configurations with up to 64 GB of memory and support for Hybrid Memory Cube (HMC)
  • IBM Power Service Layer (PSL) IP to provide the connection to the POWER8 chip
  • CAPI host support library
  • An example CAPI design

 

BittWare’s OpenPOWER CAPI Developer’s Kit is scheduled to be available in Q2 2016.

Source: BittWare

BittWare Joins OpenPOWER Foundation

BittWare announced that it has joined the OpenPOWER Foundation, which is an open development community based on the POWER microprocessor architecture. The OpenPOWER Foundation makes POWER hardware and software openly available and enables others to license POWER intellectual property. To learn more about OpenPOWER and to view the complete list of current members (e.g., Xilinx, Hitachi, Google, and IBM), go to openpowerfoundation.org.

Source: BittWare

New Arria 10 Boards Target Cyber/Security, SigInt, & Acceleration

BittWare recently announced two new boards in its Altera Arria 10 FPGA product roadmap to complement their existing Arria 10 3U VPX and PCIe offerings: A10PED and A10XM4.

The A10PED Dual Arria 10 PCIe full-length Gen3 x16 Card supporting either the 660 or 1150 KLE size FPGAs (GX), with one supporting an optional SoC (SX) with dual ARM. Primarily targeting signal and network packet processing applications the board provides 28 lanes of serial I/O up to 10.325 Gbps each, with support for high-accuracy time stamping. Featuring 4x 260-pin DDR4 SODIMMs and a Hybrid Memory Cube (HMC), the A10PED will support up to 68 GB of memory with a peak aggregate memory bandwidth of over 175 GB/sec (not including I/O or PCIe). For latency-sensitive applications, some or all of the DDR4 SODIMMs can be replaced with proprietary QDR-II/IV SRAM SODIMMs. These memory options, coupled with full support for Altera’s OpenCL tools, also make this board compelling for acceleration & co-processing applications.

The A10XM4 Arria 10 XMC (VITA 42) Module provides network interface (NIC) and cyber/security capabilities in addition to host/carrier acceleration for applications in radar, EW, networking, and SigInt. In addition, it will support full conduction cooling. Compatible with any standard XMC carrier, the A10XM4 features an Arria 10 GX FPGA with two lanes of 10 GigE, along with up to 16 GB of memory and PCIe Gen3 x8 PCIe to the host. BittWare’s NIC application example and OpenCL BSP will greatly simplify the integration and development of cyber/security additions to and off-loading of standard host applications.

The A10PED full length PCIe board will be available Q4 2015 and the A10XM4 XMC board will be available Q1 2016.  Contact BittWare for configurations, pricing, and details.

Source: BittWare

Low-Profile PCIe Board Platform

BittWare recently announced today its second low-profile PCIe board—the A5-PCIe-S (A5PS). The new board is based on Altera’s Arria V GZ FPGA, which provides a high level of system integration and flexibility for I/O, routing, and processing. Thus, the A5PS is a reliable platform for a variety of applications (e.g., network processing, security, broadcast, and signals intelligence).BittWare A5PS

Featuring dual SFP+ cages that run up to 12.5 Gbps, the A5PS provides dual 10GigE ports using optical transceivers as well as passive copper cabling up to 7 m. These ports are serviced by the advanced 28-nm Arria V GZ FPGA, which also supports a Gen3 x8 PCIe interface and either 8-GB DDR3 or 36-MB QDRII+. Sophisticated time-stamping and synchronization options are supported by dual SMA connectors for interfacing to 1-PPS or 10-MHz reference clocks, in addition to the tunable on-board high accuracy, temperature compensated oscillator (TCXO). A comprehensive Board Management Controller (BMC) with host software support for advanced system monitoring is also provided.

The A5PS features and specifications include:

  • Altera Arria V GZ FPGA
  • PCIe x8 interface supporting Gen1, Gen2, or Gen3
  • Dual SFP+ cages for 2x 10GigE: Support for a wide range of optical transceiver; built-in low-latency active drivers/receivers for passive copper cables up to 7 m
  • Memory options (pick one): DDR3 (single 72-bit bank of up to 8 GBytes DDR3-1600 with ECC); QDRII+ (two 18-bit banks of up to 144 Mb each—288 Mb or 36 MB total)
  • Board Management Controller for Intelligent Platform Management
  • USB 2.0 for programming, debug, or control
  • Timestamping and synchronization support
    • Dual SMA for reference clock/synchronization inputs
    • Tunable high-accuracy TCXO
    • Programmable clock synthesizer (Si5338)
  • Complete software support with BittWare’s BittWorks II Toolkit
  • Broad range of IP offerings
    • 10 GigE MAC
    • TCP/IP Offload Engines (TOE), UDP Offload Engines
    • PTP/IEEE-1588
    • PCIe DMA

The A5PS board currently costs $1,500 in 1000s for the A5PS with the Arria V GZ E1 with no external memory. Contact BittWare for additional configurations, pricing, and details.

Source: BittWare