It’s Easier Than You Think
FPGAs are conquering more and more application areas, which is no wonder given their vast parallel performance, flexibility and scalability. From simple interfacing devices to complete system-on-a-programmable-chip developments with integrated Arm processors and multi-gigabit interfaces: the possibilities of FPGAs are almost unlimited. Using a standard FPGA or SoC module—be it based on an Intel or Xilinx FPGA or SoC—in combination with tested and proven IP cores, your entry into FPGA technology can be quick and easy.
FPGA technology is a viable option for many applications and offers a lot of potential. Yet many view the barriers of entry to be high, dealing with programming that is complex and laborious. But in fact, there’s never better time to employ FPGA technology with ease. By using FPGA and SoC modules together with ready-made logic blocks—so-called Intellectual Property (IP) cores—you can lower time-to-market while minimizing the effort and risk of product-specific development.
The technology-specific complexity of FPGAs can be encapsulated with a powerful standard FPGA- or SoC-modules such as those offered by Enclustra (Figure 1). These even make hardware design much simpler compared to using a conventional microcontroller (MCU) or DSP. The use of an FPGA or SoC module is particularly interesting for small and medium quantities but can also be more than worth considering for high-volume products – not only during prototype development.
Don’t Reinvent the Wheel
FPGA and SoC modules offer many advantages over chip-down designs. The high production quantity of off-the-shelf FPGA or SoC modules reduce their cost and at the same time provides a proven and reliable solution. Because different pin-compatible modules are available in the same form factor, a product can be easily equipped with a more powerful module, for example, even late in the development process. Thanks to the high functional density of the FPGA modules, the complexity of the base board is also reduced, making it faster and less expensive to develop.
Enclustra offers a large portfolio of modules based on Intel and Xilinx FPGAs and SoCs. An example of a standard FPGA SoC module (System on Module, SoM) is the Mercury+ XU9. It combines a Xilinx Zynq UltraScale+ MPSoC device with fast DDR4 ECC SDRAM, eMMC flash, quad SPI flash, dual Gbit Ethernet PHY and dual USB 3.0. All that forms a complete and powerful embedded processing system (Figure 2). This practical embedded processing platform gives users a powerful and ready-to-use system without having to worry about technology-specific details.
The operating systems supported are Linux and VxWorks (Wind River Helix Virtualization Platform). The module is available with both extended and industrial temperature range and is powered by a single 5V-to-15V supply, which further simplifies base board development. The module can even power circuits on the base board, minimizing the need for power converters.
The Mercury+ XU9 offers 20 multi-Gbit transceivers with data rates of up to 15Gbit/s each and a DDR4 memory bandwidth of up to 38.4GB/s. Based on the Xilinx Zynq UltraScale+ MPSoC, it combines 6 Arm cores, a Mali-400MP2 GPU (EV variant), up to 12 GB DDR4 SDRAM, numerous standard interfaces, 192 user I/Os and up to 504’000 LUT4 equivalents.
Enclustra provides a broad design-in support for their products, offering all required hardware, software and support materials. Detailed documentation and reference designs make it easy to get started. Aside from user manual, there are user schematics, 3D-models, PCB footprints and differential I/O length tables. In combination with the Mercury+ PE1-300 or Mercury+ PE1-400 base boards, the Mercury+ XU9 constitutes a powerful development and prototyping platform.
Thanks to the family concept with compatible connectors, different types of modules can be used on the same base board. If, for example, an Arm processor is not required, the Mercury+ KX2 FPGA module can be used on the same base board instead.
Efficient Firmware Design
To shorten time-to-market, it is essential for a company to concentrate on its core competencies and know-how. Besides using a module, IP Cores help to free up engineering capacity to solve the application-specific challenges instead of spending time reimplementing readily available function blocks. Extensively tested and proven IP Cores are available for many application scenarios such as host PC to FPGA communication, drive control, virtual FIFOs or processors (see Sidebar “Get to Market Faster with IP Solutions”).
Cooperation with an FPGA service provider such as Enclustra may also help to further accelerate and smoothen the development process. In this way, the implementation of application-specific FPGA logic can be outsourced, and the service partner at the same time can support the customer with its in-depth know-how in FPGA-based system design and hardware development (Figure 3).
Such cooperation can also be useful if the system is to be maintained and further developed in-house later. Through close cooperation with an FPGA specialist, the company’s own engineers can benefit from a rapid learning curve and become able to professionally develop FPGA-based systems much faster than if they had to start from scratch.
Streaming, made easy: The Enclustra FPGA Manager IP Solution enables simple and efficient data transfer between a host PC and an FPGA via USB 3.0, Gbit Ethernet or PCI Express. The solution includes a host software library (DLL) and an IP core for the FPGA. The user application communicates with the FPGA via a simple API with read/write commands that hide the complexity of the underlying protocol. Both streaming and memory mapped accesses are supported. Figure A shows the architecture of FPGA Manager.
Motion control, in the fast lane: The modular Universal Drive Controller IP Core includes everything needed to control up to eight axes (i.e. motors) at control rates above 200 kHz, from the A/D converter interface to position, velocity and current controllers, position defection via encoder or resolver and control logic for power stages. DC, BLDC and 2- or 3-phase stepper motors are supported. Field-oriented control is available for brushless (BLDC) motors, and microstepping is supported for stepper motors.
Virtual FIFO, the smart way: The Stream Buffer Controller IP Core is optimized for FPGAs and implements a versatile Stream to Memory Mapped DMA bridge with up to 16 independent streams. The IP core allows data buffering in an external memory device to provide virtual FIFO capability with up to 4GB memory size. It provides an AMBA AXI4-Stream interface for each write and read data stream. A common memory-mapped master interface (AXI4 or Avalon) is provided to access the external memory device.
The IP core is highly configurable in terms of operation mode, buffer size and buffer address for each stream. The configuration is done over a memory-mapped slave interface, either by an embedded CPU, an FPGA Manager application or an application-specific stream configurator controller in VHDL.