We often treat op amps as more or less ideal components, especially when we are analyzing circuits. Of course, anyone who has designed an op amp circuit will have come across at least one of the many ways that real-life op amps depart from the ideal.
One of these is the input common-mode range. This is the range of voltages over which the op-amps inputs can operate. If you exceed this range, the op amp stops behaving as it should and your circuit will not work as expected.
Take for example a classic “jellybean” op amp, the LM358. This workhorse has moderate specifications, but it’s cheap and available from multiple suppliers, and therefore it has been designed into countless circuits. With a single 5V supply its common-mode voltage range extends from zero volts (nice) to just 3.3V.
Figure 1, the simplified schematic included in the data sheet shows why. The input stage is a PNP differential pair Q17 and Q21, fed by a current source Q18, Q19 and Q20 from VCC. Between the voltage dropped across the current source and the base-emitter voltages of the differential pair, it’s easy to see that the inputs must be a minimum of 1.7V lower than VCC. With a 3.3V supply, the problem is even worse, with the input common-mode range extending from zero to only 1.3V.
Wouldn’t it be nice if there were op amps that did not have this limitation? Well, there are but they come with quirks of their own as we will see. Take for example another “jellybean” part, the LM7301. This has similarly modest specifications but has an input common mode range at 5V supply of -0.1V to 5.1V, more than covering the supply range.
How do the designers achieve this miracle? The datasheet does not provide a circuit, but it does provide enough clues for us to make an educated guess. Take for example the input bias current. For the LM358 its specified to be typically -45nA, but for the LM7301 its specified as -55nA at a common-mode voltage of 5V and +65nA at a common-mode voltage of 0V. Note the change in sign. What’s going on?
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The data sheet graph for input bias current reproduced in Figure 2. The supply voltage is specified as ±2.5V in this graph, so we need to mentally add 2.5V to the horizontal axis values to come back to zero to 5V supply. You can see that there is a huge transition in bias current when the common mode voltage gets to around 4V (1.5V on the graph).
The designers have included two separate input stages to cover the rail-to-rail input range. A PNP differential pair like the LM358’s works up to a volt or so below the positive rail. An NPN differential pair switches in when the input common mode voltage approaches the upper rail. It’s a clever solution to the common mode problem but introduces a new set of issues.
The transition between input stages impacts the offset voltage as well as the input bias current. This is shown in Figure 3. You can see an abrupt shift in offset voltage at the point the op-amp switches input stages.
The transition anomalies could have a significant impact on your circuit, especially if your source has high impedance. Let’s look at a practical example. With a source resistance of 500kΩ, the input bias current swing of 100nA at the transition would translate to a 50mV step in input voltage. This is enough to ruin your day if you were not expecting it.
In many cases however, this interesting characteristic may not be an issue, in which case the LM7301 is a useful low-cost rail-to-rail input op amp. As always, it pays to read the data sheet very carefully.
References
“LM7301: 32V Rail-to-Rail Input & Output, 4MHz, Single Op-Amp.” Accessed November 20, 2021. https://www.onsemi.com/products/signal-conditioning-control/amplifiers-comparators/operational-amplifiers-op-amps/lm7301.
“LM358 – Low-Power Dual Op-Amps with Low Input Bias Current – STMicroelectronics.” Accessed November 20, 2021. https://www.st.com/en/amplifiers-and-comparators/lm358.html.
Horowitz, Paul, and Winfield Hill. The Art of Electronics. Third edition, 11th printing, with Corrections. Cambridge New York, NY: Cambridge University Press, 2017.
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Andrew Levido (andrew.levido@gmail.com) earned a bachelor’s degree in Electrical Engineering in Sydney, Australia, in 1986. He worked for several years in R&D for power electronics and telecommunication companies before moving into management roles. Andrew has maintained a hands-on interest in electronics, particularly embedded systems, power electronics, and control theory in his free time. Over the years he has written a number of articles for various electronics publications and occasionally provides consulting services as time allows.
