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LTspice

Written by Andrew Levido

One of the key design tools we use in electronic design is circuit simulation. For analog electronics LTspice is the industry standard go-to tool for a number of reasons, not least of which is the price, which is zero. It is provided by Analog Devices (previously Linear Technology after which it is named) and it ships with a huge range of device models for Analog Devices, Linear Technology and Maxim devices. You can easily add models for devices from any manufactured (most provide them).

The “spice” part of the name comes from the original Fortran “Simulator Program with Integrated Circuit Emphasis” released in 1973. LTspice was first released in 1999 and has been regularly updated ever since. It is a very stable and well-proven platform. On the downside, its fair to say the user interface is clunky, and its roots as a text-based application are still evident in many ways.

Its quite a powerful program and the learning curve can be a bit steep, but there is a huge amount of helpful information available to help, including plenty of how-to videos and tutorials. I don’t intend to cover this ground here, but I do want to give a couple of examples of real-life use of LTspice taken from my own experience. You can simulate entire circuits of course, but I find its often more helpful just to simulate certain subsections – especially where a new circuit is concerned, or where its difficult to calculate things mathematically.

The first example is a simple comparison of a standard two-transistor current mirror with a Wilson current mirror with changing compliance voltage. This is relatively easy to calculate but modelling it serves to reinforce the theory and demonstrate that the BJT model is pretty comprehensive.

Both circuits are simulated in Figure 1. Each is configured to have a reference current of about 1mA through R1 and R3 respectively. We expect to see the same current mirrored in the collectors of Q1 and Q5. In both cases the compliance voltage is ramped from 2V to 40V over 10 seconds. The 1Ω resistors R2 and R4 provide a convenient place to measure the mirrored currents.

Figure 1
In this simulation we are comparing the output current a simple two-transistor current mirror (left) with that of a Wilson current mirror (right) as the compliance voltage VIN is varied from 2 to 40 V. In each case the reference current is set to approximately 1mA.

Figure 2 shows the result. The top panel shows that the reference currents are fixed at about 1 mA as we would expect. The lower panel shows the current in the Wilson mirror remains constant with voltage (blue trace), but the current through the simple mirror increases by about 25% over the voltage range.  This is due to the Early effect occurring in Q1. We don’t see this effect in the Wilson mirror because the cascode connected transistor Q5 clamps the VCE of the mirror transistor Q3 to a fixed value.

Figure 2
The result of the simulation in Figure 1 shows the Wilson mirror current (blue trace in the lower pane) remains stable with increasing voltage, but the simple mirror current (green trace) increases. This is despite the reference currents (red and teal traces in the upper pane) remaining stable. This increase is caused the Early effect in Q1. The cascode transistor Q5 in the Wilson mirror clamps Q3s VCE to a fixed value eliminating this undesirable effect.

The second example is a bit more complex. It involves the estimation of the ripple current in the filter capacitors of a 3kW power converter. The 240V single-phase mains is rectified and filtered to produce a DC supply to the converter. This architecture results in significant ripple current in the filter capacitors that must be within the capacitors’ ratings.

Figure 3 shows the circuit being simulated. The load current of the converter is complex, and rather than try to simulate it in LTspice, I have used an independent current source with its value defined by a piecewise linear approximation in an external CSV file. The values in this file were created using a Python script and are just a long list of timesteps and associated current values.

Figure 3
This is the LTspice schematic for estimating the ripple current in the filter capacitors Cf1 and Cf2 for a high power converter. The load is simulated by the independent current source I1 which is driven by piece-wise-linear approximation of the load current contained in an external file.

The results are shown in Figure 4. The green trace shows the current through one of the filter capacitors. You can ignore the spike on the left – this is an inrush current which can be ignored for the purposes of this analysis (but not in real life!). The red trace is the load current which is described in the CSV file.

Figure 4
This is the output of the simulation of Figure 1 showing the ripple current (green trace) and the load current (red trace). We are interested in the rms value of the capacitor current (excluding the start-up transient) as the filter capacitors will need to be rated to this level. The “.MEAS…” commands ask LTspice  to calculate some specified values over a defined time period.

You will also note a few lines beginning “.MEAS …” which allow the calculation of values like the RMS, average or peak-to-peak value of certain parameters within a particular window. The resuls are printed in the log file, a portion of which is shown in Figure 5. Here you can see the capacitor current is about 5.7A rms, the input current is 12.5A and the DC bus has an average voltage of 314V with 64V of peak-to-peak ripple. From memory, this finding resulted in me using a larger number of lower value capacitors in parallel to get the individal capacitor currents down to a reasonable level. Given the complex load current, calculating these values mathematically would be extremely difficult.

Figure 5
This extract from the log file shows the calculated values we have requested with the “.MEAS…” commands in the schematic file of Figure 1. We have asked for the input current rms value, the average and peak-to-peak voltage on the filter capacitors and the rms current through Cf1. This shows we have about 5.7A rms in each capacitor.

Of cousre, you can do a huge amount more than this with LTspice, including frequency response, Monte Carlo analysis , noise analysis and even modelling of temperature effects.  Its pretty easy to add new models provided by device manufatureres or model your own re-usable sub-circuits. If you are not already using this tool, I highly recommend that you take a look at it.

References

“LTspice.” In Wikipedia, March 21, 2023. https://en.wikipedia.org/w/index.php?title=LTspice&oldid=1145908583.

“LTspice Information Center | Analog Devices.” Accessed April 11, 2023. https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html.

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Andrew Levido (andrew.levido@gmail.com) earned a bachelor’s degree in Electrical Engineering in Sydney, Australia, in 1986. He worked for several years in R&D for power electronics and telecommunication companies before moving into management roles. Andrew has maintained a hands-on interest in electronics, particularly embedded systems, power electronics, and control theory in his free time. Over the years he has written a number of articles for various electronics publications and occasionally provides consulting services as time allows.

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LTspice

by Andrew Levido time to read: 5 min