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Analog to Digital Converters

Written by Andrew Levido

Digital to analog converters (DACs) are one of the key components which sit at the interface between the digital world and the analog one. Their job is pretty simple – convert a digital value to an an analog voltage (or current). How hard could that be?

Leaving aside time-averaging methods for achieving digital to analog conversion (such as filtered PWM, delta-sigma converters or binary rate multipliers) most DACs you will come across work by one of the methods shown in Figure 1. Either a string of matched resistors or an R-2R ladder is used with analog switches to create a voltage divider. A similar R-2R ladder is used in current-steering DACs which have an output current proportional to the digital input.

Figure 1
 The resistor string (left) and R-2R ladder (right) are common DAC architectures. The resistor string has the advantage of guaranteed monotonicity but require 2n matched resistors and a similar number of analog switches to implement. The R-2R ladder DAC is much simpler to implement, requiring on 2n resistors.

The resistor string DAC requires 2n resistors where n is the number of digits of resolution. For example, a 12-bit DAC would require 212 or 4096 matched resistors. An R-2R DAC on the other hand requires only 2n resistors, or 24 resistors for a 12-bit DAC.

The most obvious specification you will see is the resolution of the DAC. This is the number of individual steps in the output between the lowest and highest digital input value. For example, an 8-bit DAC will have 256 discrete output levels, so with a 2.5V reference each step will be about 9.7mV. If you use a 16-bit DAC (65,536 voltage steps0 each one will be just 38.2µV. Higher resolution DACs are more expensive, and your analog circuitry needs to be up to the task, so more bits is not always better.

Figure 2
An ideal DAC provides precisely equal output steps for each bit value of the input code. It output is exactly zero with an input code of zero and the correct full-scale output with the maximum input code. Unfortunately, real DACs exhibit a range of departures from the ideal that you need to be aware of.

Resolution is only the beginning of the things you need to be aware of. Figure 2 shows the ideal transfer function of a DAC. Each bit of output should result in a uniform output step following the ideal gain line shown in red. A zero code would result in zero output and a full-scale code would result in a full-scale output. This ideal behaviour will never be realised in real parts. The data sheet is full of information about how your DAC will deviate the ideal. Some of the more important of these are shown in Figure 3.

Figure 3
This figure shows four of the most important error types exhibited by DACs. At the top left is Integral non-linearity which is the maximum deviation in DAC output from the ideal characteristic. Differential non-linearity(top right) is the maximum deviation between the expected and measured values of adjacent steps. Gain error (bottom left) is a measure of the difference between the expected and measures slope of the DAC characteristic. Finally, zero code and full-scale errors (bottom right) quantify the deviations from ideal at either end of the scale.

Relative accuracy, or Integral Non-linearity (INL) is a measurement of the maximum deviation from the straight line passing through the endpoints of the DAC transfer function measured in LSBs. Figure 3A shows how this kind of error can accumulate due to slight errors in the DAC resistors.

Differential non-linearity (DNL) is a measure between the expected and measured changes between any two adjacent codes measured in LSBs (Figure 3B). This can occur for a variety of reasons including missing codes. Note that if DNL is less than or equal to 1LSB the DAC is said to be monotonic. This means that increasing codes always result in an increasing or flat output – there can never be a step back. Resistor string DACs are guaranteed monotonic by design. R-2R ladder DACs may or may not be monotonic.

There may also be an overall gain error which is defined as the deviation of the slope of the DAC characteristic from the ideal line (Figure 3C). Gain error is usually measured as a percentage of the full-scale value.

There can also be error at either end of the scale (Figure 3D). Zero code error is the difference between the expected (usually zero) and the measured output with a digital value of zero. This is usually expressed in mV and may include offset error due to the internal amplifier stages.  Full scale error is the difference between the expected value and the measured value with the full-scale digital input. This is usually measured in percent of full scale.

I should note here that all these errors will be impacted by temperature to some extent or another, so read the data sheet carefully. In addition, I have discussed each type of error in isolation – in reality they will all be in effect at the same time. Sometimes manufacturers provide an error figure that captures the main DC errors in one figure. This is called Total Unadjusted Error (TUE), and it may be expressed in percentage of full scale or in LSBs.

There are other sources of error I have not discussed, including noise density, digital glitch impulse, output settling time, multiplying bandwidth and others. It’s worth reading the data sheet carefully.

Lest you begin to despair at the litany of error sources, let us look at one of the better DACs on the market today, and see just how good things can get if you are willing to pay for it. The AD5689 is a two channel 16-bit resistor string DAC with an SPI interface. Internally it has 65,536 matched resistors and a similar number of analog switches.

It achieves some very impressive figures with a worst-case relative accuracy of ±2 bits, differential non-linearity of ±1 bit, gain error of 0.1% FSR and zero offset error of ±1.5 mV. The worst-case TUE is 0.1% of full scale with a gain of 2. The typical figures are even better (but should be viewed with caution). All this goodness comes at a cost. In this case that cost is about thirty US dollars apiece.

References
Horowitz, Paul, and Winfield Hill. The Art of Electronics. Third edition, 11th printing, with Corrections. Cambridge New York, NY: Cambridge University Press, 2017.

Riordan, Liam. “Multiplying DACs—Fixed Reference, Waveform Generation Applications,” n.d.

“ADC Accuracy Part 2: Total Unadjusted Error Explained – Precision Hub – Archives – TI E2E Support Forums,” October 14, 2014. https://e2e.ti.com/blogs_/archives/b/precisionhub/posts/adc-accuracy-part-2-total-unadjusted-error-explained.

“AD5689 Datasheet and Product Info | Analog Devices.” Accessed October 12, 2023. https://www.analog.com/en/products/ad5689.html.

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Andrew Levido (andrew.levido@gmail.com) earned a bachelor’s degree in Electrical Engineering in Sydney, Australia, in 1986. He worked for several years in R&D for power electronics and telecommunication companies before moving into management roles. Andrew has maintained a hands-on interest in electronics, particularly embedded systems, power electronics, and control theory in his free time. Over the years he has written a number of articles for various electronics publications and occasionally provides consulting services as time allows.

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Analog to Digital Converters

by Andrew Levido time to read: 5 min