Test Your EQ (Engineering Quotient)

EQ #12

What does the term “plesiochronous” mean?

A plesiochronous system is one in which everything is tied to a master clock so that the same clock frequency is used throughout the system, but because of unknown delays within the system, phase relationships can be completely arbitrary. A classic example is a T1 telephone circuit (1.544 Mbps digital data), where one end is the timing master and the other end uses “loopback” timing to derive its transmit clock from the received signal. By the time the data gets back to the master, it can have arbitrary phase because of the unknown path delays.

Metastability can be a major concern in such systems, but as long as asynchronous design principles are followed, plesiochronous operation does not cause any additional problems.


Don't miss out on upcoming issues of Circuit Cellar. Subscribe today!

 
 
Note: We’ve made the October 2017 issue of Circuit Cellar available as a free sample issue. In it, you’ll find a rich variety of the kinds of articles and information that exemplify a typical issue of the current magazine.


Would you like to write for Circuit Cellar? We are always accepting articles/posts from the technical community. Get in touch with us and let's discuss your ideas.

— ADVERTISMENT—

Advertise Here