Multilayer Board Design
Robert continues his article series on how to properly design printed circuit boards. Here in Part 2, he delves deeper into how vias fit in, and the challenges associated with multilayered PCB design.
Welcome to “The Darker Side.” This article is the second of a three-part series on printed circuit boards (PCBs). In my previous column “Understanding Proper PCB Design (Part 1)” (Circuit Cellar 367, February 2021), I explained why 4-layer PCBs—the simplest form of multilayer PCBs—are ubiquitous, and how to design them. However, I voluntarily skipped two important and linked subjects: the PCB layered structure itself and the vertical conductive holes, called “vias,” that make connections between layers. This will be my topic here, so take a seat and enjoy!
Let’s start with some reminders. As you know, a PCB is a laminated stack of dielectric and copper layers. The simplest ones use a single dielectric layer and 1 or 2 copper layers (single- or double-side). These are inexpensive, and can be homemade easily, but are limited in terms of both density of connections and EMC performance. That’s why the vast majority of medium- to high-complexity projects are using a multilayer PCB. Such circuits can have 4, 6, 8 or even more than 40 layers (Figure 1). You will notice that PCBs with odd numbers of layers are rare, because symmetry helps to avoid bending. So just forget them.
Multilayer PCBs can range from 4 to more than 40 layers.
Like simple, double-side PCBs, each external copper layer of a multilayer PCB is chemically etched to make copper pads on which components will be soldered, and traces interconnecting these pads as required. Moreover, each internal copper layer is also etched to make additional connections, including ground planes or power distribution planes. All these layers will be interconnected by vias, and this will form the full wiring of the design.
One vocabulary note: When talking about dense PCBs, you will often hear the name HDI. This will be the case especially when using fine-pitch or ball-grid-array (BGA) components. HDI means “High Density Interconnect,” which is just a way to say that the PCB will need to have finer copper traces and spaces than usual, and probably very small holes too. I’m not sure if there is a shared definition of HDI among designers, but the IPC association defined HDI in its IPC-2226 standard. It is described as a PCB that uses either copper lines and spaces smaller than 0.1mm or vias of 0.15mm or less. Usually, HDI boards also use some fancy via types, which I will describe in more detail later.
PCB STACK-UP
Assume that you need a simple 4-layer PCB for your next great project. How will it be manufactured? Probably, the manufacturer will start with a core, which is nothing more than a thin double-side PCB (or more precisely a rigid dielectric layer with copper foils on both sides). The two copper sides are etched, then two thin layers of dielectric are added on both sides, followed by two more copper foils (Figure 2, top). These additional layers of dielectric are called “prepreg,” and are typically woven glass cloth of precise thickness impregnated with epoxy resin. The stack of panels is then placed under a heated hydraulic press. After solidification, the assembly is drilled, plated and etched again to get traces on top and bottom layers.
The same PCB structure, here 4 layers, can be assembled using different stack-ups, which will give different options to the designer.
But this is not the only method. Alternately, the manufacturer could also start with two independent double-side cores, etch both of their sides, then glue them together with one or more prepreg layers in between (Figure 2, bottom). The resulting structure may look similar, but as I will explain shortly, the technical possibilities for the PCB designer will not be the same, in particular concerning the vias.
I will talk about PCB substrates in my next column, but note that you will be free to pick your material from a number of different combinations ranging from the common, low-cost FR4 epoxy to high-performance epoxy, ceramics or Teflon materials. Cores and prepregs for a single circuit may even be of different materials, if needed. The thickness of each layer can be selected by the designer, as well as the thickness of each copper layer. For copper, this specification is either directly in microns, or as the weight of copper per area (in ounces per square foot, a very weird unit for Europeans). The most common thicknesses are 1oz copper per square foot (35µm), 2oz (70µm) or 0.5oz (18µm).
PCB manufacturing involves both very precise technology and machining, and is an actual art. If you are interested, there are some very good videos posted on the Internet by PCB manufacturers, showing all the steps of the process. I encourage you to watch, for example, the very interesting YouTube channel of ICAPE PCB. Their “PCB Journey” series is a must-see. This is available in RESOURCES at the end of this article, along with several other useful PCB information links from companies like Cadence, Altium and others.
VIAS
So, a multilayer PCB can have as many copper layers as needed. Now, how to interconnect them? By making vias, which are barrel-shaped vertical conductive holes that make connections between layers. Honestly, I don’t know where the word “via” comes from. I saw two versions on the Internet. Some said that it means “Vertical Interconnect Access,” whereas others say it comes from the Latin via, which means path or way. You choose!
Anyway, a via interconnects copper pads on different layers, and is made by electroplating. More precisely, holes are first drilled through the PCB assembly. The board is then immersed in a succession of specific chemicals, and a voltage is applied between the two external copper foils, which are not yet etched. After some time, electroless plating copper gets deposited in the holes, making a connection between the two external copper sides, and with any internal layers that have a copper pad at the hole position. This process is called “plated through-hole” (PTH for short). The copper-plated holes can be used either as vias, or to solder the leg of a through-hole component (Figure 3), since the manufacturing process is the same.
A via is a vertical connection between layers, whereas pads allow components to be soldered.
(Click to enlarge)
Vias can have various diameters, from ultra-small to large, which may be needed for power traces. However, not all via sizes can be manufactured. If the ratio of PCB thickness to hole diameter is too high, then the drill bit may break too easily, or the copper plating may fail. For mechanical drills, the recommended minimum for this so-called “via aspect ratio” (AR) is 6:1. This means that the minimum hole diameter for a 1.6mm-thick PCB is about 0.27mm. So, a thicker board implies larger vias. That’s one of the reasons why thin boards are often preferred for dense circuits.
Fortunately, manufacturing techniques other than mechanical drills do exist. In particular, a laser can be used to drill vias with diameters down to about 0.02mm. Such ultra-small vias are called “microvias,” and I will talk about them later.
BLIND AND BURIED VIAS
Up to now, I have described vias as vertical conductive holes going through the full PCB stack-up. Such through-hole vias (PTH) go all the way through, from top to bottom, connecting all layers. However, it is also possible to produce holes that connect only some of the copper layers of a multilayer PCB, rather than passing through the entire board. These are called “blind vias” when they connect an internal copper layer to an outer layer, or “buried vias” when they connect two or more internal copper layers but no outer layers (Figure 4).
The three different via kinds. A plated through-hole (PTH) interconnects all layers, whereas blind and buried vias only go through some layers.
Using blind or buried vias allows far more dense connections than when using PTH only. For example, a blind microvia may only link the top and inner1 layers, while not interfering with all other layers, thus helping a lot for the routing. This helps to keep the board light and compact. Of course, using blind or buried vias on a PCB increases the manufacturing cost, since extra steps are needed, so they are usually only used for high-density interconnect (HDI) PCBs. They are, however, common; for sure, your smartphone or PC is full of such fancy vias!
VIAS BEFORE FINAL LAMINATION
How can a blind or buried via actually be manufactured? There are in fact two ways—either before or after PCB lamination. Let’s look at the first option, called “sequential buildup.”
As explained in the beginning of this article, multilayer PCBs are manufactured by incrementally etching copper foils on both faces of a core dielectric, then adding prepreg layers and copper foils on both sides, etching again and so forth. Remember that several stack-ups are possible, even for a simple 4-layer board as illustrated in Figure 2. So, it is possible, at each step of the process, to drill some vias and to plate them, before etching the copper and adding the next layers of prepreg. Either blind or buried vias can thus be made, but the kind of via that can be manufactured is dependent on the manufacturing process.
Let’s see as an example the two possible stack-ups for a 4-layer board (Figure 2). The first stack-up starts with a core, then adds two prepregs and copper foil on both sides. So, the manufacturer could, in a first step, drill and plate the internal core alone (Figure 5, top). This will make buried vias, connecting the two internal layers. They could then etch the two copper sides of the core, then glue the prepregs and copper layers and press the stack-up, then drill again and plate to make PTH vias, and finally etch the two external copper layers. So, this assembly process allows PTH vias and buried vias to be made, but not blind vias.
In sequential buildup, the stack-up defines which vias can be made. On top (prepreg + core + prepreg), only buried or PTH vias are possible. On bottom (core + prepreg + core), only blind vias are possible.
What about the second possible stack-up (Figure 5, bottom)? Here, the manufacturer starts with two thin cores, then assembles them with an intermediate prepreg. They could then start by drilling and electroplating each of the two cores, which makes blind vias going down one layer on both sides, then assemble the stack-up, and drill again to add PTH vias.
As you see, depending on the manufacturing process used, the final circuit is very different in terms of possible vias, so the PCB designer must know how the PCB will be manufactured before designing it. I only used two very simple examples, but you get the idea. Additional steps may be added for more via types, and the possibilities are far greater when the number of layers is more than four. This increases the board cost, but increases the possible connection density, and all via types still aren’t always possible.
BACK-DRILLING
Imagine that you need a 4-layer PCB, with simultaneously some buried vias between the two internal layers inner1 and inner2 (as with the first stack-up here above), and some blind vias from top to inner1 and from bottom to inner2 (as with the second stack-up). Such a design is impossible to manufacture using sequential buildup: You could have either of them, but not both on the same board—at least not using sequential buildup.
Is there a solution? You bet there is. In fact, there are two options. The first option is called “back-drilling,” or “controlled-depth drilling,” and is illustrated in Figure 6. The idea is to build the board with only buried and PTH vias, and later transform some PTH vias into blind vias. To do that, the board is flipped over and a drill bit a little larger than the via size is used. The board is drilled through the via up to a precise depth, to remove the copper of the via on some of the layers, and all unwanted connections. The holes are then filled with resin. This a cost-effective solution, because controlled-depth drilling is cheaper than multiple lamination cycles. However, back-drilling is only possible when the PCB is not too dense, to avoid traces too close to the drill position.
Back drilling allows a PTH via to be transformed into a blind via.
LASER VIAS
Back drilling is fancy, but laser vias are even fancier. Here, the board is assembled, and then a laser is used to drill blind microvias, which are then electroplated. There are plenty laser via processes, but Figure 7 illustrates one of the most common. First, a UV laser is fired all around the via hole pattern. It destroys the copper layer, but penetrates only slightly in the dielectric layer. Then a CO2 laser is fired at the same position. The wavelength of this laser is reflected by copper, so it doesn’t enlarge the hole, but penetrates deeply in the dielectric. This second laser digs into the PCB down to the next copper layer and stops there. Electroplating is then applied, and a great blind via is created!
Laser microvia process illustrated step by step. See main article for explanation.
Because lasers are fast, up to 200 vias can be drilled each second with such a process. Therefore, laser-drilled microvias are heavily used in dense PCBs. This is especially the case when using fine-pitch BGA packages (ball-grid arrays). With such packages, it is often mandatory to add a via close to each pad of the chip, or in the pad itself (via-in-pad). Standard vias are just too large for that, so laser vias are used commonly.
However, due to the laser process, laser-drilled microvias tolerate aspect ratios of just 1:1, meaning that the drill depth can’t be more than the hole diameter. Thus, a laser microvia can’t be deeper than some tenths of a millimeter, meaning it will go through one prepreg layer or two, but not through the full board: Only blind vias can be produced, or short buried vias if another prepreg layer is added after the laser processing.
LASER VIA STACKING
As noted, laser microvias most commonly span a single layer. Nevertheless, if the dielectric layers are thin enough, it is possible to build variable-depth blind vias with a laser. For example, a double-layer laser via can be drilled with more power on the CO2 laser and a slightly larger hole (Figure 8).
Laser microvias may go deeper than 1 single layer, using double-layer firing, staggering or stacking.
In such a situation, another method is to use “staggered laser vias.” Rather than drilling a blind via through two prepreg layers, the connection is split into two single-layer blind vias. The inner one is laser-machined and plated before applying the external prepreg layer. This method has the disadvantage of using slightly more board real estate.
The last option, “stacked laser vias,” is also shown in Figure 8. Here, two successive laser vias are manufactured at exactly the same position. This is possible only with another process step: the first laser via must be filled with a conductive material to reflect the CO2 laser, once again adding some cost. By the way, the same filling is required on the external copper layers if via-in-pad are used.
TIME TO CHOOSE
In a nutshell, keep in mind that PTH vias or deep buried vias are usually drilled mechanically, whereas laser microvias are mostly used for blind vias and on one or two external layers only. Regardless, the possible options for a PCB designer are great, and it is not always easy to know what can or can’t be made, and at what cost. Of course, you can give a call to your preferred PCB supplier and ask, but it may be more complex if you are not yet sure of the selected supplier or if it is overseas.
To help you, the IPC association has specified some standard multilayer HDI stack-ups, with growing manufacturing complexity (Figure 9). They are documented in IPC-2226A. The first, Type I, is a multilayer board with as many layers as you wish, but with only PTH vias going through the whole board, and blind microvias going through one dielectric layer only. Such boards need only one lamination step, one laser drilling step, and one plating. They are then the cheapest, and can be built very quickly. Type I is also called “1+N+1” (for example, 1+6+1 means 1 microvia layer + 6 inner layers + 1 microvia layer, with no buried vias).
The IPC defines standardized HDI stack-ups of increasing complexity.
Going higher in complexity, Type II, or “1+NB+1,” is the same but with added mechanically drilled buried vias. One more lamination and plating step is then needed, but the cost stays limited.
Type III, also called “2+NB+2,” adds two layers of laser vias, adding one more lamination and metallization step but increasing the routing density considerably. Finally, Type IV is the most complex with even more lamination steps, and additional process steps mean more cost and more yield loss.
WRAPPING UP
I know not all readers of Circuit Cellar are designing complex, multilayer PCBs, but I hope this article gave you some insights into PCB technology. Even if you think this is not accessible for your projects, I encourage you to check the cost of multilayer prototype PCBs on the Internet, as you may be surprised. In fact, if you are not in a hurry, it is now possible to order a set of 10 4-layer 50mm × 100mm PCBs with blind and buried microvias for $300 or so—that’s $30 each. And the unit cost goes down to $5 or less for a quantity of 100. These costs are orders of magnitude cheaper than what they were 10 years ago, so the trend is really encouraging. These are still significantly more expensive than a simple double-side PCB, but this may be a good option if you have to design a complex project, or even a simple project using complex BGA chips.
Last but not least, if you want to try to design a multilayer board, you need to learn how to use your CAD tools. In particular, don’t forget to check how to configure it for blind and buried vias. The options depend on the tool suite (see Figure 10 for an example on Proteus from Labcenter), but you must define which via types can be used, before starting to route the board!
This is how the possible via types are defined with the Proteus CAD tool suite (Proteus). Here the tool is configured for a Type-II 4-layer HDI PCB (aka 1-2B-1).
Here we are. My next column will still be on PCBs. I’ll discuss other advanced topics, and more specifically impedance-controlled and length-controlled traces. So, stay connected!
RESOURCES
IPC-2226A standard
Sectional Design Standard for High Density Interconnect (HDI) Printed Boards
IPC
https://www.ipc.org/TOC/IPC-2226A.pdf
ICAPE group
The PCB Journey: Manufacturing process video series:
Overcoming the Challenges of HDI Design
https://www.altium.com/live-conference/sites/default/files/pdf/Overcoming%20the%20Challenges%20of%20HDI%20Design%20-%20Suzy%20Webb.pdf
Susy Webb
Design Science
Altium Live 2018
HDI
https://www.eknet.no/wp-content/uploads/2019/05/HDI-Presentation.pdf
Ole Kristian Hamre Sørlie
Data Response
HDI microvia webinars
https://www.we-online.com/web/en/leiterplatten/webinare/archiv/microvia_hdi_webinar/webinar_archiv_16.php
Wurth Elektronik
https://resources.pcb.cadence.com/blog/pcb-101-what-are-blind-and-buried-vias
https://en.wikipedia.org/wiki/Printed_circuit_board
https://www.4pcb.com/multilayer-pcb.html
https://www.7pcb.com/blog/splitting-interconnect-blind-vias-into-stack-up-vias.php
https://www.protoexpress.com/blog/hdi-considerations-manufacturability-cost
Altium | www.altium.com
Cadence Design Systems | www.cadence.com
Labcenter Electronics | www.labcenter.com
Pentalogix | www.pentalogix.com
PUBLISHED IN CIRCUIT CELLAR MAGAZINE • APRIL 2021 #369 – Get a PDF of the issue
Robert Lacoste lives in France, between Paris and Versailles. He has more than 30 years of experience in RF systems, analog designs and high-speed electronics. Robert has won prizes in more than 15 international design contests. In 2003 he started a consulting company, ALCIOM, to share his passion for innovative mixed-signal designs. Robert is now an R&D consultant, mentor and trainer. Robert’s bimonthly Darker Side column has been published in Circuit Cellar since 2007. You can reach him at askrobert@lacoste.link.
