4-Layer Board Design
Printed circuit boards (PCBs) have become a fundamental staple at the heart of most electronic systems. In this new series, Robert examines the important aspects that are critical to good PCB design. Here in Part 1, he shares the step-by-step method he uses to design four-layer PCBs.
Welcome to “The Darker Side.” According to Wikipedia, the first description of flat foil conductors laminated to an insulating board was published in 1903 by a German inventor, Albert Hanson. Seems close to what we now call a printed circuit board (PCB), doesn’t it? The invention of the actual PCB is, however, attributed to an Austrian engineer, Paul Eisler, in 1936. At that time, World War II was starting, so the technology was restricted to military use for more than 20 years. Fortunately, things have changed, and as you know, nearly all electronics are now physically assembled on a PCB.
Even if they are ubiquitous, the design of a good PCB is still not a straightforward task. Computer-assisted design (CAD) tools do help a lot, but without a good method, a designer can easily get lost. What could go wrong? With some luck, the designer could succeed, but simply spend far too long on the job. If he is a bit less lucky, then things may become awkward: Improper PCB design may result in bad electromagnetic compatibility (EMC) performance, which may lead to non-compliance to standards—or could even result in a non-working design.
As Niels Bohr said, “An expert is a person who has made all the mistakes that can be made in a very narrow field.” I don’t know if I qualify as an expert, but for sure I have made plenty of mistakes in PCB designs over the past 40 years. After dozens of failed projects or overrun budgets, I ended up with a method that has proven to be quite efficient for medium-complexity designs, as long as I follow it carefully. If it works well for me, why not share it with you?
This article is the first in a small series on PCBs. This month I’ll explain, step by step, how I design four-layer PCBs. If you think it’s strange to start with something more complex than double-sided boards, then keep reading, because you may be surprised!
PCB IN A NUTSHELL
OK, some reminders first. A PCB is a structure that supports and interconnects all kinds of electronic components. These interconnections are made using pads and traces etched on copper sheets. These copper sheets are laminated onto a non-conductive substrate, and are interconnected using metallized through-holes and vias. As you probably know, a PCB can support either through-hole or surface-mounted components (Figure 1). Through-hole parts have wire leads, which pass through the board and are soldered on the other side. Surface-mount parts have pins that are soldered directly to copper pads on the same side of the board. Of course, a board may have both variants at the same time—even though this makes assembly take longer.
I will discuss PCB substrates and manufacturing aspects such as coating and finishing in another article, so, for the moment let’s focus on the copper layers. The simplest PCBs are single-sided, meaning that they have only one copper layer (Figure 1). These are, of course, restricted to very simple designs because traces can’t cross. Standard, low-cost PCBs are double-sided boards, meaning they have two copper layers—one on each side of the substrate.
Starting with a double-sided board, it is possible to add another layer of substrate and another copper foil on both sides (for symmetry), and this gives us the four-layer board. Going further, manufacturers can build such multilayer PCBs with more than 30 layers. Your PC motherboard likely has 8 to 12 layers. And your smartphone may have a 0.4mm-thick, eight-layer PCB. That’s impressive, isn’t it?
WHY FOUR LAYERS?
Now, why am I starting with four-layer PCBs, if double-sided ones are cheaper? For three reasons. First, designing a good four-layer PCB is far simpler and faster than designing one with two sides. Here, the word “good” is important. Designing “bad” double-sided PCBs may be as fast as what I’m going to describe, but if you want to have good performance—analog signals, EMC, high speed logic, high frequencies and so on—then four layers is far easier. Second, electronic components are more and more complex surface-mounted beasts, with plenty of fine-pitch pads, and using more layers makes life easier. And last but not least, the price of multilayer boards is now very affordable—even for the hobbyist. Look on the web, and you will easily find suppliers that manufacture, say, a set of five 100mm × 100mm, four-layer boards for about $10 each.
Technically speaking, why are four layers better for performance? The answer is one word: Ground. Why? Simply because the most common cause of bad circuit behavior is an incorrect ground structure. As soon as a pin that should be connected to ground goes through a long wire or trace, then nasty things may happen. This long trace will be equivalent to an inductor, and the voltage of the grounded pin will no longer be 0V when non-DC signals are present.
So, on the schematic, plenty of pins are connected to ground, but on the PCB, all these pins may be at different voltages over time. A good design thus needs a rock-solid ground, and the best way to do so on a PCB is to have a full copper ground plane and to connect all grounded pins to this plane with traces that are as short as possible. I devoted a full article to this ground plane issue, so if you have any doubt please refer to it (see my article “Ground Planes: Rules Good, Bad and Ugly”, Circuit Cellar 335, June 2018) .
Even if you are convinced, you may argue that it is possible to have a full ground plane on a double-sided PCB. True, but by definition, a full ground plane doesn’t have any extra wires through it; there is only one layer left for the signals. Routing all the signals on this single layer will be difficult. So at least three layers are needed—one for the ground plane, and two for the signals. Moreover, if the ground plane is between the two signal layers, then this will add some decoupling between the signals. Three-layer PCBs don’t exist, so four layers is the way to go. As illustrated in Figure 2, the second internal layer typically is used for power distribution, using power planes. Components may be soldered only on one side or both.
WHY A STRICT PROCESS?
Now, how to design a four-layer PCB, practically speaking? Let’s do it with an example. I drafted the schematic of an imaginary product, shown in Figure 3. Don’t assemble it—this is just an example for this article, and I don’t know if it works or even if it should. Here a STMicroelectronics STM32 microcontroller (MCU) (U1) is supposed to be connected to an external Integrated Silicon Solution IS61C1024 SRAM chip (U3). Two 8-bit 74HC573 latches (U4 and U5) are used as address bus registers. Last, I added an 8MHz crystal (X1) and a 3.3V LDO regulator (U6).
Even for a project like this, designing a good PCB may be a long task if you launch your CAD software and try to route all wires without following a specific procedure. In my experience, the faster and better way is to strictly follow the 12-step process shown in Figure 4. I will discuss each of these steps, and more importantly, I will explain why I think they should be followed carefully and in exact order.
Before that, I need to say a word on auto-routing. Nearly all CAD software has auto-routing features. Just enter the schematic, click on a button and the PCB is finished! Well, not so simple. High-end CAD tools have good auto-routing algorithms, but only if you spend a long time telling them exactly what you want to do. The PCB tool can’t know which wire is important if you don’t tell it. Honestly, I never use auto-routers, simply because I’ve found that it’s faster to route the PCB manually. Auto-routers are, however, nearly mandatory if your design is full of impedance-controlled and length-matched differential pairs, such as ultra-fast DDR chips and FPGAs. But that’s another story, and I will discuss that in a follow-up article.
Look again at the schematic (Figure 3). How long do you think it took me to manually design the corresponding four-layer PCB illustrated in subsequent figures using my 12-step method? Well, roughly half an hour. If you don’t believe me, then let’s go through the steps one by one and try it for yourself!
STEP BY STEP
Step 1: Draw and check all packages: As a starting point, I always draw the package of all parts used, meaning the shape of their body and pads. Here a good CAD tool helps a lot because some have extensive ready-made libraries, whereas with others, you would need to design the parts by hand. My company mainly uses Proteus, a medium-range CAD tool from Labcenter Electronics. Registered users get access to millions of parts through third-party databases—a clear added value. Anyway, I find or draw the packages of all parts, then I actually verify them. By that I mean I buy the parts, print the packages on a 1:1 scale and verify that they fit. I stopped counting the PCBs we had to put in the garbage because we skipped this step, and then found that the documentation or the variant of the part was wrong.
Step 2: Define technology rules: As my second step, I like to define the so-called “technology rules.” They include minimum trace width and spacing, minimum hole size, distance from trace to edge of the board and so on. These rules must be communicated to the CAD tool, which will then verify them and forbid you to do erroneous things. They are linked to the capabilities of the targeted manufacturer, but also affect cost directly. I find it easier to define them after drawing all the packages, since using a fine-pitch part may imply smaller traces, for example. So, if the already-defined packages show an error when I enter the technology rules in the CAD software, I know something is wrong! In Step 2, I also define the default trace width and via size, based on the technology rules.
Step 3: Draw board edge and place parts: Now it is time to draw the board contour and place all the parts. This step may seem easy, but it is probably the most critical one. For good performance, two rules must be satisfied. First, all noisy parts must be as far as possible from noise-sensitive circuits. Second, all critical connections must be as short as possible.
Some of my colleagues prefer to place only the key components first, but I personally prefer to place 100% of the parts, to ensure that there is enough room for them. For this placement step, all CAD tools provide visual aids, such as ratsnests (lines showing unconnected pins) and force vectors (arrows indicating where a part should be moved to minimize connection lengths). Personally, I also print a paper copy of the schematic, and keep it on hand when placing the parts. Reading the schematic (Figure 3), it is clear that the capacitors C6 to C8 must be as close as possible to the connector J1, so I place them right after placing J1. In my example, I ended up with the placement illustrated in Figure 5. The board could be smaller, but leaving some room around the chips will definitely help in the next steps. For simplicity and lower manufacturing cost, I place all the parts on a single side of the PCB. Of course, double-side placement is possible if you need to reduce the board size.
Step 4: Optimize schematic for routing: Going straight to the routing after this initial placement would be a mistake. Why? Because it is a good time to go back to the schematic and check if some changes could help the PCB routing. Some examples? If you use a dual op amp chip, then substituting two identical op amps might reduce the complexity of the wiring. Or maybe exchanging the inputs of a logic gate would avoid wire crossing. If your design has programmable components such as an MCU or FPGA, then shuffling around their I/O pins may dramatically simplify the PCB.
Look again at my placed example (Figure 5). As you will see, there are eight wires between U5 and U3 that look like a star, meaning that each connection will cross all others. Wouldn’t it be simpler to route if they were the other way around? Looking back at the schematic, these eight connections are bits of the RAM address. It doesn’t care if you interchange RAM address bits or even RAM data bits! Accordingly, I modified the schematic to simplify the routing (Figure 6). I encourage you to compare it carefully with Figure 5. You will see the improvements on the ratsnests (green lines).
Step 5: Route grounds to ground plane: Now we can start the routing, meaning the connection of all pins. Because ground connections are the most critical, I always begin by drawing a full ground plane on the first internal layer, and I connect each grounded pin to this ground plane with a very short trace and a via. No exceptions—one via per grounded pin, placed very close to the pin. This may seem harsh, but it’s easier to remove some extra vias later, rather than to take any risk. Of course, I take care to place vias where they will not block the connections to other pins in case of fine-pitch packages, but that’s the spirit. The resulting PCB after this step is shown in Figure 7. As illustrated, all pins connected to ground have one via, except two for C3 and C10 that were very close to the chip ground pins. To avoid forgetting any grounded pins, I use a feature of my CAD tool that highlights in white all pins of a given net, here “GND.” Far easier than looking for them manually.
Step 6: Route power supplies to power plane: In this step, I do the same for all power supply connections, using the other internal layer as a power distribution layer. In my example there is only one power voltage, 3.3V, so I drew a full plane connected to the 3.3V net on “inner 2” layer, and connected all 3.3V pins to this plane with the same technique as that used in Step 5. I also routed the power lines from the input connector (J1) to the LDO (U6) and 3.3V power plane. The results (colored olive green) are shown in Figure 8. If the design has several power voltages, then the power plane could be split into different regions.
A word of caution: It is a good idea to avoid power planes extending to the edge of the board. Otherwise, short circuits may appear on the contour of the board if the PCB is milled.
Step 7: Place critical vias and route critical traces: After ground and power routing, using the two internal layers nearly exclusively, I check on the schematic to see if there are really critical connections, and I place them. These could be high-speed or high-frequency traces, ESD protections or other connections. I also check the placement of all fine-pitch pads or pins that are difficult to access, and I connect each of them to a via. This reduces the risk of dead-lock situations in subsequent steps. Of course, this step is even more important when using ultra-dense packages like ball grid arrays (BGA). I did this work on the example PCB (Figure 9).
As you can see, since the routing may be difficult on the left side of the MCU (U1), I added vias there. I also considered as critical the connections between U1 and the crystal (X1), and those between J1 and the filtering capacitors (C6 to C8), so I routed these connections right away. The key at this step is to continue routing the wires one by one. Try to focus strictly on the most critical and short traces, and leave all other connections for the next steps.
Step 8: Decide top and bottom strategy: After Step 7, nearly all connections still need to be routed, except those for ground, power and a couple of critical signals. All these signals will be routed exclusively on the top and bottom layers, since the two internal layers are devoted to ground and power respectively. Will it always be possible? Yes—but only by following a very strict rule: Select either the top or bottom layer for horizontal traces, and the other for vertical traces, and always use a via if you need to change direction! This is what I call, “decide top and bottom strategy.” Here, I decided to use the top side for vertical signals. The important thing is to decide, and then stay as close as possible to the chosen rule.
Step 9: Route all top/bottom signals: Now, all signals can be routed. This can be very fast, as long as you follow the horizontal and vertical rule. Of course, some deviations may be tolerated here and there, but only where there is no risk of a trace being blocked. In my example, and thanks to this clear rule, Step 9 took me less than 10 minutes (Figure 10). You can check that horizontal traces are mainly on the bottom side (in blue), while vertical traces are on the top side (in red). With this approach there are plenty of vias, but it isn’t a problem, because PCB manufacturers don’t charge extra for each via as long as you keep the number reasonable. I admit that my example is quite simple, but usually this vertical/horizontal rule does the trick.
From time to time, an exception can be made, and a short trace can be routed on the internal power plane to resolve a difficult situation—but never on the ground plane. Never. Once again, if you don’t know why, then read my article on ground planes .
Step 10: Reinforce ground: This may not always be necessary, but after finishing the routing, I always add ground planes on the top and bottom layers—filling the board everywhere around the traces and pads. These extra ground planes don’t replace the full ground plane on the internal layer, but complement it and help to decouple the signals. I also add extra ground vias all over the board, to ensure that these ground planes are perfectly connected through regularly spaced connections—more densely spaced if the circuit is working at high frequencies.
Step 11: Clean each layer: Routing a multilayer PCB is visually complex, because there is considerable information and many colors on the screen. When the design is supposed to be finished, I find it efficient to display one layer at a time (top only, silkscreen only, inner layer only and so on), and to check them carefully by zooming in on the design. Unusually complex trace routing or minor issues are then easily identified and corrected. Figure 11 shows the PCB after cleaning and the added top-side ground plane.
Step 12: Post-process and verify: This last step is the preparation of the board for manufacturing, through post-processing and verification of the manufacturing files. This step is dependent on the CAD tool and manufacturer you plan to use, but usually deals with generation of so called “Gerber files,” which are the drawings of each layer. Several Gerber viewer and verification tools are available, either integrated in the CAD tool, in the web system of the PCB manufacturer or proposed as independent tools such as the good and free ViewMate from Pentalogix. I never skip this step, because spending a little time with a verification tool is far better than losing a full set of PCBs!
I’m out of paper but far from the end of the subject, so my next article in this column will continue with the topic PCBs. I will go into more detail in terms of PCB manufacturing constraints, including blind vias, substrate selection, coating, and also impedance and length matching, flex circuits and so forth.
In the meantime, if you are not familiar with four-layer PCB design, I encourage you to try the procedure described here. Use your CAD tool if you have one, or download a free CAD tool such as KiCad, and try it out. And if you are already a PCB master, then drop me an email and let me know if you agree with my proposed 12-step method! Any other ideas or criticisms are welcome!
 “Ground Planes: Rules Good, Bad and Ugly”, Circuit Cellar 335, June 2018.
Proteus CAD suite
ViewMate Gerber viewer
KiCad open-source CAD suite
PUBLISHED IN CIRCUIT CELLAR MAGAZINE • FEBRUARY 2021 #367 – Get a PDF of the issueSponsor this Article
Robert Lacoste lives in France, between Paris and Versailles. He has more than 30 years of experience in RF systems, analog designs and high-speed electronics. Robert has won prizes in more than 15 international design contests. In 2003 he started a consulting company, ALCIOM, to share his passion for innovative mixed-signal designs. Robert is now an R&D consultant, mentor and trainer. Robert’s bimonthly Darker Side column has been published in Circuit Cellar since 2007. You can reach him at firstname.lastname@example.org.