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Let’s Understand Ground Stitching Vias

FIGURE 1 An example of a 10GHz board. Do you see the ground stitching vias?
Written by Robert Lacoste

Why do we need ground stitching vias in a printed circuit board (PCB)? In this article, I use simulations in Sonnet Lite to illustrate their purpose.

  • What is the purpose of ground stitching vias?
  • How should I incorporate ground stitching vias in my PCB design?
  • How can I use Sonnet software to learn circuit design principles?
  • Sonnet Lite

Long-time readers of Circuit Cellar may remember my “Darker Side” bi-monthly column, which ran for about 15 years and ended just one year ago. In my last article, I promised you I would write again from time to time, at least when I found an interesting new topic for Circuit Cellar readers. And here we are. I hope I have found one that interests you!

Let me give you a little backstory. Some time ago, I discussed grounding with a customer, and tried to convince him that good grounding could make the difference between a working project and an endless nightmare, especially when designing a printed circuit board (PCB). This is always true, but particularly when high-frequency signals are around. And nowadays, it is really rare to find a project without any high frequencies! Think about it. Don’t you need to include a fancy wireless interface, maybe Bluetooth, working at frequencies as high as 2.4GHz? Or maybe you simply have a small but powerful 32-bit microcontroller, with a clock close to 100MHz? A 100MHz square wave includes powerful harmonics at least up to 1GHz. Such harmonics can be a nice source of electromagnetic compatibility issues, if they are not well managed. In all cases, proper grounding is essential.

This month, I will focus on a specific ground issue that was the core of the discussion with my customer—ground stitching vias. If you don’t know what I am talking about, take a look at Figure 1, which is an example of a microwave board designed by my company some years ago. Do you see all the small holes in the ground planes? Do you see that they are more numerous close to traces? These holes, or “vias,” are all connected to the electrical ground. They are called “ground stitching vias.” Their purpose is to keep everything that should be grounded at actually ground voltage level. Even if Figure 1 is a bit of an extreme example, since signal frequencies were in the 10GHz range, such vias are or should be present on all PCBs—at least whenever frequencies above a couple of MHz are present somewhere. And when the frequencies go higher, then the vias should be closer to each other.

FIGURE 1 An example of a 10GHz board. Do you see the ground stitching vias?
An example of a 10GHz board. Do you see the ground stitching vias?

Why? Is it black magic? Are these vias actually useful, or are they just a silly whim of close-to-retirement RF designers? What could happen if they aren’t placed on the PCB? And how many vias are enough?

These are the questions I will try to answer in this article. As usual, I will not use any complicated math or complex theory—just examples and even some nice simulations that I will encourage you to do by yourself, using freely available tools. So don’t hesitate, take a seat, and enjoy this small trip in the electromagnetic world!


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First, let’s recall some basics. As you may know, high-frequency signals need to be transmitted on “transmission lines.” Such lines have a characteristic impedance that the designer matches to the source and load impedance. On a PCB, this is usually done using a microstrip trace, which is nothing more than a copper trace of precise width on top of a ground plane. If needed, don’t hesitate to revisit my column on that topic (“The Darker Side: Understanding Proper PCB Design (Part 3): Controlled Impedance Routing,” Circuit Cellar #371, June 2021) [1].

For shielding purposes, it is also common to add another ground plane on the top layer around the PCB traces. These top layer grounds fill all empty spaces between traces, and are connected to the main full ground plane using vias. Maybe it would be clearer with a drawing. Have a look at the simple example I illustrated in Figure 2. Here, the PCB substrate—epoxy for example—is shown in green. The bottom layer is assumed to be a full sheet of copper connected to ground. On the top side, a simple trace is a transmission line that transmits a signal from the left side of the PCB to the right side. Last, the designer added another smaller, rectangular ground plane on the top side, because there is plenty of empty space there, in a reasonable attempt to improve the overall shielding. This top ground plane is connected to the bottom ground plane using one via. One via will, of course, connect the two, at least if we measure the voltage between the top ground planes using a voltmeter. But what happens with high frequencies?

The example for this article is a simple, double sided PCB with a full ground on the bottom, and two structures on the top—a transmission line and another ground plane.
The example for this article is a simple, double sided PCB with a full ground on the bottom, and two structures on the top—a transmission line and another ground plane.

In PCB designs for high frequencies, nothing is more efficient than simulating the design on a computer. Why? Simply because electromagnetic simulation tools allow you to test several configurations quickly and easily. Doing “what if” tests at no cost is a great learning tool! Moreover, a computer has no problem showing you things that would be tremendously difficult to see on an actual device—measuring surface currents on copper traces, for example. So, I propose that you try to simulate this simple example.

You will say, “Yes, but electromagnetic simulation tools are expensive, difficult to use, and would require a supercomputer to run!” Yes and no. This is probably true for high-performance full-3D simulators, which are not accessible to the hobbyist. However, there is some good news.

First, far simpler tools are perfectly able to simulate a PCB. These tools are called “3D planar simulators” or “2D ½ simulators.” Basically, the way they model the world is more constrained than a general-purpose 3D simulator. The object to be simulated is supposed to be made of a stack of thin dielectric layers, and metallic structures must also be flat and sandwiched between a pair of dielectric layers, with vertical vias to connect them together. This is exactly the way a multilayer PCB is made. This is also the way an integrated circuit is made. But that’s another story.

Second, thanks to these simplifications, the calculation time with a 2D ½ simulator is far quicker than with a full 3D simulator, so your PC will be enough. The third piece of good news is that some renowned vendors of professional 2D ½ simulators provide a limited version of their tools free of charge! Here, I suggest you use one of the referenced 2D ½ simulators, Sonnet (Sonnet Software), or Sonnet Lite, which is a limited version of this tool. Limited here means that the size and complexity of the model is considerably limited, but it will be enough for my example.

Are you ready? Why don’t we do it together? Just switch on your PC (Windows required), and follow me step by step. I’m sure you will find it fun!


First, download Sonnet Lite from the Sonnet Software website [2], and install it on your PC. When you launch it for the first time, you will be asked to register the software. Just click on “Register,” enter the requested information and wait for the activation code to arrive in your email. Enter this code in the registration window, click “Activate,” and voilà—you have a running version of Sonnet Lite.

Now it is time to create your first project by selecting File/New geometry. Then define the characteristics of the simulation world in the Circuit/Settings menu (Figure 3) by going through the settings in the box on the left of the screen.


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This first one is “Units.” For simplicity, change the length unit to “mm.” The second item, “Box,” allows you to define both the full size of the simulated world and the cell size. “Cell size” is the elementary unit for all calculations. A smaller cell size increases the simulation accuracy, but at the expense of a longer simulation time and more memory. Here, select a cell size of 1x1mm and a box size of 70x30mm. This setting is about the maximum allowable with the limitations of the free Sonnet Lite version. For more complex designs, you would need to buy a license.

Still on the “Box” options, there are selectors for “top metal” and “bottom metal.” This is another limitation of a 2D ½ simulator—the simulated world lives in a rectangular box, and the top and bottom walls of the box can only be either metallic or free. The tool doesn’t allow you to select properties for the four other walls, which are always supposed to be metal. Here, the top metal should be set to “Free space,” since there is nothing on top of the PCB, whereas the bottom metal should be “Lossless,” meaning the ideal metal as the bottom of the PCB is the ground plane (Figure 3).

The next setting item is “Dielectric Layers,” which allows you to define the dielectric stackup and properties. In this example, we will simulate a double-sided PCB with a full ground plane on the bottom layer. Let’s assume that the PCB is made with a standard FR4 laminate with a height of 1.6mm. Simply select the substrate layer, click on “Edit,” modify the thickness to 1.6mm, and select an FR4 dielectric from the library (Figure 4). Also modify the thickness of the air layer above the PCB to 4mm, since 0mm is not allowed.

Two more options must be modified: In the “EM Options” screen, enable the “Compute currents” box; and in the “Sweeps” screen, double click on the ABS simulation and select the Start and Stop frequencies to simulate, for example, from 1 to 10GHz.

The Circuit/Settings menu in Sonnet Lite is where definition of the world under Sonnet begins. In the "Box" options, you define the dimensions and cell number and size for the simulated PCB, and define the PCB's top and bottom metal layers.
The Circuit/Settings menu in Sonnet Lite is where definition of the world under Sonnet begins. In the “Box” options, you define the dimensions and cell number and size for the simulated PCB, and define the PCB’s top and bottom metal layers.
In the "Dielectric Layers” options of Sonnet Lite, you define the dielectric stackup and properties.
In the “Dielectric Layers” options of Sonnet Lite, you define the dielectric stackup and properties.

You can now close the Circuit/Settings window, and you are back to the main Sonnet geometry entry window (Figure 5a). On the top left, a small Stackup Manager window shows you the different dielectric and metal layers and allows you to select one. The center area shows you the PCB viewed from the top—70x30mm wide. On the right, a set of tools allows you to define the board structure.

Let’s start with a simple microstrip trace. It should be about 3mm wide on a 1.6mm FR4, for 50Ω characteristic impedance (trust me). Click on the bottom left of the area and select “Place Origin.” Then select the Rectangle tool, and draw a box from x=0,y=6mm to x=70mm,y=9mm as illustrated in Figure 5a. The copper trace is defined. Now you need to indicate that the signal will go through this line. Select the Port tool and add two ports on both ends of the line. Then save the project (File/Save as).

Ready for your first simulation? Click on the top menu item, “Launch/Analyze/New queue,” then select “Run” and wait for the simulation to finish. On my PC it took about four seconds. Then click on the “Graphs” icon and you will directly get the so-called “S11 parameter” of the simulated transmission line, which is a figure of merit of the line impedance matching. Here we are more interested in the transmission from Port 1 to Port 2 which is called S21, so double click on the “DB[S11]” line in the “Curves” window, and select “To Port”=2. You should now see the simulated loss through the line (Figure 5b). The simulation shows that the line introduces some losses, from about 0.5dB at 1GHz up to 2.8dB at 10GHz. But nothing else unexpected, just some losses.

Note: If you have any issues running this simulation, then simply download the “exson_lineonly” project from the Circuit Cellar article materials webpage. All other simulations described in this article are available for download on the same webpage.


Now, what is the impact of a badly grounded piece of metal on the top layer? Go back to the geometry window, and draw another metal rectangle from x=2,y=12 to x=61,y=27. Select the “Via” tool and draw three 2x2mm grounding vias on the left side of the rectangle as shown in Figure 6a. This copper area on the top layer is then connected to the ground through three vias, and is 3mm away from the microstrip line carrying the signal, so it shouldn’t perturb it, right? Launch the simulation again. This will take slightly longer (about seven minutes on my PC), and plot the resulting S21 as before.

As shown in Figure 6b, the response curve is far more chaotic than that of the transmission line alone (which is superposed in green as a reference). More precisely, the loss is quite similar to the first case up to 1.8GHz or so, then considerably higher losses appear at precise frequencies—1.9GHz, 3.15GHz, 4.45GHz, and so on.

What is the source of this strange behavior? A simulator such as Sonnet provides a nice way to pinpoint it, by plotting the currents flowing on all metallic surfaces. Click on the “Current” icon and look at the frequency up/down icons on the top menu. Increase the frequency step by step and look at what happens at 1.9GHz: As shown in Figure 7, the ground patch resonates at this specific frequency! Click again on the frequency buttons and you will see that the same phenomenon occurs at 3.15GHz and higher, with higher resonance modes.

The source of the losses at specific frequencies is explained. The ground current plot shows that a first resonance in the ground plane appears at 1.9GHz.
The source of the losses at specific frequencies is explained. The ground current plot shows that a first resonance in the ground plane appears at 1.9GHz.

This small simulation already shows what kind of problem may appear when a grounded structure is not adequately connected to the main ground plane: The structure could couple itself with a nearby transmission line, and at specific frequencies, resonances could appear, inducing a filtering effect.


How do we avoid these problems? By adding more ground stitching vias, of course! Let’s try to add a ground via every 2cm on your Sonnet Lite simulation model, as shown in Figure 8a. Run the simulation again, and plot the resulting S21. You will get something like Figure 8b. There are still some frequencies with the attenuated transmission, but compare Figures 8b and 7b. Do you see the major differences? Adding a ground stitching via every 2cm did improve the situation. In particular, the response is now very close to the case of the transmission line alone nearly up to 4GHz, but not above. Why? Simply because the ground vias are spaced too far apart for higher frequencies.

How do we know this? Let’s do some quick math. Do you remember that a wave is defined by its frequency, but also by its wavelength, which is the wave velocity divided by the frequency? At 4GHz, the wavelength in free space is the speed of light divided by 4GHz, so 3×108m/s divided by 4×109Hz, or 7.5cm. But here we are on a PCB, and not in free space, and the wavelength is a bit shorter. Trust me one more time—you have to divide it by the square root of the so-called “effective dielectric constant,” which, for a microstrip on an FR4 substrate, is about sqr(3.5)=1.9—so we get a wavelength of 7.5cm/1.9=3.9cm. So, we can see that a ground via every 2cm means that we have barely two ground vias per wavelength at this frequency. A good engineering rule in a situation like this is to have at least five ground vias per wavelength, so every 8mm. Therefore, if we want the design to work up to 10GHz, then a ground via every 4mm will definitively be better.

Why not try it? Open Sonnet Lite again, and now add a ground via every 4mm, at least on the side close to the transmission line, which is the most critical area. Add a couple of vias on the other sides, maybe every 1cm or so (Figure 9a). If you now re-run the simulation, you’ll get Figure 9b. And as you will have guessed, the transmission line is now behaving exactly as it should: the simulated response is nearly identical to that of the transmission line without proximity of the top ground plane.


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Here we are. I hope that you liked this article, which, I admit, deals with subjects not usually discussed in Circuit Cellar. More than anything else, I hope that you understood that nothing, especially not grounding, is magical. When a rule applies, this is for a good reason. Good PCB designers have discovered, then explained, why ground stitching vias are mandatory, and why they should be separated by not more than a fifth of the wavelength on the substrate, or about a tenth of the wavelength in air. Remember that in this context, “wavelength” means the wavelength of the signal of highest frequency that could be around, whether intentional or unintentional—like in the case of electromagnetic perturbers.

Lastly, I encourage you to play around with a simulator like Sonnet. Replicate the examples presented in this article, then modify them and run the simulation again. Do you get something strange? Great, then try to understand why! This is one of the best ways to learn. 

[1] Robert Lacoste. “The Darker Side – Understanding Proper PCB Design. Part 3 – Controlled Impedance Routing.” Circuit Cellar #371, June 2021.[2] Sonnet Lite simulation software, free download:

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Robert Lacoste lives in France, between Paris and Versailles. He has more than 30 years of experience in RF systems, analog designs and high-speed electronics. Robert has won prizes in more than 15 international design contests. In 2003 he started a consulting company, ALCIOM, to share his passion for innovative mixed-signal designs. Robert is now an R&D consultant, mentor and trainer. Robert’s bimonthly Darker Side column has been published in Circuit Cellar since 2007. You can reach him at

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Let’s Understand Ground Stitching Vias

by Circuit Cellar Staff time to read: 13 min