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sureCore Announces Low Power Memory Compiler for 16nm FinFET

surecore low power memory compiler
Written by Kirsten Campbell

The mature FinFET nodes are rapidly becoming an interesting option for companies focused on low power applications like wearables, IoT and medical. With an attractive combination of performance, density and yield, these nodes can deliver some very compelling trade-offs, in particular cutting operating voltages to deliver substantial power savings whilst still delivering the requisite performance metrics. With 16nm now having been in production for over ten years, not only have the foundries ironed out manufacturing issues, but the tooling is now also largely depreciated meaning that a technology that was once the heralded solution for the demands of the HPC and mobile sectors has now become cost competitive for developers of power sensitive devices.

SoC developers with low power solutions implemented in 28 or 22nm bulk or FDSOI nodes are now facing traditional commercial pressures to cut ASPs and deliver improved feature sets and power envelopes. However, as outlined above, these FinFET nodes were engineered to deliver performance first and foremost hence much of the IP that is available for these nodes is similarly optimised.

However, sureCore, the low power embedded memory specialist, has announced the availability of its PowerMiser, ultra-low, dynamic power memory compiler in 16nm. This will enable developers to more easily hit their challenging power budgets and successfully exploit the capabilities of these mature FinFET processes.

Paul Wells, sureCore’s CEO, explained, “FinFET was developed to address the increasingly poor leakage characteristics of bulk nodes. In addition, the key driver for the mobile sector was ever greater performance to deliver new features and a better user experience. The power consumption was not deemed a significant issue, as both the radio and the display were the dominant factors in battery life determination. This, in addition, to the relatively large form factor of a mobile phone meant that the batteries had capacities in excess of 3-4000mAh. However, designers of power sensitive applications such as wearables and medical devices with much more constrained form factors and hence smaller batteries need a range of power optimised IP that can exploit the power advantages of FinFET whilst being much less concerned about performance. This has meant a demand for memory solutions that are specifically tailored to deliver much reduced power consumption. By providing the PowerMiser SRAM IP, sureCore is enabling the shift to mature FinFET processes for low power applications and is thus helping to provide clear differentiation for such products based on both cost and battery life. By doing so, the all-important competitive advantage over rivals may be realised.”

surecore | sure-core.com

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Kirsten Campbell is a Marketing Tornado and junk robot of information. Analytical and creative, she has been in marketing and communications since 2008 and worked with everyone from small businesses to your favorite household names. 

 

Ask her about the time she made a numismatics blog interesting (yes, really) or wrote an obit for a family she never met.

 

An ardent admirer of corporate snark played out online, Kirsten loves Reese’s peanut butter cups and still isn't over the Mars Rover.

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sureCore Announces Low Power Memory Compiler for 16nm FinFET

by Kirsten Campbell time to read: 2 min