Andes Technology and IAR Systems announce the development of the AndesCore RISC-V automotive CPU IP and IAR Systems functional safety certified development tools for RISC-V. These developments from both companies are offering a robust design format according to ISO 26262. The design methodologies will accelerate time to market by already shortening strict certification processes.
The AndesCore automotive CPU is a safety-enhanced version of the bestselling N25F RISC-V cores. To achieve functional safety the core is designed to prevent system failure and is controlled by safety mechanisms designed to prevent random hardware failures.
The IAR Embedded Workbench is a complete RISC-V development toolchain including the IAR C/C++ Compiler with a comprehensive debugger. The collaboration brings together expertise in functional safety and strong preventative measures for robust time-to-market acceleration. Joint customers with best-in-class performance and safety requirements will find the combined CPU and Development tools exceeds safety and performance needs.
said Dr. Charlie Su, President and CTO of Andes Technology said in a statement. “We are thrilled to collaborate with IAR Systems to support customers worldwide in the product development of automotive SoCs. With AndesCore™ automotive core, we ensure customers can leverage the ISO 26262 certified CPU IP and Safety Package in their product certification process. Andes is proud to be the first RISC-V processor IP vendor to get process certifications for both Hardware (ISO 26262-5) and Software (ISO 26262-6) with a complete development process to help customers meet ASIL D requirements.”.
“It’s great to see how IAR Systems’ partnership with the Andes is helping our mutual clients ensure functional safety in their products. RISC-V technology continues to move fast forward and break new ground for innovations,” said Anders Holmberg, CTO of IAR Systems. “and we will continue to drive change in the industry by supporting both the ecosystem and our customers with professional development tools.”
The first AndesCore automotive RISC-V CPU is expected to be certified by SGS-TUV GmbH in H1 2022. The functional safety of IAR Embedded Workbench for RISC-V is already certified by TUV SUD by ten standards, including the ISO26262. IAR Systems is offering guaranteed support for sold version for the length of the customer contract, validated service packs and regular reports of known deviations and problems.
— ADVERTISMENT—
—Advertise Here—
Andes Technology | andestech.com
Sponsor this Article
For the past 8 years, I have been writing about embedded technologies, added to my technical, academic, and medical editorial experience, with companies like Elsevier and Cambridge University Press. I tell people to read what I write, not try to pronounce my last name. I am always available for comments and suggestions you can reach me at product-editor@circuitcellar.com and I promise I will take the time to reach back out to you. I live in the North East with my wonderful family.
