CC Blog Insights Tech The Future

The Future of Memory — The Time for ReRAM

Written by Eran Briman
  • What is ReRAM?

  • What is the future of ReRAM

  • How will ReRAM be used in Edge AI

  • How can ReRAM be used by the automotive industry

  • How can ReRAM be used in MCUs

  • How can ReRAM be used in IoT

  • ReRAM

In non-volatile memories (NVMs) where flash memory is the de facto standard, the need for a more advanced technology has taken on urgency as the industry continues to scale to ever more advanced nodes. The limitations of flash are increasingly clear, especially the fact that it’s just not economically feasible to embed flash memories into SoCs beyond 28nm for most applications.

Emerging memory technologies like Resistive RAM (ReRAM), Phase Change Memory (PCM), Magneto Resistive RAM (MRAM), and Ferroelectric RAM (FRAM) offer an alternative to floating gate memory devices and can scale more easily to advanced geometries. Each of these technologies has its own advantages and drawbacks in cost, complexity, power, performance, and other key factors. The technology that offers the best balance is ReRAM, which is emerging as a leading candidate to replace flash memory for a broad range of applications.

ReRAM technologies will start to enter the market in the next 12 months. This technology is an ideal NVM for a broad range of applications, however timelines for adoption vary due to both the rollout of ReRAM (which will start at fairly low densities), and trends within end markets such as cost drivers, performance, and power targets of emerging applications as well as certification requirements.

Here we will discuss some of the applications where we think ReRAM will first gain traction, along with our current thinking on the timeframe for each.


One of the first places ReRAM will gain a foothold is in power management ICs (PMICs) and other analog/mixed-signal designs. Every electronic device has at least one PMIC, managing the power distribution within the system. Market demand for programmable PMICs is increasing to support trends such as proliferation of wireless charging and intelligent motor controllers. PMICs for these devices must be smart and able to run numerous algorithms, so they need a microcontroller (MCU) and NVM that is low-power, programmable and field-upgradeable.

Today’s solutions are generally based on a separate MCU chip with its NVM alongside the PMIC. However, to decrease cost and power, there is a move toward integrating the PMIC, MCU, and NVM on a single die in more advanced geometries. Below 130nm, embedded flash begins to be too expensive for these applications and is also difficult to integrate. This is largely because flash is integrated at the Front-End-of-Line (FEOL), so companies must often make compromises with power/analog components to accommodate flash on the same wafer. This can lead to degraded performance, larger size, and higher cost.

ReRAM is a Back-End-of-Line (BEOL) technology (Figure 1), so it can be adopted once for a geometry and it will work with all the different variants of that node, unlike flash which needs to be adapted to each variant. In addition, with only a two-mask adder—versus the ~10 extra masks needed for flash—ReRAM is cost-effective, an obvious requirement for most ICs.

ReRAM is integrated in the FEOL, so there is no need for compromise with power/analog components.

The market for low-power IoT devices using intelligent MCUs continues to grow. While estimates for growth have generally been revised down looking out over the next couple of years due to various economic headwinds, the Ericsson Mobility Report estimates that we will see the number of connected IoT devices grow over the next several years from ~14 billion in 2022 to ~30 billion in 2027 [1].

Ultra-low-power devices must support increasingly sophisticated programming and need NVM that not only has the requisite performance, but also has ultra-low-power consumption, low total cost of ownership, and high data retention even in harsh or inaccessible conditions.

Designers are increasingly exploring integration of NVM at 28nm or 22nm to combine the lowest power consumption with maximum cost reduction. Due to flash’s integration challenges, these designers must today either remain at 40nm with an embedded solution or use a two-chip solution using external flash.

Embedded ReRAM has significant advantages over external NOR flash for these applications. Designers can reduce costs by eliminating external memory components. They can also reduce power and increase system speed because there is no need to fetch data from external memory. Importantly, integrating ReRAM on a single die is also a better secured solution against hacking and cyber-attacks.


At the same time, we will start to see ReRAM in Edge AI applications, used not only for code storage, but also to store the synaptic weights needed for artificial neural network (NN) calculations. Regardless of the specific application, storing these weights requires significant on-chip memory (between 10Mb and 100Mb, depending on the network size). These higher capacities for ReRAM are still a few years out on the horizon, but the timing will be right to intersect the market need.

Today it’s possible to use clever algorithms on DRAM or SRAM for inference at the Edge, but because of ever stricter power and cost envelopes, it’s becoming increasingly difficult to make this work. One issue is that DRAM and SRAM are volatile, and an increasing number of applications need to monitor the environment and then quickly wake up from standby mode. What’s needed is embedded NVM that can do the same level of inference as SRAM or DRAM but at extremely low power and low cost: ReRAM. In addition, because a ReRAM cell is approximately three to four times smaller than a typical SRAM cell, significantly more memory can be integrated on-chip to support larger neural networks for the same die size and cost.

As much of the power consumption needed for NNs is related to data movement between a system’s computing elements and memory modules, the industry is also investigating ways to reduce this data movement by integrating dense, low-power NVM like ReRAM closer to the computing elements.


Today’s vehicles integrate many hundreds of chips to control various functionality (Figure 2), and most of these chips require some form of NVM. Automotive applications are still a few years out for ReRAM, mostly due to qualification for specific temperatures and certifications like ISO26262. But it will get there, as the technology is designed for high-temp robustness.

Some places where NVM is found in a car

Designers are already defining automotive chipsets a few years out on the horizon and will be looking for new embedded NVMs as SoCs move to advanced processes. To support fast boot, instant response, and frequent OTA updates in often harsh conditions, these systems need NVM with superior endurance that can execute code quickly, reliably and securely, in a cost-efficient manner—all pointing to ReRAM as the logical choice for automotive ICs.


Looking farther out on the horizon, ReRAM will also be a building block for the future of Edge AI, neuromorphic computing. In such an architecture, computation is done within the memory cell. Because ReRAM cells have physical and functional similarities to synapses in the human brain, it is possible to emulate the behavior of the human brain with ReRAM for fast real-time processing on massive amounts of data. This is orders of magnitude more power-efficient than today’s neural network simulations on traditional processors.

We won’t put a year on when ReRAM will roll out in analog/neuromorphic computing, but there is a lot of commercial and academic investment going into this area.


We can’t end without mentioning the advantages of ReRAM for security applications. Whether it’s SoC security solutions such as physical unclonable functions (PUFs) and true random number generators (TRNGs), or embedded NVM for SoCs for security applications like smart cards, ReRAM provides an inherently secure solution. Unlike floating gate devices, such as flash, ReRAM doesn’t use any charges or other particles, so it is more difficult to sense or change its internal state using electron beams. Because it is immune to electromagnetic fields, ReRAM can also easily withstand magnetic attacks, unlike MRAM. In addition, because the ReRAM bit cell is deeply embedded between two metal layers integrated at BEOL (Figure 3), it is more immune to optical attacks. And last but not least, ReRAM can scale to small geometries so the critical information can be embedded in the chip at these geometries and not put on a separate chip, where the inter-chip communication can be more easily monitored.

The ReRAM bit cell is deeply embedded between two metal layers, integrated at the BEOL

It may seem like we covered every possible application for ReRAM in this article, but since nearly every electronic product requires some NVM, the sky’s the limit, and the advantages of ReRAM are numerous. Flash is reaching its limits, and it’s time for a new NVM that can power a new era of electronic devices. It’s time for ReRAM.


Weebit Nano |

PUBLISHED IN CIRCUIT CELLAR MAGAZINE • October 2022 #387 – Get a PDF of the issue 

Keep up-to-date with our FREE Weekly Newsletter!

Don't miss out on upcoming issues of Circuit Cellar.

Note: We’ve made the Dec 2022 issue of Circuit Cellar available as a free sample issue. In it, you’ll find a rich variety of the kinds of articles and information that exemplify a typical issue of the current magazine.

Would you like to write for Circuit Cellar? We are always accepting articles/posts from the technical community. Get in touch with us and let's discuss your ideas.

Sponsor this Article
VP of Business Development and Marketing at | + posts

Eran Briman is VP of Business Development and Marketing for Weebit Nano, a developer of innovative ReRAM technology.

Supporting Companies

Upcoming Events

Copyright © KCK Media Corp.
All Rights Reserved

Copyright © 2024 KCK Media Corp.

The Future of Memory — The Time for ReRAM

by Eran Briman time to read: 6 min