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December (issue #365) Circuit Cellar

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p.6: Device Monitors Home Air-Quality and CO2: The IntlAir Project, By Andrei Florian




GitHub Repo

Farnell |
Microsoft |
Mikroe |

p.16: Breathalyzer Links to Car’s Ignition System: Using an NXP LPC802 MCU, By Julia Paglia

Source Code:

Demo Video:

Datasheets and User Manuals:
The following are links to the PDF files for the LPC802 user manual as well as the datasheets for the LPC802, the MQ-3 gas sensor, and the HD44780 LCD screen.

Mathematical References:
These are resources used for the deriving the conversion formula from the MQ-3 analog output signal into a meaningful BAC percentage.

Additional Background References:
Below are references to background details about Ontario’s Ignition Interlock Program.

Eric Electronic Technology |
Digi-Key Electronics Canada |
Mouser Electronics |
NXP Semiconductors |
Sparkfun |

p.22: True Random Number Generation: Using Comparators, By Wolfgang Matthes

Note:  An extensive Addendum is provided to the article. To view the Addendum, scroll down to the end of this page.

Reference designs and application notes:

Analog designers usually strife to avoid oscillations. The most common method is to provide for hysteresis, that is, to modify the reference voltage if the comparator’s output level has changed.
This is to avoid that the differential voltage at the inputs remains in the linear region for some time. As soon as the output switches, the reference voltage is changed so that a larger input voltage swing in the opposite direction is required to switch back again. If the output signal switches on, the reference voltage is reduced, if it switches off, it is increased again. So small variations of the input voltage cannot cause the output switching back, thus avoiding oscillations.

These papers and articles discuss the causes of the oscillations and how to prevent them. When reading with the converse intention, perhaps we could get some ideas on how to incite them

1. Kay, Art; Claycomb, Timothy: Comparator with Hysteresis Reference Design. TIDU020A. Texas Instruments Incorporated, 2013–2014.

2. Guide to Adding Extra Hysteresis to Comparators. Application Note 3616. Maxim Integrated Products,  2005.

3. Application Note 74. LM139/LM239/LM339 A Quad of Independently Functioning Comparators. Application Report SNOA654A. Texas Instruments, Incorporated, 2004–2013.

4. Grohe, Paul: Application Design Guidelines for LM339, LM393, TL331Family Comparators Including the New B-versions. Application Report SNOAA35A. Texas Instruments, Incorporated, 2019–2020.

Some data sheets:
5. LM339, LM239, LM139, LM2901 Quad Differential Comparators. Data Sheet SLCS006U. Texas Instruments, Incorporated, 1979–2018.

6. TLV4011 Precision Comparator with Integrated Reference. Data Sheet SLVSFL9.  Texas Instruments, Incorporated, 2020.

7. LMV727x Single and Dual, 1.8-V Low Power Comparators With Rail-to-Rail Input. Data Sheet  SNOSA56I.   Texas Instruments, Incorporated, 2003–2015.

8. MAX40002–MAX40005/ MAX40012–MAX40015 nanoPower 4-Bump Comparator in Ultra-Tiny 0.73mm x 0.73mm WLP/SOT23 Packages. Data Sheet 19-8574. Maxim Integrated Products, Inc., 2020.

9. LTC1841/LTC1842/LTC1843 Ultralow Power Dual Comparators with Reference. Data Sheet 1284123f. Linear Technology Corporation, 1998 / Analog Devices, Inc., 2020.

We need comparators without built-in hysteresis. This obvious requirement could comparators in microcontrollers or FPGAs render not suitable. To be reasonable fast, the random number generator requires some or even many comparators. So especially tiny comparators are of particular interest.

10. Matthes, Wolfgang: Microcontroller Modules for the Ambitious. Circuit Cellar, Issue 312, July 2016

p.31: Understanding the Ultra96 Board (Part 1): The Hardware, By Nishant Mittal

[1] Product page:
[3] Schematic:

Xilinx reference: |
Avent | www.
Infineon Technologies |
Micron Technology |
ON Semiconductor |
Renesas Electronics |
Xilinx |

p.36: Build a Line Follower Robot: With Arduino and PID Control, By Alexandru Dumitrache

Adafruit |
EasyEDA |
FTDI Chip |
Microchip Technology |
Pololu |
SketchUp |
Solarbotics |
SparkFun |

p.42: IC and Software Solutions Enable Machine Learning: FPGAs, MCUs and Software, By Jeff Child

Achronix |
Eta Compute |
Flex Logix Technologies |
Microchip Technology |
Qualcomm Technologies |
Quicklogic |
SensiML |
STMicroelectronics |
Renesas Electronics |
Xilinx |

p.50: App-Specific Trend Drives Test and Measurement Gear: Market Mindset, By Jeff Child

Keysight Technologies |
Measurement Computing |
Pico Technology |
Rohde & Schwarz |
Siglent |
Tektronix |
Teledyne LeCroy |

p.55: DATASHEET: DC-DC Converters: Technology Charging Ahead, By Jeff Child

MINMAX Technology  |
Murata Power Solutions  |
TDK-Lambda Americas  |
Vicor  |
XP Power  |


MINMAX Technology

Murata Power Solutions


TDK-Lambda Americas


XP Power

p.58: EMBEDDED IN THIN SLICES: FreeRTOS (Part 1): Intro to Real Time Operating Systems, By Bob Japenga

[2] This article provides some background about the LM AGS.
[3] For more details about the 1201 and 1202 alarms
[5] Wikipedia provides some useful definitions and examples of “bare metal” systems
[7] August 24th, 2020
[8] for a good definition
[9] “FreeRTOS is a real-time kernel (or real-time scheduler) on top of which embedded applications can be built to meet their hard real-time requirements.” from
[10] Wikipedia gives a good general summary of each of the scheduling algorithms
[11] See Circuit Cellar articles – Issue 271 February 2013 Concurrency in Embedded Systems and Issue 273 April 2013 Introducing Linux Concurrency

FreeRTOS |

p.62: FROM THE BENCH: Automated TV Antenna Positioning System: Zeroing in on HDTV, By Jeff Bachiochi

[1]  Image source: Antennas on rooftops:
[2]  Free TV content in your area:
[3]  BNO055 datasheet:
[4]  Winegard RFL-332 SensarPro TV signal strength meter
[5] The Tablo:
Adafruit |
Espressif Systems |
Honeywell |
Winegard |

p.68: THE DARKER SIDE: Voltage-Level Translation Techniques: Managing Mixed-Voltages, By Robert Lacoste


[1] Logic Guide
Texas Instruments
[2] SN74AC00 quadruple 2-input positive-NAND gate
Texas Instruments
[3] MT-098 Tutorial: Low Voltage Logic Interfacing
Analog Devices Inc
[4] Voltage level translators search engine
Texas Instruments
[5] SN74LV1T34 Single Power Supply BUFFER Logic Level Shifter
Texas Instruments
[6] 74LVC245A Octal bus transceiver; 3-state
[7] MAX3370 – 1µA, 2Mbps, Low-Voltage Level Translators in SC70 and µDFN
Maxim Integrated
[8] ADG3301 – Low Voltage 1.15 V to 5.5 V, Single-Channel Bidirectional Logic Level Translator
Analog Devices
7400-series integrated circuits

4000-series integrated circuits
Voltage Translation Buying Guide
Texas Instruments

Analog Devices |
Maxim Integrated |
Nexperia |
Texas Instruments |

p.79: The Future of Chiplets: Specialized Chiplets Revive Moore’s Law, By Syed Alam

[1]  Omdia

Accenture |


ADDENDUM TO: True Random Number Generation: Using Comparators, By Wolfgang Matthes

Project History
Comparators behave nastily when the difference voltage between the two inputs remains some time within the magnitude of the offset voltage (in other words, within the linear region). Without countermeasures (e.g., hysteresis), a typical comparator will oscillate. The idea was, to employ these oscillations to generate random numbers. An experimental setup was built to verify the principle. However, it was not that easy to generate true random bit patterns that could pass appropriate certification tests. In the end,  principles have been found that may lead to acceptable true random numbers (TRNs). I have filed two patent applications (in Germany), covering the principles of operation. To develop fully-fledged devices, to get them certified, manufactured, and marketed, however, requires a considerable amount of work and money.  It has shown impossible to raise adequate funding. So I have decided to make the principles freely available in the realm of open sources.

German patent applications:
1.         Verfahren und Vorrichtung zum Erzeugen von Zufallszahlen
DE file number: 10 2015 010 518.3
Application date: August 13, 2015

2.         Verfahren und Vorrichtung zum Erzeugen von Zufallszahlen durch Auswertung des Schwingungsverhaltens von Komparatoren
DE file number: 10 2016 005 082.9
Application date: April 27, 2016

Both patents have lapsed.

License conditions
The technical solutions communicated here can be used freely (open-source hardware / open-source software). The terms of the CERN Open Hardware License Version 2 – Permissive apply. Functionality, suitability for any purpose, and freedom from other property rights cannot be guaranteed. The license terms – together with more detailed explanations – can be found at the following Internet addresses:

What has been built and programmed is essentially an experimental setup as a proof of feasibility.  It consists of  a microcontroller with attached comparator-based circuitry, a program running in the microcontroller, generating random bit patterns, programs running on a personal computer to set up and control the microcontroller program and to capture and evaluate the random bit patterns.

Figure A1. A look at the workplace. The arrow points to an adapter injecting collaring pulses from the signal generator behind. To the left a venerable Tektronix 5441 storage oscilloscope.


Figure A2. A look at the experimental setup. The human interface module has been described in “Microcontroller Modules for the Ambitious” Circuit Cellar, Issue 312, July 2016, the microcontroller module is a more advanced version, carrying an Xmega microcontroller.


Figure A3. The prototyping board carries four comparators, the counters, and the auxiliary circuitry. U1 is a Xilinx 9536 CPLD, U2 an LM339 quad comparator. The crystal oscillator U3 is a clock source used to capture the width of the oscillation pulses (by counting) and to generate collaring pulses.

Figure A4. An example of a display on the human interface module. All numbers are in hex (remember, it’s about tinkering, and the microcontroller is programmed in assembler …).

Some screenshots
Oscilloscopes used: Tektronix 5441, Agilent 6014A, and Agilent/Keysight 3024A.

Figure A5. Here the comparator behaves like described in the textbooks. The sinusoidal input voltage is converted into a pulse. The slow rise of the leading edge is the consequence of the open-collector output.

Figure A6. A slowly changing input voltage (here: the yellow traces) causes oscillations.

Figure A7. This is a snapshot of our random number generation. The input voltage is increased in small steps.

Figure A8. Experimenting with feedback via a capacitor. In the left picture, it is connected to the positive input, in the right picture to the negative. For comparison, see Figures 13 and 14 in the printed article.

Figure A9. Normal operation without additional feedback. For comparison see Figure 15.

Figure A10. Here the additional capacitor is connected to the positive input. For comparison, see Figure 16.

Figure A11. Here the additional capacitor is connected to the negative input. The green trace shows the input voltage. For comparison, see Figure 17.

Some details of the principles of operation

Figure A12. A comparator-counter circuit, comprising an 8-bit counter and an auxiliary 2-bit counter. The 8-bit counter ceases counting when 255 oscillations have been counted. This limit resulted from observing the comparator’s behavior on the oscilloscope. Only a few oscillations would evidently deliver insufficient entropy, counting 200 or more oscillations would not improve entropy but consume too much time. The auxiliary counter contributes the two least significant bits independent of the number of oscillations.

Figure A13. The experimental setup consists of four comparator-counter circuits. The counter contents are read out via an 8-bit  data bus.

Figure A14. Each comparator has, depending on its reference voltage, a region of the input voltage in which oscillations will occur if traversed not too fast. This portion of the linear region, called the VIN window, is defined by a lower and an upper VIN limit. It is reached and traversed in steps. In the 1st loop, the microcontroller emits coarse steps until the counter outputs begin to change (1). Then, the region is traversed in fine steps until the counter ceases to count (2). The VIN values at the points (1) and (2) are stored as the lower and the upper VIN limit, thus defining the VIN window. 

Figure A15. The basic parameters are to be found experimentally, above all the slew rate or, in other words, the dwell time in the VIN window. To secure sufficient entropy, a somewhat larger number of oscillations should be counted. On the other hand, it should not take too long to obtain a random bit. It was an intuitive decision to provide an 8-bit counter. The CNT_MIN and CNT_MAX values are parameters to be entered. As a starting point, we may begin, for example, to stipulate more than 32 oscillations, but no more than 128.

Figure A16. This hierarchy diagram depicts the components of the software running in the platform’s microcontroller.

Figure A17. The main window of a control program. Communication between the personal computer and the microcontroller is via a serial (RS-232) link. Commands are entered as hex numbers or by clicking the corresponding button. The communications protocol appears in the window to the left. To the microcontroller, 12 parameters are sent, whose meaning depends on the experiment to be executed. Analog voltages are set via the sliders.

Figure A18. Here an experiment has been run. The generated random bit pattern is shown. 333 774 bits have been produced, among them 167 309 zeros and 166 459 ones. Six passes of the bit generation loop were not successful. The difference between zeros and ones yields a bias of 850 or 0,255%.

Figure A19. This program evaluates bit patterns and converts them to files. It has been written with deliberate neglect of comfort (e.g., no file handling dialogues). The logout relates to the test pattern shown in the File Content window.

Figure A20. To generate a random bit, the linear region is to be traversed. In a first loop, the software begins to emit somewhat coarse input voltage steps. In each step, the content of the counter is read.  When its value has been changed, the linear region has been reached where the oscillations begin. Then the second loop will traverse the linear region in fine steps. The count values are collared. The second loop ends when the counter content changes no more.

Figure A21. This example shows how the outcome depends on the distance of the collaring pulses.        

Figure A22. This flowchart illustrates the algorithm to evaluate the collared values. This is preceded by the algorithm depicted in Figure 9 in the printed article, supplemented by a subroutine or interrupt handler that stores (collars) counter values occasionally.

Figure A23. This block diagram illustrates the same algorithm. It is, however, implemented in hardware. The collared values, however, are not brought into a RAM but evaluated on the fly. This way some or even many comparators could be operated in parallel.

More Details
They may be found on the author’s homepages (see below). It is not expedient to repeat the first experiments, conducted in 2015 and 2016. The descriptions and sources, however, may find their good use as a starting point for experiments and further development. For example, one could begin with one of the ubiquitous small microcontroller modules and, at first, find out whether some of the built-in peripherals, especially counters and comparators, may be of use or not. Random number generation and evaluation could be written in a convenient high-level language and executed on the microcontroller without needing a PC. I recommend, however, to write the innermost bit generation loop in assembler. Thus the program cycles generating the random bits will not depend on the intricacies of a compiler. (Please consider that an eventual certification may become invalid if the innermost algorithm is modified, even by minute deviations that may be caused by re-compiling.)  CPLD or FPGA design, if necessary, could be done not by drawing schematics but by describing the desired behavior, e.g., through a language like Verilog or VHDL.   

The author’s project homepages:
Datasheets, application notes, reference designs, tutorials and so on:
(Author’s note: I prefer to look first into the technical documentation manufacturers of real hardware provide, not into academic textbooks.)

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December (issue #365) Circuit Cellar

by Circuit Cellar Staff time to read: 13 min