Build a Three-in-One Measurement System

No home electronics lab is complete without a signal generator, logic analyzer, and digital oscilloscope. But why purchase the measurement devices separately, when you can build one system that houses all three? The process is easier than you’d expect.

Hand-soldering a package this size is tough work. The signal-generator filter has bulky coils. In contrast, the MSP430F149’s PQFP64 is tiny.

Photo 1: Hand-soldering a package this size is tough work. The signal-generator filter has bulky coils. In contrast, the Texas Instruments MSP430F149’s PQFP64 is tiny.

Salvador Perdomo writes:

I’ve built an inexpensive and versatile measurement system that contains a signal generator, logical analyzer, and digital oscilloscope. If you build your own, you’ll be able to address many of the problems typically encountered on test benches.

The system is not PC-bus connected. Instead, it’s external to the computer, making use of the RS-232 serial port shown in Figure 1. Also, it doesn’t have a power supply input, so the same serial cable feeds it. Because the computer’s serial connection provides limited power, low power consumption is a fundamental requirement.

It is of interest to have your test benches as clear as possible to search for the faulty part of your design. So, a small measurement system is highly recommended. It’s better if it isn’t connected to the mains.

Figure 1: It is of interest to have your test benches as clear as possible to search for the faulty part of your design. So,a small measurement system is highly recommended. It’s better if it isn’t connected to the mains.

The low-power goal is achieved with a small number of components—the fewer the better. So, I quickly became interested in the Texas Instruments MSP430F149, which is a highly integrated device with low power consumption. Note that everything is integrated except the oscilloscope analog chain (coupling and programmable amplifier), part of the trigger circuit, and the input buffer for the logic analyzer. The microcontroller works with an 8-MHz crystal oscillator.

This application uses the register bank, the entire RAM (2 KB), and nearly all of the peripherals. The peripherals used include the 16-bit TimerA and B, ADC, analog comparator, multiply accumulate, and one USART with modulation capability. Only the second USART is spared.

The system has several main features. You can control and display on the PC by running software implemented on LabWindows/CVI. In addition, it has a signal generator based on the direct digital synthesis method and a frequency of up to 6 kHz with 0.3-Hz resolution. The output voltage reaches a peak of 1.3-V (±2 dB) fixed amplitude. The signal generator works simultaneously with the oscilloscope and logic analyzer (but not these two).

I included a digital oscilloscope with two channels that have 1-MHz bandwidth, 8 bits of resolution, and 401 words of memory per channel. There are 10 amplitude scales from 5 mV to 5 V per division and 18 timescales from 5 μs to 2.5 s per division. Note that there are four working modes: Auto, Normal, Single, and Roll.The logic analyzer has eight channels, 1920 words of memory per channel, and sampling from 1 to 100 kS/s. It is trigger-delay selectable between 0, 50, and 100% of memory length.

Looking at Photo 1, you see that the system’s hardware consists of two separate boards that are attached to each other. Photo 2a shows the tops of the boards, and Photo 2b shows the bottoms.

a—You can replace the relays in the coupling section and the driver circuit with solid-state relays if you can find ones with low leakage current. b—The op-amp’s SMD packages are best viewed from the bottom. The larger board is populated on both sides. Note the importance of the parasitic coupling of the PWM D/A outputs to the input of the amplifiers.

Photo 2: a—You can replace the relays in the coupling section and the driver circuit with solid-state relays if you can find ones with low leakage current. b—The op-amp’s SMD packages are best viewed from the bottom. The larger board is populated on both sides. Note the importance of the parasitic coupling of the PWM D/A outputs to the input of the amplifiers.

The larger board contains the oscilloscope analog chain: BNC connectors, relays (and circuit controller) for DC-GND-AC in the coupling section, and the digital programmable attenuator/amplifier. The top board contains the DC/DC converter power supply, charge-pump inverter, serial communication driver, low-pass filter, trigger (real and equivalent time sampling) circuit, channel-trigger selector, and the microcontroller.

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Electrical Engineering Challenge: September Winners (Sponsored by NetBurner)

The answer to the September Electrical Engineering Challenge is now live. Congratulations to the winners: John Barraclough (United Kingdom) and Pieter Willemsen (Belgium).

The error is in line 28. There needs to be a second open parenthesis.

The next Challenge launches on October 1, 2015. Good luck!

Two Sensors Get the Bigger Picture: High-Performance Smart Cameras for OEM Applications

Featuring a very compact footprint as well as excellent usability, Vision Components VCSBCnano Z-RH-2 series embedded cameras enable high-speed image processing in real time. The ultra-small products are available for cost-sensitive OEM applications where installation space is limited. The smart cameras are equipped with a Xilinx ZYNQ dual-core Cortex A9 ARM processor clocked at 2 × 866 MHz, which comes with an integrated FPGA running the VC Linux operating system. The miniature board dimensions of 40 × 65 mm for the main board and 24 × 18 mm for the sensor boards combined with custom installation and connection options facilitate a flexible integration into industrial or other applications (e.g., high-speed and line camera applications).Vision Components - pinguin

Two external sensor boards connected to the CPU board via 30 mm or 80 mm ribbon cables (other lengths on request) enable stereo vision applications. Vision Components also provides models with an on-board sensor or single external sensor to give users maximum flexibility for machine or robot integration.

All VCSBCnano Z-RH-2 cameras feature 12 programmable inputs and outputs, an optically isolated trigger output, a flash trigger, Gbit Ethernet interface, RS-232 interface, and I²C interface. They are available with five different CMOS sensors with a global shutter that provide resolutions up to 4.2 Megapixels. An optional IP67 case, either with or without integrated optics and lighting, ensures protection in harsh environments. For users seeking to fully exploit the performance potential of the hardware, Vision Components also offers an FPGA programming service which can accelerate processing speeds many times over. Like all VC cameras, VCSBCnano Z series cameras come complete with the free-of-charge VCLib software library, which provides over 300 basic industrial image processing functions such as pattern matching.

Source: Vision Components

Fast 600-V Gate Driver Reduces System-Solution Size for MOSFETs and IGBTs

Texas Instruments recently introduced the UCC27714 half-bridge gate driver for discrete power MOSFETs and IGBTs that operate up to 600 V. With 4-A source and 4-A sink current capability, the UCC27714 reduces component footprint by 50%. In addition, it provides 90-ns propagation delay, 40% lower than existing silicon solutions, tight control of the propagation delay with a maximum of 125 ns across –40°C to 125°C and tight channel-to-channel delay matching of 20 ns across –40°C to 125°C.  The device eliminates the need for bulky gate drive transformers, saving significant board space in high-frequency switch-mode power electronics.TI-gatedriver

Key features and benefits include:

  • Smaller footprint creates highest power-density solutions
  • Advanced noise toleration
  • MOSFETs have the ability to drive over a wide power range
  • Operates across wide temperatures

The UCC27714 is now available. The high-speed 600-V, high-side low-side gate driver costs $1.75 in 1,000-unit quantities.

Source: Texas Instruments

RF Chip Family Enables Secure, Long-Range Smart Car Communication

NXP Semiconductors has announced the new Mantra RF family of high-performance transceivers and receivers for secure car access and vehicle management. The chip family offers a long-range (several hundred meters), two-way RF link for bidirectional communication between a key fob and car. NXP_CarKeyChip

Keys with Mantra enable you to remotely check your vehicle’s fuel, battery levels, and maintenance data. In addition, you can check if the doors and windows are locked, as well remotely operate your vehicle’s locks, ignition, and temperature. Furthermore, the Mantra family provides strong security and authentication features to prevent unauthorized access.

The Mantra RF family’s features include:

  • Multichannel transceiver and receiver solutions
  • Single IC for bands (315, 345, 426, 434, 447, 868, 915, and 950 MHz)
  • Simultaneous reception of up to three channels in parallel
  • Two RF inputs allowing sequential antenna diversity
  • Low receiver power consumption
  • Flexible customization at ultra-low power with the programmable microcontroller core
  • High-performance, low-noise front end

Source: NXP Semiconductors

The Future of Commodity Hardware Security and Your Data

The emergence of the smartphone industry has enabled the commodity hardware market to expand at an astonishing rate. Providers are creating cheap, compact, and widely compatible hardware, which bring about underestimated and unexplored security vulnerabilities. Often, this hardware is coupled with back end and front end software designed to handle data-sensitive applications such as mobile point-of-sale, home security, and health and fitness, among others. Given the personal data passed through these hardware devices and the infancy of much of the market, potential security holes are a unique and growing concern. Hardware providers face many challenges when dealing with these security vulnerabilities, foremost among them being distribution and consequent deprecation issues, and the battle of cost versus security.

The encryption chip for the Square Reader, a commodity hardware device, is located in the bottom right hand corner instead of on the magnetic head. This drastically reduces the cost of the device.

The encryption chip for the Square Reader, a commodity hardware device, is located in the bottom right hand corner instead of on the magnetic head. This drastically reduces the cost of the device.

An important part of designing a hardware device is being prepared for a straightforward hardware deprecation. However, this can be a thorn in a provider’s side, especially when dealing with widespread production. These companies create on the order of millions of copies of each revision of their hardware. If the hardware has a critical security vulnerability post-distribution, the provider must develop a way to not only deprecate the revision, but also fix the problem and distribute the fix to their customers. A hardware security vulnerability can be very detrimental to companies unless a clever solution through companion software is possible to patch the issue and avoid a hardware recall. In lieu of this, products may require a full recall, which can be messy and ineffective unless the provider has a way to prevent future, malicious use of the insecure previous revision.

Many hardware providers have begun opting out of conventional product payments and have instead turned to subscription or use-based payments. Hence, the provider may charge low prices for the actual hardware, but still maintain high yields, typically through back end or front end companion software. For example, Arlo creates a home security camera with a feature that allows users to save videos through their cloud service and view the videos on their smartphone. The price of the camera (their hardware) is mid-range when measured against their competitors, but they charge a monthly fee for extra cloud storage. This enables Arlo to have a continual source of income beyond their hardware product. The hardware can be seen as a hook to a more stable source of income, so long as consumers continue to use their products. For this reason, it is critical that providers minimize costs of their hardware, even down to a single dollar—especially given their large-scale production. Unfortunately, the cost of the hardware is typically directly related to the security of the system. For example, a recent vulnerability found by me and my colleagues in the latest model Square Reader is the ability to convert the Reader to a credit card skimmer via a hardware encryption bypass. This vulnerability was possible due to the placement of the encryption chip on a ribbon cable offset from the magnetic head. If the encryption chip and magnetic head had been mounted to the Reader as an assembly, the attack would not have been possible. However, there is a drastic difference in the cost, on the order of several dollars per part, and therefore security was sacrificed for the bottom line. This is the kind of challenging decision every hardware company has to make in order to meet their business metrics, and often it can be difficult to find a middle ground where security is not sacrificed for expense.

New commodity hardware will continue to integrate into our personal lives and personal data as it becomes cheaper, more compact, and universally compatible. For these reasons, commodity hardware continues to present undetermined and intriguing security vulnerabilities. Concurrently, hardware providers confront these demanding security challenges unique to their industry. They face design issues for proper hardware deprecation due to massive distribution, and they play a constant tug-of-war between cost constraints and security, which typically ends with a less secure device. These potential security holes will remain a concern so long as the smartphone industry and commodity hardware market advance.

Alexandrea Mellen is the founder and chief developer at Terrapin Computing, LLC, which makes mobile applications. She presented as a briefing speaker at Black Hat USA 2015 (“Mobile Point of Scam: Attacking the Square Reader”). She also works in engineering sales at The Mellen Company, which manufactures and designs high-temperature lab furnaces. She has previously worked at New Valence Robotics, a 3-D printing company, as well as The Dorm Room Fund, a student-run venture firm. She holds a BS in Computer Engineering from Boston University. During her undergraduate years, she completed research on liquid metal batteries at MIT with Group Sadoway. See for more information.

USB Type-C with Texas Instruments TUSB320 CC Logic and Port Controllers from Mouser

Mouser Electronics is now stocking the Texas Instruments TUSB320 family of USB Type-C configuration channel logic and port controllers from Texas Instruments (TI). The TUSB320 family of devices provide USB Type-C configuration channel (CC) logic and port control, making it possible for a system to detect the orientation of the plug, and determine the appropriate USB specification and mode settings for the end equipment.Mouser TUSB320

The TI TUSB320 devices, available from Mouser Electronics, can be configured as a downstream-facing port (DFP), upstream-facing port (UFP), or a dual-role port (DRP). The family of products supports USB 2.0 and USB 3.1, giving designers the flexibility to use these devices in multiple USB-enabled designs. The TUSB320 family also contains several features (such as mode configuration and low standby current), which make this device applicable for source or sinks in USB 2.0 applications. The device operates over a wide supply range (2.7Vbus – 5.5Vbus) and offers low power consumption; its low shutdown power of 8 mW benefits a variety of battery-powered applications.
The TUSB320 family of devices offers I2C or GPIO control, an industrial temperature range of -40 to +85 degrees Celsius, and support for up to 3A advertisement and detection. The devices can be used for host, device, and dual-role port applications in mobile phones, tablets, and USB peripherals.

The TUSB320EVM, also available from Mouser Electronics, provides an evaluation platform for the TUSB320 device. This plug-and-play module is configurable via onboard DIP switches for DFP, UFP, or DRP implementations, operating in I2C or GPIO mode.

Source: Mouser

Infineon Digitizes power for Energy-Efficient LEDs

Infineon Technologies recently announced that it developed a digital platform for power supply with which LED lighting systems can be controlled intelligently, thus making maximum energy savings possible. According to Infineon, with .dp digital power 2.0, development time can be reduced by up to 70%. The ICL8105 and ILD2111 controllers are the two new members of the platform. Infineon-ICL8105

The ICL8105 is a digitally configurable flyback controller with Power Factor Correction (PFC) for constant power LED drivers from 10 to 80 W. Since only a few external components are required, a cost reduction of up to 10% is possible. The controller has powerful algorithms and supports multiple operating modes. Advantages are a high efficiency and power factor correction plus low distortion. This produces a high quality of light with no flickering. The controller has an input for 0 to 10 V dimming; there is no need for an oscillator including power supply. An active burst mode significantly extends the dimming range, while preventing undesirable effects such as flickering or shimmering. To protect the LED driver in case of overtemperature, the ICL8105 automatically reduces the output current in case of overload.

The ILD2111 is a digitally configurable buck controller that’s designed as a constant current source with output current control (backlash) for LED drivers in the range from 10 to 150 W. Thus, the regulator addresses diverse commercial LED applications. Like the ICL8105, the ILD2111 requires only a few external components. The output current can be set easily and accurately by a resistor, and is also compatible with the LEDset interface. The IC provides flicker-free PWM dimming down to 1%. The component automatically selects an operating window in order to optimally regulate different loads, depending on the switching frequency and the ripple of the output current. The output voltage is specified with 15 to 55 VDC. User-configurable features protect the component at undervoltage and overvoltage, short circuits, overcurrent or high temperatures.

Both the ICL8105 and the ILD2111 are available as samples and can be ordered in high volume. Development boards, the .dp Interface Board and the .dp Vision GUI software are offered for both controllers.

Source: Infineon Technologies




Dialog to Buy at Atmel for $4.6 Billion

Dialog Semiconductor and Atmel Corp. recently announced Dialog will acquire Atmel in a cash and stock transaction for approximately $4.6 billion. According to reports, the deal will likely close in the first quarter of 2016.

The transaction—which has been unanimously approved by the boards of directors of both companies and is subject to regulatory approvals in various jurisdictions, as well as the approval of Dialog and Atmel shareholders—will likely close in Q1 2016. Jalal Bagherli will continue as Chief Executive Officer and Executive Board Director of Dialog.

Evaluation Boards for SuperSpeed USB-to-FIFO Bridge ICs

FTDI recently launched a new family of evaluation/development modules to encourage the implementation of its next-generation USB interfacing technology. Its FT600/1Q USB 3.0 SuperSpeed ICs are in volume production and backed up by the UMFT60XX offering. The family comprises four models that provide different FIFO bus interfaces and data bit widths. With these modules, the operational parameters of FT600/1Q devices can be fully assessed and interfacing with external hardware undertaken, such as FPGA platforms.

At 78.7 mm × 60 mm, the UMFT600A and UMFT601A each have a high-speed mezzanine card (HSMC) interface with 16-bit-wide and 32-bit-wide FIFO buses, respectively. The UMFT600X and UMFT601X measure 70 mm × 60 mm and incorporate field-programmable mezzanine card (FMC) connectors with 16-bit-wide and 32-bit-wide FIFO buses, respectively.

The HSMC interface is compatible with most Altera FPGA reference design boards, while the FMC connector delivers the same functionality in relation to Xilinx boards. Fully compatible with USB 3.0 SuperSpeed (5 Gbps), USB 2.0 High Speed (480 Mbips), and USB 2.0 Full Speed (12 Mbps) data transfer, the UMFT60xx modules support two parallel slave FIFO bus protocols with an achievable data burst rate of around 400 MBps. The multi-channel FIFO mode can handle up to four logic channels. It is complemented by the 245 synchronous FIFO mode, which is optimized for more straightforward operation.

Source: FTDI

Issue 302: EQ Answers

Problem 1: You have decided to build a small computer from discrete transistors as a demonstration. After researching the available technologies, you have decided to base your design on NMOS logic, using a 3-input NOR gate as your basic building block, as shown below.eq0673_fig1

Each gate uses three 2N7000 N-channel MOSFETs as pulldown transistors, and a 10K resistor as a passive pullup. You figure that you’ll need somewhere between 500 and 1000 of these gates to build a useful computer — after all, the original PDP-8 12-bit minicomputer CPU was built with only about 519 gates.

Approximately how fast will you be able to clock this computer?

Answer 1: The timing will depend primarily on the capacitive load on each logic gate, which would include both the wiring capacitance and the capacitance of the MOSFET gate(s) you’re driving.

For example, the 2N7000 has an input capacitance of 20 pF typical (50 pF max). If your average fanout is 3, plus some wiring capacitance, that gives you a typical load of 100 – 200 pF. With a 10K pullup, that gives you an R-C time constant of 1 – 2 µs. You’d probably need to allow at least two time constants for one “gate delay” for reliable switching, so we’re talking about 2 – 4 µs per gate.

To get useful work done, you’ll need to allow some maximum number of gate delays per clock period. This will depend on your specific design, but a number like 6 to 10 would be typical. So now we’re talking about a clock period of 12 – 40 µs, or frequencies in the range of 25 – 80 kHz.

Switching to a 1K pullup resistor would allow the frequency to scale up by roughly a factor of 10.

Problem 2: Assuming a supply voltage of 5V, about how much power would you expect this computer to consume?

Answer 2: You can assume that roughly half of the gates will be active (outputs low) at any given moment, with current passing through their pullup resistors. Each resistor passes 5V / 10K = 0.5mA, and if there are 1000 gates, this represents an worst-caxse current of 0.5A, giving a power consumption of 5V × 0.5A = 2.5W. If only about half the gates are active, then the average power will be about 1.25W.

Switching to a 1K pullup resistor will raise this average static power consumption to roughly 12.5W (5A, or 25W, worst-case).

Problem 3: How many 3-input gates does it take to construct a edge-triggered (master-slave) D flip-flop?

Answer 3: Six 3-input NOR gates can be used to build a master-slave D flip-flop.eq0673_fig2

Note that the active edge of the clock is the falling edge.

Problem 4: What famous computer was built using NOR gates exclusively for the logic?

Answer 4: The original Cray-1 supercomputer was constructed using a single type of IC for the logic that contained one 4-input and one 5-input NOR gate. This IC used ECL (emitter-coupled logic) technology and the machine ran with a cycle time of 12.5 ns (80 MHz). About 200,000 gates were required to implement the CPU.

Contributor: David Tweed

Issue 300: EQ Answers

Problem 1: The diagram below is a simplified illustration of a switchmode “buck” DC-DC converter with synchronous (active) rectification. The switching elements are shown as MOSFETs, with the associated body diodes drawn explicitly. The details associated with driving the MOSFET gates are ignored, other than to say that when one is on, the other is off, and the duty cycle is variable.eq0672_img1

This is, by definition, a CCM (continuous conduction mode) converter. What does this tell us about the relationship between VA, VB and the duty cycle of the switching?

Answer 1: In normal operation, M2 is switched on first, and current flows through it and L1, charging the inductor with magnetic energy. When M2 switches off and M1 switches on, the current continues to flow through L1, discharging its stored energy.

Now, if M1 weren’t there, the circuit would still work, because the discharge current would still flow through D1. However, once L1’s current drops to zero, the diode would block any further flow — this is known as “discontinuous conduction mode”. Whereas, with M1 present, the current flow can actually reverse. In other words, with active (synchronous) rectification, the converter can both source and sink current at its output. This is known as “continuous conduction mode”. This means that the relationship between the input voltage VA and the output voltage VB is only a function of the duty cycle of the switching:eq300 equation


Problem 2: Can the output of such a converter sink as well as source current? If so, where does the current go?

Answer 2: Yes, as mentioned above, it can indeed sink current. When the current in L1 goes negative, the current flows through M1 to ground as long as M1 is on. But when M1 switches off and M2 switches on, this forces current back toward VA and C2, until the voltage across L1 causes the current to ramp back up to zero and then positive again.

Problem 3: Draw a similar diagram for a switchmode “boost” DC-DC converter with synchronous rectification. What interesting thing can you say about the two diagrams?

Answer 3: Here is the corresponding diagram for a “boost” converter:eq0672_img2

In normal operation, M1 switches on first, charging L1 with magnetic energy. Then, M1 switches off and M2 switches on, allowing the stored energy to discharge into C2.

The remarkable thing about this diagram is that it is an exact mirror image of the buck converter!

Question 4: Based on the answers to the previous questions, what can you say about the direction of power flow through this type of converter?

Answer 4: Again, with the boost converter, we could eliminate M2 and allow D2 to do the output switching, but M2 allows current to flow either way during the discharge phase. And just like with the buck converter, this means that the input-output voltage relationship becomes a function of only the switching duty cycle:eq300 equation2

Note that this is a simple rearrangement of the terms in the equation for the buck converter — in other words, it’s the same equation. This tells us that regardless of which way the power is flowing, the relationship between VA and VB is simply a function of the switching duty cycle.

So, to turn this into a concrete example, if the PWM control is set up so that M2 is on 5/12 = 42% of the time, you could apply 12V at VA and get 5V out at VB, OR you could apply 5V at VB and get 12V out at VA!

One final note about regulation: This circuit provides a specific ratiometric relationship between the two voltages that is based on the duty cycle of the switching. If the input voltage is unregulated, but you want a regulated output voltage, then you need to provide a mechanism that varies the duty cycle of the switch in order to cancel out the input variations. Note that this control could be based on measuring the input voltage directly (feedforward control) or measuring the output voltage (feedback control).

If you’re going to build a practical bidirectional power converter with regulation, you’ll have to pay extra attention to how this control mechanism works in both modes of operation.

Contributor: David Tweed

Issue 298: EQ Answers

Problem 1: What do we call a network of gates that has no feedback of any kind? What is its key characteristic?

Answer 1: A network of gates that has no feedback is called “combinatorial logic”, or sometimes “combinational logic”. Its defining characteristic is that the output of the network is strictly a function of the current input values; the past history of the inputs has no effect. The branch of mathematics associated with this is called “combinatorics”, and we say that the output is the result of logical combinations of the input values.

Problem 2: What do we call a network of gates that has negative feedback? Give an example.

Answer 2: If a network of gates has “negative” feedback, it means that an output is fed back to an input in such a way that it always causes that output to change state again. When this occurs, the output never achieves a stable state. We call this an “oscillator.”

The simplest example is the “ring oscillator,” which simply comprises an odd number of inverters, each with its output connected to the input of the next. When any output changes state, the change propagates all the way around through the chain and forces it back to the opposite state.

Note that a single inverter fed back to itself will not usually oscillate. Because the propagation delay is comparable to the transition time, the output will usually just settle at an intermediate analog value, rather than any valid digital value.

Problem 3: What do we call a network of gates that has positive feedback? Give an example of the simplest possible such network (there are several).

Answer 3: A network of gates with positive feedback becomes an asynchronous state machine (ASM). The network’s output becomes a function of both its current input values and the past history of the input values — in other words, the network can be said to have a “memory” of its past.

The simplest possible examples include a single AND gate or a single OR gate. An AND gate with one input tied to its output has two output states, 0 and 1. If the other input has at any time in the past been driven to 0, then the output will be 0; otherwise it will be 1.

Similarly, the output of an OR gate with one input tied to its output will be 1 if the other input has ever been driven to 1.

The simplest ASM that is of practical use in most applications is the set-reset latch, which requires two gates that each have an input from the output of the other. They can comprise one AND gate and one OR gate, or a pair of NAND gates or a pair of NOR gates. This type of ASM can be used to store one bit of information, and is a type of flip-flop. Another (very old) term is “bistable multivibrator.”

Problem: Why are NAND gates and NOR gates considered to be “universal” gates? Why is this important?

Answer 4: It can be shown that any logical function can be created from a network of only NAND gates, or of only NOR gates. This includes ASMs such as the two-NAND or two-NOR flip-flop described above.

This is important because many of the basic technologies for creating digital gates tend to require that each gate be implicitly inverting. In other words, a 1 on an input can only force a 0 at the output, and vice-versa.

Examples include RTL (resistor-transistor logic), which is based on NOR gates, and DTL (diode-transistor logic) or TTL (transistor-transistor logic), which are based on NAND gates.

This is particularly true of CMOS, the most popular implementation technology in current use. Any network of N-channel pull-down transistors and P-channel pull-up transistors can only invert an input signal. The big advantage of CMOS is that NAND and NOR gates can be combined with equal ease.

Contributor: David Tweed

Electrical Engineering Crossword (Issue 303)

The answers to Circuit Cellar’s October 2015 electrical engineering crossword puzzle are now available.303 crossword grid (key)


  1. QUANTA—Discrete particlesThe
  3. DIFFRACTION—Bending of energy waves
  4. BINARY—Offs and ons
  5. GANGED—Physically coupled to work in unison
  6. TETRODE—Vacuum tube with a plate, control grid, screen grid, and cathode
  7. INDUCTOR—Coil
  9. POLE—Point of maximum electrical polarity
  10. FLOWCHART—Depicts a sequence of operations


  1. PASCAL—1 newton/cm2
  2. PROPAGATION—Dissemination of energy
  3. FEMTO—One quadrillionth
  4. NICAD—Rechargeable battery
  5. ANGSTROM—10–4 micrometer
  6. RECTIFIER—Diode used to convert AC to DC
  7. PARITY—Equal to
  8. HARDWIRED—Soldered permanently
  9. DEMODULATOR—Circuit that extracts modulations from an RF signal
  10. ANTIPHASE—180° out of phase

Electrical Engineering Crossword (Issue 302)

The answers to Circuit Cellar’s September 2015 electrical engineering crossword puzzle are now available.

Across302 puzzle (key)

  1. DAMP—Decrease amplitude
  2. LUX—Light intensity
  3. PLANCK—Quantum theory
  4. ASIMOV—The Great Explainer
  5. CAPACITOR—Leyden jar
  6. GALVANOMETER—Measures small electrical currents by means of deflecting magnetic coils
  7. FERROUS—Metal containing iron
  8. IBM—Big Blue
  10. SPEEDOFLIGHT—˜3.00×10 super 8 m/s


  3. LORENTZFORCE—F = qE + qv × B
  4. PACKET—Chunk of data
  5. APPLE—Introduced the LISA computer in 1983
  6. PETABYTE—1 quadrillion bytes
  7. VHF—Range = 30 and 300 MH
  8. CRC—Error-detecting code
  9. BAT—Batch file
  10. TQFP—Thinner than QFP