Low-Power, High-Efficiency Boost Regulator

The TS3300 is an ultra-low-power, load-independent, high-efficiency boost regulator. It operates from supply voltages as low as 0.6 up to 4.5 V and can deliver at least 75 mA of continuous output current.

The TS3300 can be powered from a variety of power sources including single- or multiple-cell alkaline or single Li-chemistry batteries. The boost regulator’s output voltage range can be user-specified from 1.8 to 5.25 V to simultaneously power a range of low-power analog circuits, microcontrollers, and low-energy Bluetooth radios. The TS3300 produces a 3-V output from a 1.2-V input source. Its efficiency performance is constant over a 100:1 span in output current. To power low-energy radios, the TS3300’s internal, low-dropout linear regulator can deliver up to 100 mA output current while reducing boost-converter-generated output voltage ripple.

Drawing only 3.5 µA no-load supply current, the TS3300 is ideal for “always on” and other battery-powered or portable applications where an extended battery run-time is required. The TS3300 operates from low power sources (e.g., photovoltaic cells to three alkaline cells) and is ideally suited for handheld/portable applications (e.g., wireless remote sensors, RFID tags, wireless microphones, solar cell post-regulator/chargers, post-regulators for energy harvesting, blood glucose meters, and personal health-monitoring devices).

The TS3300 is fully specified over the –40°C-to-85°C temperature range and is available in a low-profile, thermally-enhanced 16-pin 3mm × 3mm TQFN package with an exposed backside paddle. The TS3300 costs $0.85 in 1,000-unit quantities.

Touchstone Semiconductor
http://touchstonesemi.com

Accurate Measurement Power Analyzer

The PA4000 power analyzer provides accurate power measurements. It offers one to four input modules, built-in test modes, and standard PC interfaces.

The analyzer features innovative Spiral Shunt technology that enables you to lock onto complex signals. The Spiral Shunt design ensures stable, linear response over a range of input current levels, ambient temperatures, crest factors, and other variables. The spiral construction minimizes stray inductance (for optimum high-frequency performance) and provides high overload capability and improved thermal stability.

The PA4000’s additional features include 0.04% basic voltage and current accuracy, dual internal current shunts for optimal resolution, frequency detection algorithms for noisy waveform tracking, application-specific test modes to simplify setup. The analyzer  easily exports data to a USB flash drive or PC software. Harmonic analysis and communications ports are included as standard features.

Contact Tektronix for pricing.

Tektronix, Inc.
www.tek.com

The Future of Very Large-Scale Integration (VLSI) Technology

The historical growth of IC computing power has profoundly changed the way we create, process, communicate, and store information. The engine of this phenomenal growth is the ability to shrink transistor dimensions every few years. This trend, known as Moore’s law, has continued for the past 50 years. The predicted demise of Moore’s law has been repeatedly proven wrong thanks to technological breakthroughs (e.g., optical resolution enhancement techniques, high-k metal gates, multi-gate transistors, fully depleted ultra-thin body technology, and 3-D wafer stacking). However, it is projected that in one or two decades, transistor dimensions will reach a point where it will become uneconomical to shrink them any further, which will eventually result in the end of the CMOS scaling roadmap. This essay discusses the potential and limitations of several post-CMOS candidates currently being pursued by the device community.

Steep transistors: The ability to scale a transistor’s supply voltage is determined by the minimum voltage required to switch the device between an on- and an off-state. The sub-threshold slope (SS) is the measure used to indicate this property. For instance, a smaller SS means the transistor can be turned on using a smaller supply voltage while meeting the same off current. For MOSFETs, the SS has to be greater than ln(10) × kT/q where k is the Boltzmann constant, T is the absolute temperature, and q is the electron charge. This fundamental constraint arises from the thermionic nature of the MOSFET conduction mechanism and leads to a fundamental power/performance tradeoff, which could be overcome if SS values significantly lower than the theoretical 60-mV/decade limit could be achieved. Many device types have been proposed that could produce steep SS values, including tunneling field-effect transistors (TFETs), nanoelectromechanical system (NEMS) devices, ferroelectric-gate FETs, and impact ionization MOSFETs. Several recent papers have reported experimental observation of SS values in TFETs as low as 40 mV/decade at room temperature. These so-called “steep” devices’ main limitations are their low mobility, asymmetric drive current, bias dependent SS, and larger statistical variations in comparison to traditional MOSFETs.

Spin devices: Spintronics is a technology that utilizes nano magnets’ spin direction as the state variable. Spintronics has unique properties over CMOS, including nonvolatility, lower device count, and the potential for non-Boolean computing architectures. Spintronics devices’ nonvolatility enables instant processor wake-up and power-down that could dramatically reduce the static power consumption. Furthermore, it can enable novel processor-in-memory or logic-in-memory architectures that are not possible with silicon technology. Although in its infancy, research in spintronics has been gaining momentum over the past decade, as these devices could potentially overcome the power bottleneck of CMOS scaling by offering a completely new computing paradigm. In recent years, progress has been made toward demonstration of various post-CMOS spintronic devices including all-spin logic, spin wave devices, domain wall magnets for logic applications, and spin transfer torque magnetoresistive RAM (STT-MRAM) and spin-Hall torque (SHT) MRAM for memory applications. However, for spintronics technology to become a viable post-CMOS device platform, researchers must find ways to eliminate the transistors required to drive the clock and power supply signals. Otherwise, the performance will always be limited by CMOS technology. Other remaining challenges for spintronics devices include their relatively high active power, short interconnect distance, and complex fabrication process.

Flexible electronics: Distributed large area (cm2-to-m2) electronic systems based on flexible thin-film-transistor (TFT) technology are drawing much attention due to unique properties such as mechanical conformability, low temperature processability, large area coverage, and low fabrication costs. Various forms of flexible TFTs can either enable applications that were not achievable using traditional silicon based technology, or surpass them in terms of cost per area. Flexible electronics cannot match the performance of silicon-based ICs due to the low carrier mobility. Instead, this technology is meant to complement them by enabling distributed sensor systems over a large area with moderate performance (less than 1 MHz). Development of inkjet or roll-to-roll printing techniques for flexible TFTs is underway for low-cost manufacturing, making product-level implementations feasible. Despite these encouraging new developments, the low mobility and high sensitivity to processing parameters present major fabrication challenges for realizing flexible electronic systems.

CMOS scaling is coming to an end, but no single technology has emerged as a clear successor to silicon. The urgent need for post-CMOS alternatives will continue to drive high-risk, high-payoff research on novel device technologies. Replicating silicon’s success might sound like a pipe dream. But with the world’s best and brightest minds at work, we have reasons to be optimistic.

Author’s Note: I’d like to acknowledge the work of PhD students Ayan Paul and Jongyeon Kim.