Bipolar Transistor Biasing

Going back to the basics is never a bad idea. Many electronics engineers are fluent with complex systems—such as microcontrollers, embedded OSes, or FPGAs—but seem to have more difficulties with single transistors. What a shame! A transistor can be a more adequate and cost-effective solution than an IC in many projects. Moreover, understanding what’s going on with simple parts can’t hurt, and transistors can even be fun! That’s why this month I will provide a refresher on how to use a one-cent bipolar junction transistor (BJT) to build an amplifier.

OUR FRIEND, THE TRANSISTOR

The BJT is an old invention. In 1947, it was discovered at the Bell Laboratories by Walter H. Brattain and John Bardeen, who were on William Shockley’s team. The BJT comes in two flavors, NPN and PNP. For simplicity, I will focus on the NPN version. However, by reversing the power supply rails, everything would be applicable to its PNP cousin. BJT transistors have three terminals: collector (C), emitter (E), and base (B). Due to their internal semiconductor structure, the currents circulating through each of these terminals, as well as the voltages between them, are all linked together.

Let’s focus on the basic “common emitter” circuit (see Figure 1). With this setting, the emitter is grounded. There are two basic rules.

Figure 1 This NPN bipolar junction transistor is wired in the common-emitter configuration, meaning its emitter is grounded. Two basic equations dictate its behavior.

Figure 1
This NPN bipolar junction transistor is wired in the common-emitter configuration, meaning its emitter is grounded. Two basic equations dictate its behavior.

First, the current circulating through the collector is roughly proportional to the current applied on the base. Their ratio is the transistor current gain, which is indicated in the transistor’s datasheet and often noted ßF or HFE:Eq1 lacoste

Second, the voltage between the base and the emitter is stable and close to 0.6 V for more devices, as with any bipolar diode:Eq2 lacoste

Here’s how it works: If the voltage applied between the base and the emitter is lower than this threshold, then the transistor is blocked and no current circulates through the collector. If this voltage is increased to the threshold, then the transistor becomes active. You will not be able to increase the base voltage significantly above 0.6 V and the device will start to be current-controlled. In this mode, a given current will circulate through the base. The current through the collector will always be HFE times higher.

For example, if you have a transistor with a gain of 100 and inject 1 mA in the base, then 100 mA will flow through the collector. Of course, this is an approximate explanation, as the transistor’s physics are a little more complex, but is enough for my example. (Search for “Ebers-Moll model” online if you are interested in the details. Wikipedia also provides a good BJT summary.)

The examples in this article are based on the old faithful Fairchild Semiconductor BC238B transistor, but you could use any common NPN transistor (e.g., the ubiquitous 2N2222, the 2N3904, or the BC847 if you prefer surface-mount packages). Figure 2 shows a reproduction of the BC238B’s key characteristics from its datasheet. Figure 2a shows you the relationship between the voltage between the collector and the emitter (VCE) and the current through the collector (IC). Each curve corresponds to a given base current (IB). Look for an example at the curve for IB = 200 µA. As soon as the VCE voltage is above a couple of volts, the current circulating through the collector is nearly constant, around 50 mA. This means this specific transistor’s current gain is 50 mA divided by 200 µA, which is 250. Figure 2b shows the base voltage VBE. It is not strictly constant, but still close to 0.6 V, as explained.

Figure 2 These Fairchild Semiconductor BC238B NPN transistor’s key characteristics have been extracted from its datasheet.

Figure 2
These Fairchild Semiconductor BC238B NPN transistor’s key characteristics have been extracted from its datasheet.

A final but important point about BJT characteristics: Their current gain is far from precise. First, there is a huge dispersion on the current gain from transistor to transistor, even from the same manufacturing batch. Second, this gain will change with the transistor operating conditions and with the junction temperature in particular. Table 1 shows the specified gain for the BC238 family. It can range from 180 to 460 for the BC238B variant! The designer must take this difficulty into consideration.

Table 1 The Fairchild Semiconductor BC238 exists in three gain classes, indicated by an A, B, or C suffix. Even in a single class, the gain dispersion from part to part could be huge.

Table 1
The Fairchild Semiconductor BC238 exists in three gain classes, indicated by an A, B, or C suffix. Even in a single class, the gain dispersion from part to part could be huge.

BASIC BIASING

Simulating a transistor is straightforward using a linear circuit simulator (e.g., SPICE), even if you prefer to wire it. I used Labcenter Electronics’s Proteus VSM in my example, but you can use any SPICE tool (e.g., Linear Technology’s free LTSpice) or an online version (e.g., CircuitLab, PartSim, etc.).

Figure 3 shows a basic circuit built around a BC238B. I connected the collector to a 10-VDC power source through a 1-kΩ resistor and used a 1-MΩ resistor between the transistor’s base and the 10-V power supply. The voltage applied on the base is above the 0.6-V threshold so the transistor will conduct. As discussed, the base voltage will stay close to the 0.6-V threshold (in fact, its simulated value is 0.66 V). The current circulating through the base could then be easily calculated by Ohm’s law applied on the base resistor: I = U/R = (10 – 0.66 V)/1 MΩ = 9.34 µA. You can then calculate the current circulating through the collector by multiplying this value by the transistor’s current gain, or the simulator can calculate it for you.

Figure 3 On this simulation, the current circulating through the collector is 310 × higher than the current through the base. As expected, the base voltage stays close to 0.6 V.

Figure 3
On this simulation, the current circulating through the collector is 310 × higher than the current through the base. As expected, the base voltage stays close to 0.6 V.

Take another look at Figure 3. The calculated collector current is 2.9 mA, which is 310 times higher than the base current. The BC238B model used by my SPICE variant seems to have a 310 gain. Consequently, the voltage drop across the collector resistor is U = R × I = 1 kΩ × 2.9 mA = 2.9 V. As the power supply voltage is 10 V, the voltage between the transistor’s collector and the ground should be 7.1 V (i.e., 10 – 2.9 V), as simulated.

Now imagine you want to use this BC238B transistor to build an AC signal amplifier (e.g., a small audio amplifier). Start with the schematic shown in Figure 3 and add the input AC signal on the transistor’s base. This input signal will periodically increase or decrease the current already applied on the base by the 1-MΩ resistor. These fluctuations will be amplified by the transistor’s current gain. Consequently, the collector voltage will fluctuate more than the input and you will have a working amplifier.

How can you design it? The first step is to define the so-called “transistor quiescent point” (i.e., you should first define the transistor’s behavior without an applied input signal). You will usually start by defining the collector resistor’s value based on the desired output impedance. Then you will need to calculate the resistor between the base and the power supply rail to set the transistor output to your desired DC value.

The rule is simple. For minimum distortion and clipping, you need to set the DC output voltage to half the supply voltage. In Figure 3, I used a 1-MΩ base resistor and found 7.1 V on the output (10 V/2 = 5 V would be preferable). Reducing the base resistor’s value will increase the base current, which will then reduce the mean output voltage (see Figure 4). This simulation shows that a base resistor close to 560 kΩ provides an average voltage on the output of 5 V, which is what we were looking for. The standby current through the collector is I = U/R = 5 V/1 kΩ = 5 mA.

Figure 4 This simulation shows the collector-to-emitter voltage (green) and base current (red) when the base resistor value changes. There is an intermediate value, close to 560 kΩ, where the collector-to-emitter voltage is close to VCC/2, which is 5 V.

Figure 4
This simulation shows the collector-to-emitter voltage (green) and base current (red) when the base resistor value changes. There is an intermediate value, close to 560 kΩ, where the collector-to-emitter voltage is close to VCC/2, which is 5 V.

Now you have a correctly DC-biased transistor and you just have to inject the signal input on the base through a decoupling capacitor and extract the collector’s output signal through another decoupling capacitor (see Figure 5). The value of these capacitors are directly linked to the lowest frequency you want to amplify. You can either calculate it (remembering that a capacitor’s impedance is Z = 1/2πfC) or simulate it.

Figure 5 A fixed-bias amplifier is simply build by injecting the input AC signal on the base through a capacitor. The time-domain simulation (top right) shows that the output voltage is close to ±1.6 VPP with ±10 mV on the input. The pass band extents down to 100 Hz (bottom left), while the distortion stays close to 1% with a second harmonic 25 dB lower than the signal (bottom right).

Figure 5
A fixed-bias amplifier is simply build by injecting the input AC signal on the base through a capacitor. The time-domain simulation (top right) shows that the output voltage is close to ±1.6 VPP with ±10 mV on the input. The pass band extents down to 100 Hz (bottom left), while the distortion stays close to 1% with a second harmonic 25 dB lower than the signal (bottom right).

A 1-µF capacitor provides a reasonable 100-Hz low-frequency cutoff, as shown on the frequency response simulation. I also performed a time-domain simulation with a 20-mVPP, 1.2-kHz input signal. As shown in Figure 5, the resulting simulated output voltage is 3.2 VPP, providing a gain of 160. So you do have an amplifier.
Note that its voltage gain is not identical to the transistor’s current gain (remember, we got 160 against 300). This voltage gain is always lower relative to the HFE current gain, basically because you are adding a voltage and not a current on the base. The relationship between the two is not straightforward. Search for “hybrid-pi model” online if you need more explanation, or just simulate it.

EMITTER-STABILIZED BIASING

You have now used just a basic transistor, two resistors, and two capacitors to design an AC amplifier with a fairly high gain. This is the so-called fixed-bias solution. But can you guess the problem with this? Remember that the transistor’s current gain is never well defined, except if you measure it yourself for each transistor and take care of the transistor’s operating condition and temperature.
Imagine you build the circuit and use a transistor, which has a gain twice that of the simulated one. This is quite common, knowing the wide dispersion of their performances. Due to the higher gain, the same base bias resistor will provide a collector current twice stronger than planned. Therefore, the voltage drop on the collector’s resistor will be twice as high, meaning that the DC output voltage will no longer be 5 V but close to 0 V! The amplifier will basically no longer work, or it will generate very high distortion.

This explains why a slightly more complex schematic is often required. The basic idea is to stabilize the amplifier’s gain even if the transistor’s current gain is not well defined. The most common method is called “emitter-stabilized biasing.”

As shown in Figure 6, this method requires two additional resistors and a capacitor. First, a resistor is added between the emitter and ground, with a large capacitor in parallel. The goal is to move the emitter level to a virtual ground voltage a little higher than the 0-V reference. Then another resistor is added between the transistor’s base and the 0-V line. Its function is to fix the base’s DC voltage. I will present the calculations shortly, but first a question: What happens if the transistor’s current gain is increased for whatever reason? The current circulating through the collector and emitter will increase, and therefore the voltage drop across the resistor between the emitter and ground will increase. This means that the emitter-to-ground voltage will increase. But wait, the base voltage is fixed relative to the ground and power supply thanks to the two resistors. If the emitter voltage increases, then the base-to-emitter voltage will decrease. This will reduce the current flowing through the base, which, in turn, will reduce the collector current and will compensate for the transistor’s higher gain. Then you have a kind of automatic gain stabilization!

Figure 6 An emitter-stabilized biasing required two more resistors and one more capacitor. The gain is a little lower, but such a circuit is far more stable than a fixed-bias circuit.

Figure 6
An emitter-stabilized biasing required two more resistors and one more capacitor. The gain is a little lower, but such a circuit is far more stable than a fixed-bias circuit.

Calculating such an emitter-stabilized bias is a little more complex than the fixed-bias approach, as all parameters are linked to each other. As a starting point, it is wise to set the emitter resistor for a 1-V drop. Going back to Figure 4, I had a 1-kΩ collector resistor (defined based on the desired output impedance). This resistor provided an average 5-V drop. If I want a 1-V drop, I must use a resistor five times lower. I used the closest standardized value, which is 210 Ω. The collector’s resistor must be slightly reduced to compensate and to keep a 5-mA average collector current. As shown in Figure 7a, this resistor must now be R = U/I = (9 V/2)/5 mA = 900 Ω for optimal performances. I used the standardized 910-Ω value.
Calculating the two resistors on the base is a little more complex and must be precisely done. The starting point is to assume that the current flowing through the two resistors, which fixes the base voltage, must be around five times higher than the transistor’s base current for good performances.Fig7 lacoste

Figure 7b shows the calculations’ details, which are just an application of Thevenin’s and Ohm’s laws. I found 51 and 12 kΩ, respectively.

Last, the capacitor between the emitter and the ground must be “large enough.” You can simulate it or, as a starting point, you can assume that its value should be close to the base capacitor value multiplied by the transistor current gain.
As shown in Figure 7, I used a 100-µF capacitor, which is probably a little short. The resulting voltage gain is around 130, as expected, which is a little lower than the fixed-bias version’s gain (remember, it was 160).

COLLECTOR-STABILIZED BIASING

Using an emitter-stabilized schematic is the most common method, but another approach could be used if the added two resistors and capacitor cause a problem. This solution, which is called “collector-stabilized biasing,” does not require a single extra component, as compared to the simplest fixed-bias configuration (see Figure 8).

Figure 8 The collector-stabilized biasing circuit is not more complex than the fixed-bias one to draw, but a little more complex to understand.

Figure 8
The collector-stabilized biasing circuit is not more complex than the fixed-bias one to draw, but a little more complex to understand.

The idea is that rather than biasing the transistor’s base with a resistor connected to the power supply, you just connect it to the transistor’s collector. So, if the transistor’s current gain increases, then the collector current will increase and the collector-to-emitter voltage will decrease. As the base is biased from the collector’s voltage, the current through the base will then decrease, stabilizing the amplifier. Clever, isn’t it?

On the calculation side, the steps are identical to the fixed-bias configuration. The base resistor’s value could be calculated as R = U/I, with U = (VCC/2)/IB. Here I found 270 kΩ. But this solution has two downsides. First, the achievable voltage gain is a little lower than with the previous solution. Second, the compensation is not as good. Nevertheless, it could be large enough for your designs and it costs nothing!

Finally, I compared the three solutions (fixed-bias, emitter-stabilized, and collector-stabilized) in terms of stability. I simply replaced the BC238B with a 2N2222 transistor, which has a significantly lower gain, and restarted the simulator. With the simplest fixed-bias design, the collector’s DC voltage moved from 5 to 6.6 V and the voltage gain was reduced from 156 to 105 V (a 32% reduction). With the emitter-stabilization solution, the gain reduction was only 5.7% (i.e., from 139 to 131). Lastly, the collector stabilization provided an intermediate performance, from 143 to 121 (15%). As expected, the most sophisticated solution is better.

WRAPPING UP

This article could have been written 60 years ago. There is nothing new here. However, I’m convinced that designers often forget that a single transistor can sometimes replace an op-amp. And this could reduce the product cost by tens of cents, which should not be neglected for high-volume applications. As a matter of fact, a single transistor could also be a good solution for ultra-low-power designs.

Recently, my company worked on an alarm detection system where a piezo sensor signal needed to be amplified prior to detection. It was easy, except that the device needed to work on a coin-cell battery for a couple of years and the amplifier had to remain powered. As you can imagine, we started by trying to use ultra-low-power comparators, but a single transistor with ultra-low bias currents was the winning solution.

I hope this article was refreshing even if it did not discuss an exciting new technology. BJT transistors shouldn’t be on your darker side, just play with them!

RESOURCES
Bade Engineering Classes, “BJT Biasing,” 2012.

CircuitLab, Inc., www.circuitlab.com.

M. H. Miller, “BJT Biasing,” Introductory Electronics Notes, The University of Michigan-Dearborn, 2000.

PartSim, www.partsim.com.

SOURCES

BC238B BJT Transistor
Fairchild Semiconductor Corp. | www.fairchildsemi.com

Proteus VSM design suite
Labcenter Electronics | www.labcenter.com

LTSpice SPICE simulator
Linear Technology Corp. | www.linear.com


Robert Lacoste lives in France, near Paris. He has 24 years of experience in embedded systems, analog designs, and wireless telecommunications. A prize winner in more than 15 international design contests, in 2003 he started his consulting company, ALCIOM, to share his passion for innovative mixed-signal designs. His book (“Robert Lacoste’s The Darker Side”) was published by Elsevier/Newnes in 2009. You can reach him at rlacoste@alciom.com if you don’t forget to put “darker side” in the subject line to bypass spam filters.


This complete article appears in Circuit Cellar 279 (October 2013).

The Future of Monolithically Integrated LED Arrays

LEDs are ubiquitous in our electronic lives. They are widely used in notification lighting, flash photography, and light bulbs, to name a few. For displays, LEDs have been commercialized as backlights in televisions and projectors. However, their use in image formation has been limited.

A prototype emissive LED display chip is shown. The chip includes an emissive compass pattern ready to embed into new applications.

A prototype emissive LED display chip is shown. The chip includes an emissive compass pattern ready to embed into new applications.

The developing arena of monolithically integrated LED arrays, which involves fabricating millions of LEDs with corresponding transistors on a single chip, provides many new applications not possible with current technologies, as the LEDs can simultaneously act as the backlight and the image source.

The common method of creating images is to first generate light (using LEDs) and then filter that light using a spatial light modulator. The filter could be an LCD, liquid crystal on silicon (LCoS), or a digital micromirror device (DMD) such as a Digital Light Processing (DLP) projector. The filtering processes cause significant loss of light in these systems, despite the brightness available from LEDs. For example, a typical LCD uses only 1% to 5% of the light generated.

Two pieces are essential to a display: a light source and a light controller. In most display technologies, the light source and light control functionalities are served by two separate components (e.g., an LED backlight and an LCD). However, in emissive displays, both functionalities are combined into a single component, enabling light to be directly controlled without the inherent inefficiencies and losses associated with filtering. Because each light-emitting pixel is individually controlled, light can be generated and emitted exactly where and when needed.

Emissive displays have been developed in all sizes. Very-large-format “Times Square” and stadium displays are powered by large arrays of individual conventional LEDs, while new organic LED (OLED) materials are found in televisions, mobile phones, and other micro-size applications. However, there is still a void. Emissive “Times Square” displays cannot be scaled to small sizes and emissive OLEDs do not have the brightness available for outdoor environments and newer envisioned applications. An emissive display with high brightness but in a micro format is required for applications such as embedded cell phone projectors or displays on see-through glasses.

We know that optimization by the entire LED industry has made LEDs the brightest controllable light source available. We also know that a display requires a light source and a method of controlling the light. So, why not make an array of LEDs and control individual LEDs with a matching array of transistors?

The marrying of LED materials (light source) to transistors (light control) has long been researched. There are three approaches to this problem: fabricate the LEDs and transistors separately, then bond them together; fabricate transistors first, then integrate LEDs on top; and fabricate LEDs first, then integrate transistors on top. The first method is not monolithic. Two fabricated chips are electrically and mechanically bonded, limiting integration density and thus final display resolutions. The second method, starting with transistors and then growing LEDs, offers some advantages in monolithic (single-wafer) processing, but growth of high-quality, high-efficiency LEDs on transistors has proven difficult.

My start-up company, Lumiode (www.lumiode.com), is developing the third method, starting with optimized LEDs and then fabricating silicon transistors on top. This leverages existing LED materials for efficient light output. It also requires careful fabrication of the integrated transistor layer as to not damage the underlying LED structures. The core technology uses a laser method to provide extremely local high temperatures to the silicon while preventing thermal damage to the LED. This overcomes typical process incompatibilities, which have previously held back development of monolithically integrated LED arrays. In the end, there is an array of LEDs (light source) and corresponding transistors to control each individual LED (light control), which can reach the brightness and density requirements of future microdisplays.

Regardless of the specific integration method employed, a monolithically integrated LED and transistor structure creates a new range of applications requiring higher efficiency and brightness. The brightness available from integrated LED arrays can enable projection on truly see-through glass, even in outdoor daylight environments. The efficiency of an emissive display enables extended battery lifetimes and device portability. Perhaps we can soon achieve the types of displays dreamed up in movies.

3-D Integration Impact and Challenges

People want transistors—lots of them. It pretty much doesn’t matter what shape they’re in, how small they are, or how fast they operate. Simply said, the more the merrier. Diversity is also good. The more different the transistors, the more useful and interesting the product. And without any question, the cheaper the transistors, the better. So the issue is, how best to achieve as many diverse transistors at the lowest cost possible.

One approach is more chips. Placing a lot of chips close together on a small board will produce a system with many transistors. Another way is more transistors per chip. Keep on scaling the technology to provide more transistors in one or a few chips.

silicon chipThe third option combines these two approaches. Let’s have many chips with many transistors and end up with a huge number of transistors. However, there is a limit to this approach. It’s well understood that scaling is coming to an end. And placing multiple chips on a board can have a terrible effect on a system’s overall speed and power dissipation.

But there is an elegant and intellectually simple solution. Rather than connecting these chips horizontally across a board, connect them vertically, providing N times more transistors, where N is the number of chips stacked one above another. Such vertical, 3-D integration was first broached by William Shockley, co-inventor of the transistor at Bell Labs in 1947. Shockley described the 3-D integration concept in a 1958 patent, which was followed by Merlin Smith and Emanuel Stern’s 1967 patent outlining how best to produce the holes between layers. We now call these inter-layer holes through silicon vias (TSVs). Technology is still catching up to these 3-D concepts.

Three-dimensional integration offers exciting advantages. For example, the vertical distance between layers is much shorter than the horizontal dimensions across a chip. Three-dimensional circuits, therefore, operate faster and dissipate less power than their 2-D equivalent. A 3-D system is shockingly small, permitting it to fit much more conveniently into a tiny space. Think small portable electronics (e.g., credit cards).

But the most exciting advantage of 3-D integration isn’t the small form factor, higher speed, or lower power; it’s the natural ability to support many disparate technologies and functions as one integrated, heterogeneous system. Even better, each chip layer can be optimized for a particular function and technology, since the individual chips can each be developed in isolation. No more trading off different capabilities to combine disparate technologies on the same chip. Now we can use the absolute best technology for each layer and a completely different and optimized technology for a different layer. This approach enables all kinds of novel applications that until now couldn’t have been conceived or would have been cost-prohibitive.

Imagine placing a microprocessor plane below a MEMS-accelerometer plane below an analog plane (with ADCs) below a temperature sensor, all below a video imager (which has to be at the top to “see”). All of these planes fit together into a tiny (smaller than a fingernail) silicon cube while operating at higher speeds and dissipating lower power.

There are technical issues, including: how to best make the TSVs, how to construct the system architecture to fully exploit the system’s 3-D nature, how to deliver power across these multiple planes, how to synchronize this system to best move data around the cube, how to manage system design complexity, and much more.

Two issues rise to the top. The first is power dissipation (specifically, power density). When many transistors switch at a high rate within a tiny volume, the temperature rises, which can impair performance and reliability. I believe this issue, albeit difficult, is technically solvable and simply will require a lot of good engineering.

The real problem is cost. How do we mature this technology quickly enough to drive the costs down to a point where volume commercial applications are possible? Many companies are close to producing tangible 3-D-based products. Cubes of highly dense memory will likely be the first serious and cost-effective product. Early versions are already available. Three-dimensional integration will soon be here in a serious way with what will be a fascinating assortment of all kinds of exciting new products. You won’t have to wait too long.

Amplifier Classes from A to H

Engineers and audiophiles have one thing in common when it comes to amplifiers. They want a design that provides a strong balance between performance, efficiency, and cost.

If you are an engineer interested in choosing or designing the amplifier best suited to your needs, you’ll find columnist Robert Lacoste’s article in Circuit Cellar’s December issue helpful. His article provides a comprehensive look at the characteristics, strengths, and weaknesses of different amplifier classes so you can select the best one for your application.

The article, logically enough, proceeds from Class A through Class H (but only touches on the more nebulous Class T, which appears to be a developer’s custom-made creation).

“Theory is easy, but difficulties arise when you actually want to design a real-world amplifier,” Lacoste says. “What are your particular choices for its final amplifying stage?”

The following article excerpts, in part, answer  that question. (For fuller guidance, download Circuit Cellar’s December issue.)

CLASS A
The first and simplest solution would be to use a single transistor in linear mode (see Figure 1)… Basically the transistor must be biased to have a collector voltage close to VCC /2 when no signal is applied on the input. This enables the output signal to swing

Figure 1—A Class-A amplifier can be built around a simple transistor. The transistor must be biased in so it stays in the linear operating region (i.e., the transistor is always conducting).

Figure 1—A Class-A amplifier can be built around a simple transistor. The transistor must be biased in so it stays in the linear operating region (i.e., the transistor is always conducting).

either above or below this quiescent voltage depending on the input voltage polarity….

This solution’s advantages are numerous: simplicity, no need for a bipolar power supply, and excellent linearity as long as the output voltage doesn’t come too close to the power rails. This solution is considered as the perfect reference for audio applications. But there is a serious downside.

Because a continuous current flows through its collector, even without an input signal’s presence, this implies poor efficiency. In fact, a basic Class-A amplifier’s efficiency is barely more than 30%…

CLASS B
How can you improve an amplifier’s efficiency? You want to avoid a continuous current flowing in the output transistors as much as possible.

Class-B amplifiers use a pair of complementary transistors in a push-pull configuration (see Figure 2). The transistors are biased in such a way that one of the transistors conducts when the input signal is positive and the other conducts when it is negative. Both transistors never conduct at the same time, so there are very few losses. The current always goes to the load…

A Class-B amplifier has more improved efficiency compared to a Class-A amplifier. This is great, but there is a downside, right? The answer is unfortunately yes.
The downside is called crossover distortion…

Figure 2—Class-B amplifiers are usually built around a pair of complementary transistors (at left). Each transistor  conducts 50% of the time. This minimizes power losses, but at the expense of the crossover distortion at each zero crossing (at right).

Figure 2—Class-B amplifiers are usually built around a pair of complementary transistors (at left). Each transistor conducts 50% of the time. This minimizes power losses, but at the expense of the crossover distortion at each zero crossing.

CLASS AB
As its name indicates, Class-AB amplifiers are midway between Class A and Class B. Have a look at the Class-B schematic shown in Figure 2. If you slightly change the transistor’s biasing, it will enable a small current to continuously flow through the transistors when no input is present. This current is not as high as what’s needed for a Class-A amplifier. However, this current would ensure that there will be a small overall current, around zero crossing.

Only one transistor conducts when the input signal has a high enough voltage (positive or negative), but both will conduct around 0 V. Therefore, a Class-AB amplifier’s efficiency is better than a Class-A amplifier but worse than a Class-B amplifier. Moreover, a Class-AB amplifier’s linearity is better than a Class-B amplifier but not as good as a Class-A amplifier.

These characteristics make Class-AB amplifiers a good choice for most low-cost designs…

CLASS C
There isn’t any Class-C audio amplifier Why? This is because a Class-C amplifier is highly nonlinear. How can it be of any use?

An RF signal is composed of a high-frequency carrier with some modulation. The resulting signal is often quite narrow in terms of frequency range. Moreover, a large class of RF modulations doesn’t modify the carrier signal’s amplitude.

For example, with a frequency or a phase modulation, the carrier peak-to-peak voltage is always stable. In such a case, it is possible to use a nonlinear amplifier and a simple band-pass filter to recover the signal!

A Class-C amplifier can have good efficiency as there are no lossy resistors anywhere. It goes up to 60% or even 70%, which is good for high-frequency designs. Moreover, only one transistor is required, which is a key cost reduction when using expensive RF transistors. So there is a high probability that your garage door remote control is equipped with a Class-C RF amplifier.

CLASS D
Class D is currently the best solution for any low-cost, high-power, low-frequency amplifier—particularly for audio applications. Figure 5 shows its simple concept.
First, a PWM encoder is used to convert the input signal from analog to a one-bit digital format. This could be easily accomplished with a sawtooth generator and a voltage comparator as shown in Figure 3.

This section’s output is a digital signal with a duty cycle proportional to the input’s voltage. If the input signal comes from a digital source (e.g., a CD player, a digital radio, a computer audio board, etc.) then there is no need to use an analog signal anywhere. In that case, the PWM signal can be directly generated in the digital domain, avoiding any quality loss….

As you may have guessed, Class-D amplifiers aren’t free from difficulties. First, as for any sampling architecture, the PWM frequency must be significantly higher than the input signal’s highest frequency to avoid aliasing….The second concern with Class-D amplifiers is related to electromagnetic compatibility (EMC)…

Figure 3—A Class-D amplifier is a type of digital amplifier (at left). The comparator’s output is a PWM signal, which is amplified by a pair of low-loss digital switches. All the magic happens in the output filter (at right).

Figure 3—A Class-D amplifier is a type of digital amplifier. The comparator’s output is a PWM signal, which is amplified by a pair of low-loss digital switches. All the magic happens in the output filter.

CLASS E and F
Remember that Class C is devoted to RF amplifiers, using a transistor conducting only during a part of the signal period and a filter. Class E is an improvement to this scheme, enabling even greater efficiencies up to 80% to 90%. How?
Remember that with a Class-C amplifier, the losses only occur in the output transistor. This is because the other parts are capacitors and inductors, which theoretically do not dissipate any power.

Because power is voltage multiplied by current, the power dissipated in the transistor would be null if either the voltage or the current was null. This is what Class-E amplifiers try to do: ensure that the output transistor never has a simultaneously high voltage across its terminals and a high current going through it….

CLASS G AND CLASS H
Class G and Class H are quests for improved efficiency over the classic Class-AB amplifier. Both work on the power supply section. The idea is simple. For high-output power, a high-voltage power supply is needed. For low-power, this high voltage implies higher losses in the output stage.

What about reducing the supply voltage when the required output power is low enough? This scheme is clever, especially for audio applications. Most of the time, music requires only a couple of watts even if far more power is needed during the fortissimo. I agree this may not be the case for some teenagers’ music, but this is the concept.

Class G achieves this improvement by using more than one stable power rail, usually two. Figure 4 shows you the concept.

Figure 4—A Class-G amplifier uses two pairs of power supply rails. b—One supply rail is used when the output signal has a low power (blue). The other supply rail enters into action for high powers (red). Distortion could appear at the crossover.

Figure 4—A Class-G amplifier uses two pairs of power supply rails. b—One supply rail is used when the output signal has a low power (blue). The other supply rail enters into action for high powers (red). Distortion could appear at the crossover.

PWM Controller Uses BJTs to Reduce Costs

Dialog iW1679 Digital PWM Controller

Dialog iW1679 Digital PWM Controller

The iW1679 digital PWM controller drives 10-W power bipolar junction transistor (BJT) switches to reduce  costs in 5-V/2-A smartphone adapters and chargers. The controller enables designers to replace field-effect transistors (FETs) with lower-cost BJTs to provide lower standby power and higher light-load and active average efficiency in consumer electronic products.

The iW1679 uses Dialog’s adaptive multimode PWM/PFM control to dynamically change the BJT switching frequency. This helps the system improve light-load efficiency, power consumption, and electromagnetic interference (EMI). The iW1679 provides high, 83% active average efficiency; maintains high efficiency at loads as light as 10%. It achieves less than 30-mW no-load standby power with fast standby recovery time. The controller meets stringent global energy efficiency standards, including: US Department of Energy, European Certificate of Conformity (CoC) version 5, and Energy Star External Power Supplies (EPS) 2.0.

The iW1679 offers a user-configurable, four-level cable drop compensation option. It comes in a standard, low-cost, eight-lead SOIC package and provides protection from fault conditions including output short-circuit, output overvoltage, output overcurrent, and overtemperature.

The iW1679 costs $0.29 each in 1,000-unit quantities.

Dialog Semiconductor
www.iwatt.com

The Future of Very Large-Scale Integration (VLSI) Technology

The historical growth of IC computing power has profoundly changed the way we create, process, communicate, and store information. The engine of this phenomenal growth is the ability to shrink transistor dimensions every few years. This trend, known as Moore’s law, has continued for the past 50 years. The predicted demise of Moore’s law has been repeatedly proven wrong thanks to technological breakthroughs (e.g., optical resolution enhancement techniques, high-k metal gates, multi-gate transistors, fully depleted ultra-thin body technology, and 3-D wafer stacking). However, it is projected that in one or two decades, transistor dimensions will reach a point where it will become uneconomical to shrink them any further, which will eventually result in the end of the CMOS scaling roadmap. This essay discusses the potential and limitations of several post-CMOS candidates currently being pursued by the device community.

Steep transistors: The ability to scale a transistor’s supply voltage is determined by the minimum voltage required to switch the device between an on- and an off-state. The sub-threshold slope (SS) is the measure used to indicate this property. For instance, a smaller SS means the transistor can be turned on using a smaller supply voltage while meeting the same off current. For MOSFETs, the SS has to be greater than ln(10) × kT/q where k is the Boltzmann constant, T is the absolute temperature, and q is the electron charge. This fundamental constraint arises from the thermionic nature of the MOSFET conduction mechanism and leads to a fundamental power/performance tradeoff, which could be overcome if SS values significantly lower than the theoretical 60-mV/decade limit could be achieved. Many device types have been proposed that could produce steep SS values, including tunneling field-effect transistors (TFETs), nanoelectromechanical system (NEMS) devices, ferroelectric-gate FETs, and impact ionization MOSFETs. Several recent papers have reported experimental observation of SS values in TFETs as low as 40 mV/decade at room temperature. These so-called “steep” devices’ main limitations are their low mobility, asymmetric drive current, bias dependent SS, and larger statistical variations in comparison to traditional MOSFETs.

Spin devices: Spintronics is a technology that utilizes nano magnets’ spin direction as the state variable. Spintronics has unique properties over CMOS, including nonvolatility, lower device count, and the potential for non-Boolean computing architectures. Spintronics devices’ nonvolatility enables instant processor wake-up and power-down that could dramatically reduce the static power consumption. Furthermore, it can enable novel processor-in-memory or logic-in-memory architectures that are not possible with silicon technology. Although in its infancy, research in spintronics has been gaining momentum over the past decade, as these devices could potentially overcome the power bottleneck of CMOS scaling by offering a completely new computing paradigm. In recent years, progress has been made toward demonstration of various post-CMOS spintronic devices including all-spin logic, spin wave devices, domain wall magnets for logic applications, and spin transfer torque magnetoresistive RAM (STT-MRAM) and spin-Hall torque (SHT) MRAM for memory applications. However, for spintronics technology to become a viable post-CMOS device platform, researchers must find ways to eliminate the transistors required to drive the clock and power supply signals. Otherwise, the performance will always be limited by CMOS technology. Other remaining challenges for spintronics devices include their relatively high active power, short interconnect distance, and complex fabrication process.

Flexible electronics: Distributed large area (cm2-to-m2) electronic systems based on flexible thin-film-transistor (TFT) technology are drawing much attention due to unique properties such as mechanical conformability, low temperature processability, large area coverage, and low fabrication costs. Various forms of flexible TFTs can either enable applications that were not achievable using traditional silicon based technology, or surpass them in terms of cost per area. Flexible electronics cannot match the performance of silicon-based ICs due to the low carrier mobility. Instead, this technology is meant to complement them by enabling distributed sensor systems over a large area with moderate performance (less than 1 MHz). Development of inkjet or roll-to-roll printing techniques for flexible TFTs is underway for low-cost manufacturing, making product-level implementations feasible. Despite these encouraging new developments, the low mobility and high sensitivity to processing parameters present major fabrication challenges for realizing flexible electronic systems.

CMOS scaling is coming to an end, but no single technology has emerged as a clear successor to silicon. The urgent need for post-CMOS alternatives will continue to drive high-risk, high-payoff research on novel device technologies. Replicating silicon’s success might sound like a pipe dream. But with the world’s best and brightest minds at work, we have reasons to be optimistic.

Author’s Note: I’d like to acknowledge the work of PhD students Ayan Paul and Jongyeon Kim.