MCUs and Processors Vie for Embedded Mindshare

Performance Push

Today’s crop of high-performance microcontrollers and embedded processors provide a rich continuum of features, functions and capabilities. Embedded system designers have many choices in both categories but the dividing line between the two can be blurry.

By Jeff Child, Editor-in-Chief

At one time the world of microcontrollers and the world of microprocessors were clearly separate. That’s slowly changed over the years as the high-performance segment of microcontrollers have become more powerful. And the same time, embedded processors have captured ever more mindshare and market share that used to be exclusively owned by the MCU camp. The lines blurred even further once most all MCUs started using Arm-based processor cores.

All the leading MCU vendors have a high-performance line of products, some in the 200 MHz and up range. Moreover, some application-specific MCU offerings are designed specifically for the performance needs of a particular market segment—automotive being the prime example. In some cases, these high end MCUs are vying for design wins against embedded processors that meet the same size, weight and power requirements as MCUs. In this article, we’ll examine some of the latest and greatest products and technologies on both sides.

High Performance MCU

An example of an MCU vendor’s high-performance line of products is Cypress Semiconductor’s FM4. FM4 is a portfolio of 32-bit, general-purpose, high performance MCUs based on the Arm Cortex-M4 processor with FPU and DSP functionality. FM4 microcontrollers operate at frequencies up to 200 MHz and support a diverse set of on-chip peripherals for motor control, factory automation and home appliance applications. The portfolio delivers low-latency, reliable, machine-to-machine (M2M) communication required for Industry 4.0 using network-computing technologies to advance design and manufacturing.

The FM4 MCU supports an operating voltage range of 2.7 V to 5.5 V. The devices incorporate 256 KB to 2 MB flash and up to 256 KB RAM. The fast flash memory combined with a flash accelerator circuit (pre-fetch buffer plus instruction cache) provides zero-wait-state operation up to 200 MHz. A standard DMA and an additional descriptor-based DMA (DSTC), each with an independent bus for data transfer, can be used to further offload the CPU. Figure 1 shows the FM4-216-ETHERNET, a development platform for developing applications using the Arm Cortex-M4-based FM4 S6E2CC MCU.

Figure 1
The FM4-216-ETHERNET is a development platform for developing applications using the Arm Cortex-M4-based FM4 S6E2CC MCU.

The high-performance line of MCUs from ST Microelectronics is its STM32H7 series. An example product from that series is the STM32H753 MCU with Arm’s highest-performing embedded core (Cortex-M7). According to ST Micro it delivers a record performance of 2020 CoreMark/856 DMIPS running at 400 MHz, executing code from embedded flash memory.

Other innovations and features implemented by ST further boost performance.These include the Chrom-ART Accelerator for fast and efficient graphical user-interfaces, a hardware JPEG codec that allows high-speed image manipulation, highly efficient Direct Memory Access (DMA) controllers, up to 2 MB of on-chip dual-bank flash memory with read-while-write capability, and the L1 cache allowing full-speed interaction with off-chip memory. Multiple power domains allow developers to minimize the energy consumed by their applications, while plentiful I/Os, communication interfaces, and audio and analog peripherals can address a wide range of entertainment, remote-monitoring and control applications.

Last year STMicro announced its STM32H7 high-performing MCUs are designed with the same security concepts as the Platform Security Architecture (PSA) from Arm announced at that time. This PSA framework on the STM32H7 MCUs are combined with STM32-family enhanced security features and services. ST’s STM32H7 MCU devices integrate hardware-based security features including a True Random-Number Generator (TRNG) and advanced cryptographic processor, which will simplify protecting embedded applications and global IoT systems against attacks like eavesdropping, spoofing or man-in-the-middle interception.

MCU Runs Linux OS

One dividing line that remains between MCUs and microprocessors is their ability to run major operating systems. While most embedded processors can run OSes like Linux, most MCUs lack the memory architecture required to do so. Breaking that barrier, in February MCU vendor Microchip Technology unveiled a System on Module (SOM) featuring the SAMA5D2 microprocessor. The ATSAMA5D27-SOM1 contains the recently released ATSAMA5D27C-D1G-CU System in Package (SiP) (Figure 2).

Figure 2
The Arm Cortex-A5-based SAMA5D2 SiP is available in three DDR2 memory sizes (128 Mb, 512 Mb and 1 Gb) and optimized for bare metal, RTOS and Linux implementation

The SOM simplifies design by integrating the power management, non-volatile boot memory, Ethernet PHY and high-speed DDR2 memory onto a small, single-sided PCB. There is a great deal of design effort and complexity associated with creating an industrial-grade MPU-based system running a Linux operating system. The SOM integrates multiple external components and eliminates key design challenges around EMI, ESD and signal integrity. …

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MCU Tool Update Eases Multicore Automotive Control Development

Renesas Electronics has announced an update to its Embedded Target for RH850 Multicore model-based development environment for multicore MCUs for automotive control applications. The update supports development of systems with multirate control (multiple control periods), which is now common in systems such as engine and body control systems. This model-based development environment has become practical even in software development scenarios for multicore MCUs, and can reduce the increasingly complex software development burdens especially in control system development of self-driving cars.
Renesas’ earlier RH850 multicore model-based development environment automatically allocated software to the multiple cores and although verifying performance was possible, in complex systems that included multirate control, it was necessary to implement everything manually, including the RTOS and device drivers. Now there’s ever-increasing requirements to boost engine and vehicle performance, and at the same time shorten product development time. By making this development environment support multirate control, it is possible to directly generate the multicore software code from the multirate control model. This has made it possible to evaluate the execution performance in simulation.

Not only does this allow execution performance to be estimated from the earliest stages of software development, this also makes it easy to feed back the verification results into the model itself. This enables the completeness of the system development to be improved early on in the process, and the burden of developing the ever-larger scale, and increasingly complex, software systems can be significantly reduced. Renesas is accelerating the practical utility of model-based development environments in software development for multicore processors and is leading the evolution of green electric vehicles as proposed in the Renesas autonomy concept.

Control functions development requires multirate control, such as intake/exhaust period in engine control, the period of fuel injection and ignition, and the period with which the car’s status is verified. These are all different periods. By applying the technology that generates RH850 multicore code from the Simulink control mode to multirate control, it has become possible to directly generate multicore code, even from models that include multiple periods, such as engine control.

Renesas also provides as an option for the Integrated Development Environment CS+ for the RH850, a cycle precision simulator that can measure time with a precision on par with that of actual systems. By using this option, it is possible to estimate the execution performance of a model of the multicore MCU at the early stages of software development. This can significantly reduce the software development period.

The JMAAB (Japan MBD Automotive Advisory Board), an organization that promotes model-based development for automotive control systems, recommends several control models from the JMAAB Control Modeling Guidelines. Of those, Renesas is providing in this update the Simulink® Scheduler Block, which conforms to type (alpha) which provides a scheduler layer in the upper layer. This makes it possible to follow the multirate single-task method without an OS, express the core specifications and synchronization in the Simulink model, and automatically generate multicore code for the RH850 to implement deterministic operations.

Along with advances in the degree of electronic control in today’s cars, integration is also progressing in the ECUs (electronic control units), which are comparatively small-scale systems. By supporting multirate control, making it easier to operate small-scale systems with different control periods with a multicore microcontroller, it is now possible to verify the operation of a whole ECU that integrates multiple systems.

The updated model-based development environment is planned to support Renesas’ RH850/P1H-C MCU that includes two cores by this fall, and also support for the RH850/E2x Series of MCUs that include up to six cores is in the planning. In addition, Renesas plans to deploy this development environment to the entire Renesas autonomy Platform, including the “R-Car” Family of SoCs.

Renesas is also continuing to work to further improve the efficiency of model-based software development, including model-based parallelization tools from partner companies and strengthening of related multirate control support execution performance estimation including the operating system. Moving forward, Renesas plans to apply the model-based design expertise fostered in its automotive development efforts in the continually growing RX Family in the industrial area which is seeing continued increases in both complexity and scale.

Renesas Electronics | www.renesas.com

FPGA Solutions Evolve to Meet AI Needs

Brainy System ICs

Long gone now are the days when FPGAs were thought of as simple programmable circuitry for interfacing and glue logic. Today, FPGAs are powerful system chips with on-chip processors, DSP functionality and high-speed connectivity.

By Jeff Child, Editor-in-Chief

Today’s FPGAs have now evolved to the point that calling them “systems-on-chips” is redundant. It’s now simply a given that the high-end lines of the major FPGA vendors have general-purpose CPU cores on them. Moreover, the flavors of signal processing functionality on today’s FPGA chips are ideally suited to the kind of system-oriented DSP functions used in high-end computing. And even better, they’ve enabled AI (Artificial Intelligence) and Machine Learning kinds of functionalities to be implemented into much smaller, embedded systems.

In fact, over the past 12 months, most of the leading FPGA vendors have been rolling out solutions specifically aimed at using FPGA technology to enable AI and machine learning in embedded systems. The two main FPGA market leaders Xilinx and Intel’s Programmable Solutions Group (formerly Altera) have certainly embraced this trend, as have many of their smaller competitors like Lattice Semiconductor and QuickLogic. Meanwhile, specialists in so-called e-FPGA technology like Archonix and Flex Logix have their own compelling twist on FPGA system computing.

Project Brainwave

Exemplifying the trend toward FPGAs facilitating AI processing, Intel’s high-performance line of FPGAs is its Stratix 10 family. According to Intel, the Stratix 10 FPGAs are capable of 10 TFLOPS, or 10 trillion floating point operations per second (Figure 1). In May Microsoft announced its Microsoft debuted its Azure Machine Learning Hardware Accelerated Models powered by Project Brainwave integrated with the Microsoft Azure Machine Learning SDK. Azure’s architecture is developed with Intel FPGAs and Intel Xeon processors.

Figure 1
Stratix 10 FPGAs are capable of 10 TFLOPS or 10 trillion floating point operations per second.

Intel says its FPGA-powered AI is able to achieve extremely high throughput that can run ResNet-50, an industry-standard deep neural network requiring almost 8 billion calculations without batching. This is possible using FPGAs because the programmable hardware—including logic, DSP and embedded memory—enable any desired logic function to be easily programmed and optimized for area, performance or power. And because this fabric is implemented in hardware, it can be customized and can perform parallel processing. This makes it possible to achieve orders of magnitudes of performance improvements over traditional software or GPU design methodologies.

In one application example, Intel cites an effort where Canada’s National Research Council (NRC) is helping to build the next-generation Square Kilometer Array (SKA) radio telescope to be deployed in remote regions of South Africa and Australia, where viewing conditions are most ideal for astronomical research. The SKA radio telescope will be the world’s largest radio telescope that is 10,000 times faster with image resolution 50 times greater than the best radio telescopes we have today. This increased resolution and speed results in an enormous amount of image data that is generated by these telescopes, processing the equivalent of a year’s data on the Internet every few months.

NRC’s design embeds Intel Stratix 10 SX FPGAs at the Central Processing Facility located at the SKA telescope site in South Africa to perform real-time processing and analysis of collected data at the edge. High-speed analog transceivers allow signal data to be ingested in real time into the core FPGA fabric. After that, the programmable logic can be parallelized to execute any custom algorithm optimized for power efficiency, performance or both, making FPGAs the ideal choice for processing massive amounts of real-time data at the edge.

ACAP for Next Gen

For its part, Xilinx’s high-performance product line is its Virtex UltraScale+ device family (Figure 2). According to the company, these provide the highest performance and integration capabilities in a FinFET node, including the highest signal processing bandwidth at 21.2 TeraMACs of DSP compute performance. They deliver on-chip memory density with up to 500 Mb of total on-chip integrated memory, plus up to 8 GB of HBM Gen2 integrated in-package for 460 GB/s of memory bandwidth. Virtex UltraScale+ devices provide capabilities with integrated IP for PCI Express, Interlaken, 100G Ethernet with FEC and Cache Coherent Interconnect for Accelerators (CCIX).

Figure 2
Virtex UltraScale+ FPGAs provide a signal processing bandwidth at 21.2 TeraMACs. They deliver on-chip memory density with up to 500 Mb of total on-chip integrated memory, plus up to 8 GB of HBM Gen2 integrated in-package for 460 GB/s of memory bandwidth.

Looking to the next phase of system performance, Xilinx in March announced its strategy toward a new FPGA product category it calls its adaptive compute acceleration platform (ACAP). Touted as going beyond the capabilities of an FPGA, an ACAP is a highly integrated multi-core heterogeneous compute platform that can be changed at the hardware level to adapt to the needs of a wide range of applications and workloads. An ACAP’s adaptability, which can be done dynamically during operation, delivers levels of performance and performance per-watt that is unmatched by CPUs or GPUs, says Xilinx… …

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Firms Collaborate on 3D Surround View System for Cars

Renesas Electronics and Magna, a mobility technology company and one of the world’s largest automotive suppliers, have teamed up to accelerate the mass adoption of advanced driving assistance system (ADAS) features with a new cost-efficient 3D surround view system designed for entry- and mid-range vehicles.
The 3D surround view system adopts Renesas’ high-performance, low-power system-on-chip (SoC) optimized for smart camera and surround view systems. By enabling 3D surround view safety capabilities, the new system helps automakers to deliver safer and more advanced vehicles to a larger number of car consumers, contributing to a safer vehicle society.

Magna’s 3D surround view system is a vehicle camera system that provides a 360-degree panoramic view to assist drivers when parking or performing low speed operations. Drivers can adjust the view of their surroundings with a simple-to-use interface, while object detection alerts drivers about obstacles in their path. The system provides drivers a realistic 360-degree view of their environment, a significant upgrade to the bird’s-eye view offered by existing parking assist systems. The ready-to-use system minimizes integration time and development costs, making the system an easy, cost-efficient option for automakers.

Several automakers have already expressed strong interest in the technology, including a European automaker, which will be the first to integrate the 3D surround view system into a future vehicle.

Renesas Electronics | www.renesas.com

Zynq SoC SOM Module Enabled With HSR/PRP IP

iWave Systems has partnered with SoC-e for enabling HSR/PRP IP on iWave’s Zynq 7000 SoC SOM Module. iWave has rigorously validated SoC-e’s High-availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP) IP Protocol on our Zynq 7000 SoC based SOM module. iWave’s Zynq 7000 SoC SOM and SoC-e’s HSR/PRP Switch IP Core reduce the time-to-market and simplifying design complexity. SOC-e develops IP portfolios for leading-edge networking and synchronization technologies for time critical systems.The Zynq-7000 programmable SoC family integrates the software programmability of an Arm-based processor with the hardware programmability of an FPGA, enabling key analytics and hardware acceleration while integrating CPU, DSP, ASSP and mixed signal functionality on a single device. The iW-RainboW-G28M (Zynq 7000 Board) is a featured-full and ready to-operate embedded software and advanced circuit development kit built around the smallest member from the Xilinx Zynq-7000 family, the Z-7010.

The Zynq-7000 SOM / Development Kit is based on the Xilinx All Programmable System-on-Chip architecture, which firmly incorporates a single / Dual Cortex A9 with Xilinx 7-series FPGA logic. At the point when combined with the rich set of media and connectivity peripherals accessible on the Zynq 7000 SOM, the Zynq Z-7007S, Z-7014S, Z-7010, Z-7020, can host an entire design system.

Memories, 512 MB DDR3 (Expandable to 1 GB) or 512 MB NAND Flash (Expandable), that are on-board, video and sound I/O, USB 2.0 OTG, Gigabit Ethernet and SD (4-bit) will have your board up-and-running with no extra hardware required. Moreover, PMIC with RTC bolster connectors is accessible to put any design on a simple development way.

The iW-RainboW-G28M gives an ultra-cost to embedded designers that don’t require the high-thickness I/O of the FMC connector yet at the same time wish to use the enormous preparing force and extensibility of the Zynq AP SoC architecture.

iWave Systems | www.iwavesystems.com

Nordic BLE SoC Selected for Cloud-Connected Thermostat

Nordic Semiconductor has announced that Sikom, a developer of GSM-based IoT platforms, employs Nordic’s nRF52840 Bluetooth 5/Bluetooth Low Energy (Bluetooth LE) advanced multiprotocol System-on-Chip (SoC) in its ‘Bluetooth Thermostat EP’ to support smartphone connectivity and smart-home networking. The thermostat is available to consumers and OEMs developing their own heating control systems.

The Nordic SoC’s Bluetooth 5 long-range capability enhances connection stability, boosting range, and allowing the thermostat to be configured and controlled from anywhere in the house. From a companion app on a Bluetooth 4.0 (and later) smartphone the user can control thermostat features such as comfort and economy temperature set points, week programs, vacation modes and temperature logs.

Because the thermostat can be controlled and configured directly from the smartphone, there is no requirement for a proprietary gateway between mobile device and thermostat, lowering the cost and complexity of installation and setup. In addition, the thermostat’s Bluetooth 5 connectivity enables it to join a Sikom smart-home network and communicate directly with other wireless devices to support advanced features such as power control and limiting. The thermostat also integrates with 4G/LTE (cellular) technology to enable remote control via Sikom’s Cloud platform.

Enabled by the nRF52840 SoC’s 32-bit Arm Cortex M4F processor, 1 MB Flash memory, and 256 KB RAM, the Bluetooth Thermostat EP platform can support a variety of complex remote thermostat/heating applications. The processor has ample power to run the Bluetooth 5 RF software protocol (“stack”) and Sikom’s application software and bootloader. The SoC also supports Over-the-Air Device Firmware Updates (OTA-DFU) for future improvements.

Nordic’s nRF52840 Bluetooth 5/Bluetooth LE SoC is Nordic’s most advanced ultra low power wireless solution. The SoC supports complex Bluetooth LE and other low-power wireless applications that were previously not possible with a single-chip solution. The SoC combines the Arm processor with a 2.4 GHz multiprotocol radio architecture featuring -96dB RX sensitivity and an on-chip PA boosting output power to a maximum of 8 dBm. The SoC is supplied with the S140 SoftDevice, a Bluetooth 5-certified stack which supports all the features of the standard and provides concurrent Central, Peripheral, Broadcaster and Observer Bluetooth LE roles.

Nordic Semiconductor | www.nordicsemi.com

 

SST and UMC Qualify Flash Tech on 40-nm Process

Microchip Technology subsidiary Silicon Storage Technology (SST) and United Microelectronics Corporation (UMC) have announced the full qualification and availability of SST’s embedded SuperFlash non-volatile memory on UMC’s 40 nm CMOS platform. The 40-nm process features a more than 20 percent reduction in embedded Flash cell size and a 20- to 30-percent reduction in macro area over their 55-nm process.
The high endurance of embedded SuperFlash IP offers System on a Chip (SoC) customers extensive reliability and design flexibility combined with reduced power usage. SST’s SuperFlash non-volatile memory technology is qualified for a minimum of 100,000 cycles, underscoring the technology’s reliability. Ideal for edge computing in IoT devices, SST embedded SuperFlash technology features power benefits that derive from low-power standby and read operations, with core supply as low as 0.81 V. SuperFlash also secures applications with code maintained on chip, which is the first step in preventing illegal access through hardware and software attacks.

 

SST’s SuperFlash technology complements UMC’s embedded memory portfolio with high density and low-power IP. Combined with SST’s inherent technology reliability, UMC’s flexible capacity and high-yield maturity for its 55 nm and 40 nm platform provides foundry customers the manufacturing support needed to build a range of product applications.

To date, more than 80 billion units have shipped with SST’s embedded SuperFlash technology. SuperFlash technology is based on a proprietary split-gate Flash memory cell with the following capabilities:

  • Low-power program, erase and read operations
  • High performance with fast read access
  • Good scalability from 1 µm technology node to 28 nm technology node
  • High endurance cycling up to 500,000 cycles
  • Excellent data retention of over 20 years
  • Good performance at high temperature for automotive-grade applications
  • Immunity to Stress-Induced Leakage Current (SILC)

Microchip Technology | www.microchip.com

Silicon Storage Technology | www.sst.com

Linux-Driven Modules and SBC Tap i.MX8, i.MX8M and iMX8X

By Eric Brown

Phytec has posted product pages for three PhyCore modules, all of which support Linux and offer a -40°C to 85°C temperature range. The three modules, which employ three different flavors of i.MX8, include a phyCORE-i.MX 8X COM, which is the first product we’ve seen that uses the dual- or quad-core Cortex-A35 i.MX8X.

phyCORE-i.MX 8X (top) and phyCORE-i.MX 8M (bottom – not to scale) (click images to enlarge)

The phyCORE-i.MX 8 taps the high-end, hexa-core -A72 and -A53 i.MX8, including the i.MX8 QuadMax. The phyCORE-i.MX 8M, which uses the more widely deployed dual- or quad-core i.MX8M, is the only module that appears as part of an announced SBC: the sandwich-style phyBoard-Polaris SBC (shown). The phyCORE-i.MX 8 will also eventually appear on an unnamed, crowd-sourced Pico-ITX SBC.

phyCORE-i.MX 8 (left) and NXP i.MX8 block diagram (bottom)
(click images to enlarge)

Development-only carrier boards will be available for the phyCORE-i.MX 8X and phyCORE-i.MX 8. Evaluation kits based on the carrier boards and the phyBoard-Polaris will include BSPs with a Yocto Project based Linux distribution “with pre-installed and configured packages such as QT-Libs, OpenGL and Python.” Android is also available, and QNX, FreeRTOS and other OSes are available on request. BSP documentation will include a hardware manual, quickstart instructions, application guides, and software and application examples.

 

i.MX8M, i.MX8X, and i.MX8 compared (click image to enlarge)

The three modules are here presented in order of ascending processing power.

phyCore-i.MX 8X

The i.MX8X SoC found on the petite phyCORE-i.MX 8X module was announced with other i.MX8 processors in Oct. 2016 and was more fully revealed in Mar. 2017. The industrial IoT focused i.MX8X includes up to 4x cores that comply with Arm’s rarely used Cortex-A35 successor to the Cortex-A7 design.

phyCore-i.MX 8X (top) and block diagram (bottom)
(click images to enlarge)

The 28 nm fabricated, ARMv8 Cortex-A35 cores are claimed to draw about 33 percent less power per core and occupy 25 percent less silicon area than Cortex-A53. Phytec’s comparison chart shows the i.MX8X with 5,040 to 10,800 DMIPS performance, which is surprisingly similar to the 3,450 to 13,800 range provided by the Cortex-A53 based i.MX8M (see above).The i.MX8X SoC is further equipped with a single Cortex-M4 microcontroller, a Tensilica HiFi 4 DSP, and a multi-format VPU that supports up to 4K playback and HD encode. It uses the same Vivante GC7000Lite GPU found on the i.MX8M, with up to 28 GFLOPS.

i.MX8X block diagram
(click image to enlarge)

The i.MX8X features ECC memory support, reduced soft-error-rate (SER) technology, hardware virtualization, and other industrial and automotive safety related features. Crypto features listed for the phyCore-i.MX 8X COM include AES, 3DES, RSA, ECC Ciphers, SHA1/256, and TRNG.

PhyCore-i.MX7

Phytec’s 52 mm x 42 mm phyCore-i.MX 8X is only slightly larger than the i.MX7-based PhyCore-i.MX7, but the layout is different. The module supports all three i.MX8X models: the quad-core i.MX8 QuadXPlus and the dual-core i.MX8 DualXPlus and i.MX8 DualX, all of which can clock up to 1.2 GHz. The DualX model differs in that it has a 2-shader instead of 4-shader Vivante GPU.

The phyCore-i.MX 8X offers a smorgasbord of memories. In addition to the “128 kB multimedia,” and “64 kB Secure” found on the i.MX8X itself, the module can be ordered with 512 MB to 4 GB of LPDDR4 RAM and 64 MB to 256 MB of Micron Octal SPI/DualSPI flash. (Phytec notes that it is an official member of Micron’s Xccela consortium.) You can choose between 128 MB to 1 GB NAND flash or  4GB to 128 GB eMMC.

There’s no onboard wireless, but you get dual GbE controllers (1x onboard, 1x RGMII). You can choose between 2x LVDS and 2x MIPI-DSI. There are MIPI-CSI and parallel camera interfaces, as well as ESAI based audio.

Other I/O available through the 280 pins found on its two banks of dual 70-pin connectors include USB 3.0, USB OTG, PCI/PCIe, and up to 10x I2C. You also get 2x UART, 3x CAN, 6x A/D, and single PWM, keypad, or MMC/SD/SDIO (but only if you choose the eMMC over NAND). For SPI you get a choice of a single Octal connection or 2x “Quad SPI + 3 SPI” interfaces.

 

phyCore-i.MX 8X carrier board
(click image to enlarge)

The 3.3 V module supports an RTC, and offers watchdog and tamper features. Like all the new Phytec modules, you get -40°C to 85°C support. No details were available on the carrier shown in the image above.

phyCORE-i.MX 8M

The 55 mm x 40 mm phyCORE-i.MX 8M joins a growing number of Linux-driven i.MX8M modules including Compulab’s CL-SOM-iMX8, Emcraft’s i.MX 8M SOM, Innocom’s WB10, Seco’s SM-C12, SolidRun’s i.MX8 SOM, and the smallest of the lot to date: Variscite’s 55 x 30mm DART-MX8M. There are also plenty of SBCs to compete with the phyCORE-i.MX 8M-equipped phyBoard-Polaris SBC (see farther below), but like most of the COMs, most have yet to ship.

phyCORE-i.MX 8M top) and block diagram (bottom) (click images to enlarge)

The phyCORE-i.MX 8M supports the NXP i.MX8M Quad and QuadLite, both with 4x Cortex-A53 cores, as well as the dual-core Dual. All are clocked to 1.5 GHz. They all have 266MHz Cortex-M4F cores and Vivante GC7000Lite GPUs, but only the Quad and Dual models support 4Kp60, H.265, and VP9 video capabilities. (NXP also has a Solo model that we have yet to see, which offers a single -A53 core, a Cortex-M4F, and a GC7000nanoUltra GPU.)In addition to the i.MX8M SoC, which offers “128 KB + 32 KB” RAM and the same crypto features found on the i.MX8X, the module ships with the same memory features as the phyCore-i.MX 8X except that it lacks the SPI flash. Once again, you get 512 MB to  4 GB of LPDDR4 RAM and either 128 MB to 1 GB NAND flash or 4 GB to 128 GB eMMC. There is also SPI driven “Nand/QSPI” flash.

There’s a single GbE controller, and although not listed in the spec list, the product page says that precertified WiFi and Bluetooth BLE 4.2 are onboard and accompanied by antennas.

Multimedia support includes MIPI-DSI, HDMI 2.0, 2x MIPI-CSI, and up to 5x SAI audio. The block diagram also lists eDP, possibly as a replacement for HDMI.

Other interfaces expressed via the dual 200-pin connectors include 2x USB 3.0, 4x UART, 4x I2C, 4x PWM, and single SDIO and PCI/PCIe connections. SPI support includes 2x SPI and the aforementioned Nand/QSPI. The 3.3V module supports an RTC, watchdog, and tamper protections.

phyBoard-Polaris SBC

The phyCORE-i.MX 8M is also available soldered onto a carrier board that will be sold as a monolithic phyBoard-Polaris SBC. The 100 mm x 100 mm phyBoard-Polaris SBC features the Quad version of the phyCORE-i.MX 8M clocked to 1.3 GHz, loaded with 1 GB KPDDR4 and 8 GB eMMC. The SBC also adds a microSD slot.

phyBoard-Polaris SBC
(click image to enlarge)

The phyBoard-Polaris SBC is further equipped with single GbE, USB 3.0 and USB OTG ports. There’s also an RS-232 port and MIPI-DSI and SAID audio interfaces made available via A/V connectors. Dual MIPI-CSI interfaces are also onboard.A mini-PCIe slot and GPIO slot are available for expansion. The latter includes SPI, UART, JTAG, NAND, USB, SPDIF and DIO.

Other features include a reset button, RTC with coin cell, and JTAG via a debug adapter (PEB-EVAL). There’s a 12 V – 24 V input and adapter, and the board offers the same industrial temperature support as all the new Phytec modules.

phyCORE-i.MX 8

The phyCORE-i.MX 8, which is said to be “ideal for image and speech recognition,” is the third module we’ve seen to support NXP’s top-of-the-line, 64-bit i.MX8 series. The module supports all three flavors of i.MX8 while the other two COMs we’ve seen have been limited to the high-end QuadMax: Toradex’s Apalis iMX8 and iWave’s iW-RainboW-G27M.

phyCORE-i.MX 8 (top) and block diagram (bottom)
(click images to enlarge)

Like Rockchip’s RK3399, NXP’s hexa-core i.MX8 QuadMax features dual high-end Cortex-A72 cores clocked to up to 1.6 GHz plus four Cortex-A53 cores. The i.MX8 QuadPlus design is the same, but with only one Cortex-A72 core, and the quad has no -A72 cores.All three i.MX8 models provide two Cortex-M4F cores for real-time processing, a Tensilica HiFi 4 DSP, and two Vivante GC7000LiteXS/VX GPUs. The SoC’s “full-chip hardware-based virtualization, resource partitioning and split GPU and display architecture enable safe and isolated execution of multiple systems on one processor,” says Phytec.

The 73 mm x 45 mm phyCORE-i.MX 8 supports up to 8 GB LPDDR4 RAM, according to the product page highlights list, while the spec list itself says 1 GB to 64 GB. Like the phyCORE-i.MX 8X, the module provides 64 MB to 256 MB of Micron Octal SPI/DualSPI flash. There’s no NAND option, but you get 4 GB to 128 GB eMMC.

The phyCORE-i.MX 8 lacks WiFi, but you get dual GbE controllers. Other features expressed via the 480 connection pins include single USB 3.0, USB OTG, and PCIe 2.0 based SATA interfaces. Dual PCIe interfaces are also available

The module provides a 4K-ready HDMI output, 2x LVDS, and 2x MIPI-DSI for up 4x simultaneous HD screens. For image capture you get 2x MIPI-CSI and an HDMI input. Audio features are listed as “2x ESAI up to 4 SAI.”

The phyCORE-i.MX 8 is further equipped with I/O including 2x UART, 2x CAN, 2x MMC/SD/SDIO, 8x A/D, up to 19x I2C, and a PWM interface. For SPI, you get “up to 4x + 1x QSPI.” The module supports an RTC and offers industrial temperature support.

phyCORE-i.MX 8 carrier board (click image to enlarge)

In addition to the unnamed carrier board for the phyCORE-i.MX 8 module shown above, Phytec plans to produce a “Machine Vision and Camera kit” to exploit i.MX8 multimedia features including the VPU, the Vivante GPU’s Vulkan and OGL support, and interfaces including MIPI-DSI, MIPI-CSI, HDMI, and LVDS. In addition, the company will offer rapid prototyping services for customizing customer-specific hardware I/O platforms.Finally, Phytec is planning to develop a smaller, Pico-ITX form factor SBC based on the i.MX8 SoC, and it’s taking a novel approach to do so. The company has launched a Cre-8 community which intends to crowdsource the SBC. The company is seeking developers to join this alpha-stage project to contribute ideas. We saw no promises of open source hardware support, however.

Further information

[As of March 29] No availability information was provided for the phyCORE-i.MX 8X, phyCORE-i.MX 8M, or phyCORE-i.MX 8 modules, but the phyCORE-i.MX 8M-based phyBoard-Polaris is due in the third quarter. More information may be found in Phytec’s phyCORE-i.MX 8X, phyCORE-i.MX 8M, and phyCORE-i.MX 8 product pages as well as the phyBoard-Polaris SBC product page. More on development kits for all these boards may be found here.

This article originally appeared on LinuxGizmos.com on March 29.

Phytec issue a Press Release announcing these products on April 19.
UPDATE: “Early access program sampling for the phyCORE-i.MX8 and phyCORE-i.MX8M is planned for Q3 2018, with general availability expected in Q4 2018.”

Phytec | www.phytec.eu

Drones Tap a Variety of Video Solutions

Eyes in the Skies

In one way or another, much of today’s commercial drone development revolves around video. Technology options range from single-chip solutions to complex networked arrays.

By Jeff Child, Editor-in-Chief

Commercial drones represent one of the most dynamic, fast-growing segments of embedded systems design today. And while all aspects of commercial drone technology are advancing, video is front and center. Because video is the main mission of the majority of commercial drones, video technology has become a center of gravity in today’s drone design decisions. But video covers a wide set of topics including single-chip video processing, 4k HD video capture, image stabilization, complex board-level video processing, drone-mounted cameras, hybrid IR/video camera and mesh-networks for integrated multiple drone camera streams.

Technology suppliers serving all of those areas are under pressure to deliver products to integrate into video processing, camera and communications electronics inside today’s commercial drones. Drone designers have to pack in an ambitious amount of functionality onto their platforms while keeping size, weight and power (SWaP) as low as possible. Feeding these needs, vendors at the chip, board and system-level continue to evolve their existing drone video technologies while also creating new innovative solutions.

Video Processing SOC

Exemplifying the cutting edge in single-chip video processing for drones, Ambarella in March introduced its CV2 camera SoC (Photo 1). It combines advanced computer vision, image processing, 4Kp60 video encoding and stereovision in a single chip. Targeting drone and related applications, the company says it delivers up to 20 times the deep neural network performance of Ambarella’s first generation CV1 chip. Fabricated in advanced 10nm process technology, CV2 offers extremely low power consumption.

Photo 1
The CV2 camera SoC combines advanced computer vision, image processing, 4Kp60 video encoding and stereovision in a single chip.

The CV2’s CVflow architecture provides computer vision processing up to 4K or 8-Megapixel resolution, to enable object recognition and perception over long distances and with high accuracy. Its stereovision processing provides the ability to detect generic objects without training. Advanced image processing with HDR (High Dynamic Range) processing delivers outstanding imaging even in low light and from high contrast scenes. Its highly efficient 4Kp60 AVC and HEVC video encoding supports the addition of video recording to drone platforms.

At the heart of the CV2 is a Quad-core 1.2 GHz ARM Cortex A53 with NEON DSP extensions and FPU. CV2 includes a full suite of advanced security features to prevent hacking, including secure boot, TrustZone and I/O virtualization. A complete set of tools is provided to help embedded systems developers easily port their own neural networks onto the CV2 SoC. This includes compiler, debugger and support for industry standard training tools including Caffe and TensorFlow, with extensive guidelines for CNN (Convolutional Neural Network) performance optimizations.

Board-Level Solutions

Moving up to the board-level, Sightline Applications specializes in onboard video processing for advanced camera systems. Its processor boards are designed to be integrated at the camera level to provide low-latency video processing on a variety of platforms including commercial drones. Sightline offers two low SWaP board products. Both products are supported by SLA’s Video Processing Software: a suite of video functions that are key in a wide variety of ISR applications. The processing software has two pricing tiers, SLE and SLA. SLE provides processing only and SLA processes the video and provides telemetry feedback. . …

Read the full article in the May 334 issue of Circuit Cellar

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Tiny i.MX8M Module Focuses on Streaming Media

By Eric Brown

Innocomm announced a 50 mm x 50 mm “WB10” module with an NXP i.MX8M Quad SoC, 8 GB eMMC, Wi-Fi-ac, BT 4.2, GbE, HDMI 2.0 with 4K HDR and audio I/O including SAI, SPDIF and DSD512.Among the many embedded products announced in recent weeks that run NXP’s 1.5 GHz, Cortex-A53-based i.MX8M SoC, Innocomm’s 50 mm x 500 mm WB10 is one of the smallest. The top prize goes to Variscite’s SODIMM-style, 55 mm x 30 mm DART-MX8M. Like Emcraft’s 80 mm x 60mm i.MX 8M SOM, the home entertainment focused WB10 supports only the quad-core i.MX8M instead of the dual-core model. Other i.MX8M modules include Compulab’s 68 mm x 42mm CL-SOM-iMX8.

WB10 (above) and NXP i.MX8M block diagram (below)
(click images to enlarge)
No OS support was listed, but all the other i.MX8M products we’ve seen have either run Linux or Linux and Android. The i.MX8M SoC incorporates a Vivante GC7000Lite GPU and VPU, enabling 4K HEVC/H265, H264, and VP9 video decoding with HDR. It also provides a 266MHz Cortex-M4 core for real-time tasks, as well as a security subsystem.

The WB10 module offers only 2 GB LPDDR4 instead of 4 GB for the other i.MX8M modules, and is also limited to 8GB eMMC. You do, however, get a GbE controller and onboard 802.11 a/b/g/n/ac with MIMO 2×2 and Bluetooth 4.2.

The WB10 is designed for Internet audio, home entertainment, and smart speaker applications, and offers more than the usual audio interfaces. Media I/O expressed via its three 80-pin connectors include HDMI 2.0a with 4K and HDR support, as well as MIPI-DSI, 2x MIPI-CSI, SPDIF Rx/Tx, 4x SAI and the high-end DSD512 audio interface.

WB10 block diagram (above) and WB10 mounted on optional carrier board (below)
(click images to enlarge)

You also get USB 3.0 host, USB 2.0 device, 2x I2C, 3x UART and single GPIO, PWM, SPI, and PCIe interfaces. No power or temperature range details were provided. The WB10 is also available with an optional, unnamed carrier board that is only slightly larger than the module itself. No more details were available. Further information

No pricing or availability information was provided for the WB10. More information may be found on Innocomm’s WB10 product page.

Innocomm | www.innocomm.com

This article originally appeared on LinuxGizmos.com on March 6.

Raspberry Pi IoT SBC Leverages Cypress Wi-Fi/Bluetooth SoC

Cypress Semiconductor has announced its Wi-Fi and Bluetooth combo solution is used on the new Raspberry Pi 3 Model B+ IoT single board computer. The Cypress CYW43455 single-chip combo provides high-performance 802.11ac Wi-Fi for faster Internet connections, advanced coexistence algorithms for simultaneous Bluetooth and Bluetooth Low Energy (BLE) operations such as audio and video streaming, and low-power BLE connections to smartphones, sensors and Bluetooth Mesh networks. The combo’s high-speed 802.11ac transmissions enable superior network performance, faster downloads and better range, as well as lower power consumption by quickly exploiting deep sleep modes. The Raspberry Pi 3 Model B+ board builds on the success of existing Raspberry Pi solutions using Cypress’ CYW43438 802.11n Wi-Fi and Bluetooth combo SoC.

Wi-Fi networks powered by 802.11ac simultaneously deliver low-latency and high-speed with secure device communication, making it the ideal wireless technology for connecting products directly to the cloud. The Raspberry Pi 3 Model B+ board with the highly-integrated Cypress CYW43455 combo SoC allows developers to quickly prototype industrial IoT systems and smart home products that leverage the benefits of 802.11ac.

The Raspberry Pi 3 Model B+ board features a 64-bit, quad-core processor running at 1.4 GHz, 1 GB RAM, full size HDMI, 4 standard USB ports, Gbit Ethernet over USB2, Power over Ethernet capability, CSI camera connector and a DSI display connector. The platform’s resources, together with its 802.11ac wireless LAN and Bluetooth/BLE wireless connectivity, provide a compact solution for intelligent edge-connected devices.

The Cypress CYW43455 SoC features a dual-band 2.4- and 5-GHz radio with 20-, 40- and 80-MHz channels with up to 433 Mbps performance. This fast 802.11ac throughput allows devices to get on and off of the network more quickly, preventing network congestion and prolonging battery life by letting devices spend more time in deep sleep modes. The SoC includes Linux open source Full Media Access Control (FMAC) driver support with enterprise and industrial features enabled, including security, roaming, voice and locationing.

Cypress’ CYW43455 SoC and other solutions support Bluetooth Mesh networks—low-cost, low-power mesh network of devices that can communicate with each other, and with smartphones, tablets and voice-controlled home assistants, via simple, secure and ubiquitous Bluetooth connectivity. Bluetooth Mesh enables battery-powered devices within the network to communicate with each other to easily provide coverage throughout even the largest homes, allowing a user to conveniently control all of the devices from the palm of their hand. The SoC is also supported in Cypress’ all-inclusive, turnkey Wireless Internet Connectivity for Embedded Devices (WICED) software development kit (SDK), which streamlines the integration of wireless technologies for IoT developers.

Cypress Semiconductor | www.cypress.com

Raspberry Pi Foundation | www.raspberrypi.org

NXP IoT Platform Links ARM/Linux Layerscape SoCs to Cloud

By Eric Brown

NXP’s “EdgeScale” suite of secure edge computing device management tools help deploy and manage Linux devices running on LSx QorIQ Layerscape SoCs, and connects them to cloud services.

NXP has added an EdgeScale suite of secure edge computing tools and services to its Linux-based Layerscape SDK for six of its networking oriented LSx QorIQ Layerscape SoCs. These include the quad-core, 1.6 GHz Cortex-A53 QorIQ LS1043A, which last year received Ubuntu Core support, as well as the octa-core, Cortex-A72 LS2088a (see farther below).



Simplified EdgeScale architecture
(click image to enlarge)
The cloud-based IoT suite is designed to remotely deploy, manage, and update edge computing devices built on Layerscape SoCs. EdgeScale bridges edge nodes, sensors, and other IoT devices to cloud frameworks, automating the provisioning of software and updates to remote embedded equipment. EdgeScale can be used to deploy container applications and firmware updates, as well as build containers and generate firmware.

The technology leverages the NXP Trust Architecture already built into Layerscape SoCs, which offers Hardware Root of Trust features. These include secure boot, secure key storage, manufacturing protection, hardware resource isolation, and runtime tamper detection.

The EdgeScale suite provides three levels of management: a “point-and-click” dashboard, a Command-Line-Interface (CLI), and the RESTful API, which enables “integration with any cloud computing framework,” as well as greater UI customization. The platform supports Ubuntu, Yocto, OpenWrt, or “any custom Linux distribution.”


Detailed EdgeScale architecture (above) and feature list (below)
(click images to enlarge)
EdgeScale supports cloud frameworks including Amazon’s AWS Greengrass, Alibaba’s Aliyun, Google Cloud, and Microsoft’s Azure IoT Edge. The latter was part of a separate announcement released in conjunction with the EdgeScale release that said that all Layerscape SoCs were being enabled with “secure execution for Azure IoT Edge computing running networking, data analytics, and compute-intensive machine learning applications.”

A year ago, NXP announced a Modular IoT Framework, which was described as a set of pre-integrated NXP hardware and software for IoT, letting customers mix and match technologies with greater assurance of interoperability. When asked how this was related to EdgeScale, Sam Fuller, head of system solutions for NXP’s digital networking group, replied: “EdgeScale is designed to manage higher level software that could have a role of processing the data and managing the communication to/from devices built from the Modular IoT Framework.”


LS102A block diagram
(click image to enlarge)
The EdgeScale suite supports the following QorIQ Layerscape processors:

  • LS102A — 80 0MHz single-core, Cortex-A53 with 1 W power consumption found on F&S’ efus A53LS module
  • LS1028A — dual-core ARMv8 with Time-Sensitive Networking (TSN)
  • LS1043A — 1.6 GHz quad-core, Cortex-A53 with 1 0GbE support, found on the QorIQ LS1043A 10G Residential Gateway Reference Design and the X-ES XPedite6401 XMC/PrPMC mezzanine module
  • LS1046A — quad-core, Cortex-A72 with dual 10 GbE support (also available in dual-core LS1026A model)
  • LS1088a — 1.5 GHz octa-core, Cortex-A53 with dual 10 GbE support, which is also supported on the XPedite6401
  • LS2088a — 2.0 GHz octa-core, Cortex-A72 with 128-bit NEON-based SIMD engine for each core, plus a 10GbE XAUI Fat Pipe interface or 4x 10GBASE-KR — found on X-ES XPedite6370 SBC.

Further information

NXP’s EdgeScale will be available by the end of the month. More information may be found on its EdgeScale product page.

NXP Semiconductors | www.nxp.com

This article originally appeared on LinuxGizmos.com on March 16.

BLE-Wi-Fi Module Solution Enables Compact IoT Gateways

Nordic Semiconductor announced that InnoComm Mobile Technology has employed Nordic’s nRF52832 Bluetooth Low Energy (Bluetooth LE) System-on-Chip (SoC) for its CM05 BLE-Wi-Fi Module. The CM05 is a compact module that combines Nordic’s Bluetooth LE solution with Wi-Fi and is designed to ease the development of IoT gateways. By combining these wireless technologies into one device, the developer eliminates the cost and complexity of working with separate Bluetooth LE and Wi-Fi modules.

A CM05-powered IoT gateway enables Bluetooth LE-equipped wireless products to connect to the Internet (via the Wi-Fi technology’s TCP/IP functionality), a key advantage for smart home and smart industry applications. The compact module enables developers to reduce gateway size, decrease production costs and speed time to market.

The Nordic SoC’s powerful 64 MHz, 32-bit Arm Cortex M4F processor provides ample processing power to both the Nordic’s S132 SoftDevice (a Bluetooth 5-certifed RF software protocol (“stack”)) and the Wi-Fi TCP/IP stack, eliminating the cost, space requirements and power demands of an additional processor. In addition, the Nordic SoC’s unique software architecture, which cleanly separates the SoftDevice from the developer’s application code, eases the development process. And when the gateway is deployed in the field, the solution enables rapid, trouble-free Over-the-Air Device Firmware Updates (OTA-DFU).

Nordic’s nRF52832 Bluetooth LE SoC supports Bluetooth 5, ANT and proprietary 2.4GHz RF protocol software and delivers up to 60 per cent more generic processing power, offering 10 times the Floating Point performance and twice the DSP performance compared to competing solutions. The SoC is supplied with the S132 SoftDevice for advanced Bluetooth LE applications. The S132 SoftDevice features Central, Peripheral, Broadcaster and Observer Bluetooth LE roles, supports up to twenty connections, and enables concurrent role operation.

Nordic Semiconductor | www.nordicsemi.com

 

SiFive Launches Linux-Capable RISC-V Based SoC

SiFive has launched the industry’s first Linux-capable RISC-V based processor SoC. The company demonstrated the first real-world use of the HiFive Unleashed board featuring the Freedom U540 SoC, based on its U54-MC Core IP, at the FOSDEM open source developer conference.

During the session, SiFive provided updates on the RISC-V Linux effort, surprising attendees with an announcement that the presentation had been run on the HiFive Unleashed development board. With the availability of the HiFive Unleashed board and Freedom U540 SoC, SiFive has brought to market the first multicore RISC-V chip designed for commercialization, and now offers the industry’s widest array of RISC-V based Core IP.

With the Freedom U540, the first RISC-V based, 64-bit 4+1 multicore SoC with support for full featured operating systems such as Linux, the HiFive Unleashed development board will greatly spur open-source software development. The underlying CPU, the U54-MC Core IP, is ideal for applications that need full operating system support such as artificial intelligence, machine learning, networking, gateways and smart IoT devices.

The company also announced its first hackathon, which will be held during the Embedded Linux Conference, March 12 to 14 in Portland, OR. The hackathon will enable registered SiFive Developers to be among the first test out SiFive’s HiFive Unleashed board featuring the U540 SoC.

Freedom U540 processor specs include:

  • 4+1 Multi-Core Coherent Configuration, up to 1.5 GHz
  • 4x U54 RV64GC Application Cores with Sv39 Virtual Memory Support
  • 1x E51 RV64IMAC Management Core
  • Coherent 2MB L2 Cache
  • 64-bit DDR4 with ECC
  • 1x Gigabit Ethernet
  • Built in 28nm process technology

The HiFive Unleased development board specs include:

  • SiFive Freedom U540 SoC
  • 8GB DDR4 with ECC for serious application development
  • Gigabit Ethernet Port
  • 32MB Quad SPI Flash
  • MicroSD Card for removable storage
  • FMC Connector for future expansion with add-in cards

Developers can purchase the HiFive Unleashed development board here. A limited batch of early access boards will ship in late March 2018, with a wider release in June. For more information or to register for the hackathon, visit www.sifive.com/products/hifive-unleashed/.

SiFive | www.sifive.com

Touch-Sensor Development Kit for ESP32

The ESP32-Sense Kit is a new touch-sensor development kit produced by Espressif Systems. It can be used for evaluating and developing the touch-sensing functionality of ESP32. The ESP32-Sense Kit consists of one motherboard and several daughterboards. The motherboard is made up of a display unit, a main control unit and a debug unit. The daughterboards can be used in different application scenarios, since the ESP32-Sense Kit supports a linear slider, a duplex slider, a wheel slider, matrix buttons, and spring buttons. Users can even design and add their own daughterboards for special use cases. The photo provides an overview of the ESP32-Sense Kit. The wheel slider, linear slider, duplex slider, motherboard, spring buttons, and matrix buttons, are shown in a clockwise direction.

The ESP32 SoC offers up to 10 capacitive I/Os that detect changes in capacitance on touch sensors due to finger contact or proximity. The chip’s internal capacitance detection circuit features low noise and high sensitivity. It allows users to use touch pads with smaller area to implement the touch detection function. Users can also use the touch panel array to detect a larger area or more test points.

The follow related resources are available to support ESP Sense Kit:

  • ESP32 t=Touch-Sensor Design: The reference design manual of the ESP32 touch-sensing system.
  • ESP32-Sense Project: Contains programs for the ESP32-Sense Kit, which can be downloaded to the development board to enable the touch-sensing function.
  • ESP-IDF: The SDK for ESP32. Provides information on how to set up the ESP32 software environment.
  • ESP-Prog: The ESP32 debugger.

Espressif Systems | www.espressif.com