Firms Collaborate on 3D Surround View System for Cars

Renesas Electronics and Magna, a mobility technology company and one of the world’s largest automotive suppliers, have teamed up to accelerate the mass adoption of advanced driving assistance system (ADAS) features with a new cost-efficient 3D surround view system designed for entry- and mid-range vehicles.
The 3D surround view system adopts Renesas’ high-performance, low-power system-on-chip (SoC) optimized for smart camera and surround view systems. By enabling 3D surround view safety capabilities, the new system helps automakers to deliver safer and more advanced vehicles to a larger number of car consumers, contributing to a safer vehicle society.

Magna’s 3D surround view system is a vehicle camera system that provides a 360-degree panoramic view to assist drivers when parking or performing low speed operations. Drivers can adjust the view of their surroundings with a simple-to-use interface, while object detection alerts drivers about obstacles in their path. The system provides drivers a realistic 360-degree view of their environment, a significant upgrade to the bird’s-eye view offered by existing parking assist systems. The ready-to-use system minimizes integration time and development costs, making the system an easy, cost-efficient option for automakers.

Several automakers have already expressed strong interest in the technology, including a European automaker, which will be the first to integrate the 3D surround view system into a future vehicle.

Renesas Electronics | www.renesas.com

SST and UMC Qualify Flash Tech on 40-nm Process

Microchip Technology subsidiary Silicon Storage Technology (SST) and United Microelectronics Corporation (UMC) have announced the full qualification and availability of SST’s embedded SuperFlash non-volatile memory on UMC’s 40 nm CMOS platform. The 40-nm process features a more than 20 percent reduction in embedded Flash cell size and a 20- to 30-percent reduction in macro area over their 55-nm process.
The high endurance of embedded SuperFlash IP offers System on a Chip (SoC) customers extensive reliability and design flexibility combined with reduced power usage. SST’s SuperFlash non-volatile memory technology is qualified for a minimum of 100,000 cycles, underscoring the technology’s reliability. Ideal for edge computing in IoT devices, SST embedded SuperFlash technology features power benefits that derive from low-power standby and read operations, with core supply as low as 0.81 V. SuperFlash also secures applications with code maintained on chip, which is the first step in preventing illegal access through hardware and software attacks.

 

SST’s SuperFlash technology complements UMC’s embedded memory portfolio with high density and low-power IP. Combined with SST’s inherent technology reliability, UMC’s flexible capacity and high-yield maturity for its 55 nm and 40 nm platform provides foundry customers the manufacturing support needed to build a range of product applications.

To date, more than 80 billion units have shipped with SST’s embedded SuperFlash technology. SuperFlash technology is based on a proprietary split-gate Flash memory cell with the following capabilities:

  • Low-power program, erase and read operations
  • High performance with fast read access
  • Good scalability from 1 µm technology node to 28 nm technology node
  • High endurance cycling up to 500,000 cycles
  • Excellent data retention of over 20 years
  • Good performance at high temperature for automotive-grade applications
  • Immunity to Stress-Induced Leakage Current (SILC)

Microchip Technology | www.microchip.com

Silicon Storage Technology | www.sst.com

Linux-Driven Modules and SBC Tap i.MX8, i.MX8M and iMX8X

By Eric Brown

Phytec has posted product pages for three PhyCore modules, all of which support Linux and offer a -40°C to 85°C temperature range. The three modules, which employ three different flavors of i.MX8, include a phyCORE-i.MX 8X COM, which is the first product we’ve seen that uses the dual- or quad-core Cortex-A35 i.MX8X.

phyCORE-i.MX 8X (top) and phyCORE-i.MX 8M (bottom – not to scale) (click images to enlarge)

The phyCORE-i.MX 8 taps the high-end, hexa-core -A72 and -A53 i.MX8, including the i.MX8 QuadMax. The phyCORE-i.MX 8M, which uses the more widely deployed dual- or quad-core i.MX8M, is the only module that appears as part of an announced SBC: the sandwich-style phyBoard-Polaris SBC (shown). The phyCORE-i.MX 8 will also eventually appear on an unnamed, crowd-sourced Pico-ITX SBC.

phyCORE-i.MX 8 (left) and NXP i.MX8 block diagram (bottom)
(click images to enlarge)

Development-only carrier boards will be available for the phyCORE-i.MX 8X and phyCORE-i.MX 8. Evaluation kits based on the carrier boards and the phyBoard-Polaris will include BSPs with a Yocto Project based Linux distribution “with pre-installed and configured packages such as QT-Libs, OpenGL and Python.” Android is also available, and QNX, FreeRTOS and other OSes are available on request. BSP documentation will include a hardware manual, quickstart instructions, application guides, and software and application examples.

 

i.MX8M, i.MX8X, and i.MX8 compared (click image to enlarge)

The three modules are here presented in order of ascending processing power.

phyCore-i.MX 8X

The i.MX8X SoC found on the petite phyCORE-i.MX 8X module was announced with other i.MX8 processors in Oct. 2016 and was more fully revealed in Mar. 2017. The industrial IoT focused i.MX8X includes up to 4x cores that comply with Arm’s rarely used Cortex-A35 successor to the Cortex-A7 design.

phyCore-i.MX 8X (top) and block diagram (bottom)
(click images to enlarge)

The 28 nm fabricated, ARMv8 Cortex-A35 cores are claimed to draw about 33 percent less power per core and occupy 25 percent less silicon area than Cortex-A53. Phytec’s comparison chart shows the i.MX8X with 5,040 to 10,800 DMIPS performance, which is surprisingly similar to the 3,450 to 13,800 range provided by the Cortex-A53 based i.MX8M (see above).The i.MX8X SoC is further equipped with a single Cortex-M4 microcontroller, a Tensilica HiFi 4 DSP, and a multi-format VPU that supports up to 4K playback and HD encode. It uses the same Vivante GC7000Lite GPU found on the i.MX8M, with up to 28 GFLOPS.

i.MX8X block diagram
(click image to enlarge)

The i.MX8X features ECC memory support, reduced soft-error-rate (SER) technology, hardware virtualization, and other industrial and automotive safety related features. Crypto features listed for the phyCore-i.MX 8X COM include AES, 3DES, RSA, ECC Ciphers, SHA1/256, and TRNG.

PhyCore-i.MX7

Phytec’s 52 mm x 42 mm phyCore-i.MX 8X is only slightly larger than the i.MX7-based PhyCore-i.MX7, but the layout is different. The module supports all three i.MX8X models: the quad-core i.MX8 QuadXPlus and the dual-core i.MX8 DualXPlus and i.MX8 DualX, all of which can clock up to 1.2 GHz. The DualX model differs in that it has a 2-shader instead of 4-shader Vivante GPU.

The phyCore-i.MX 8X offers a smorgasbord of memories. In addition to the “128 kB multimedia,” and “64 kB Secure” found on the i.MX8X itself, the module can be ordered with 512 MB to 4 GB of LPDDR4 RAM and 64 MB to 256 MB of Micron Octal SPI/DualSPI flash. (Phytec notes that it is an official member of Micron’s Xccela consortium.) You can choose between 128 MB to 1 GB NAND flash or  4GB to 128 GB eMMC.

There’s no onboard wireless, but you get dual GbE controllers (1x onboard, 1x RGMII). You can choose between 2x LVDS and 2x MIPI-DSI. There are MIPI-CSI and parallel camera interfaces, as well as ESAI based audio.

Other I/O available through the 280 pins found on its two banks of dual 70-pin connectors include USB 3.0, USB OTG, PCI/PCIe, and up to 10x I2C. You also get 2x UART, 3x CAN, 6x A/D, and single PWM, keypad, or MMC/SD/SDIO (but only if you choose the eMMC over NAND). For SPI you get a choice of a single Octal connection or 2x “Quad SPI + 3 SPI” interfaces.

 

phyCore-i.MX 8X carrier board
(click image to enlarge)

The 3.3 V module supports an RTC, and offers watchdog and tamper features. Like all the new Phytec modules, you get -40°C to 85°C support. No details were available on the carrier shown in the image above.

phyCORE-i.MX 8M

The 55 mm x 40 mm phyCORE-i.MX 8M joins a growing number of Linux-driven i.MX8M modules including Compulab’s CL-SOM-iMX8, Emcraft’s i.MX 8M SOM, Innocom’s WB10, Seco’s SM-C12, SolidRun’s i.MX8 SOM, and the smallest of the lot to date: Variscite’s 55 x 30mm DART-MX8M. There are also plenty of SBCs to compete with the phyCORE-i.MX 8M-equipped phyBoard-Polaris SBC (see farther below), but like most of the COMs, most have yet to ship.

phyCORE-i.MX 8M top) and block diagram (bottom) (click images to enlarge)

The phyCORE-i.MX 8M supports the NXP i.MX8M Quad and QuadLite, both with 4x Cortex-A53 cores, as well as the dual-core Dual. All are clocked to 1.5 GHz. They all have 266MHz Cortex-M4F cores and Vivante GC7000Lite GPUs, but only the Quad and Dual models support 4Kp60, H.265, and VP9 video capabilities. (NXP also has a Solo model that we have yet to see, which offers a single -A53 core, a Cortex-M4F, and a GC7000nanoUltra GPU.)In addition to the i.MX8M SoC, which offers “128 KB + 32 KB” RAM and the same crypto features found on the i.MX8X, the module ships with the same memory features as the phyCore-i.MX 8X except that it lacks the SPI flash. Once again, you get 512 MB to  4 GB of LPDDR4 RAM and either 128 MB to 1 GB NAND flash or 4 GB to 128 GB eMMC. There is also SPI driven “Nand/QSPI” flash.

There’s a single GbE controller, and although not listed in the spec list, the product page says that precertified WiFi and Bluetooth BLE 4.2 are onboard and accompanied by antennas.

Multimedia support includes MIPI-DSI, HDMI 2.0, 2x MIPI-CSI, and up to 5x SAI audio. The block diagram also lists eDP, possibly as a replacement for HDMI.

Other interfaces expressed via the dual 200-pin connectors include 2x USB 3.0, 4x UART, 4x I2C, 4x PWM, and single SDIO and PCI/PCIe connections. SPI support includes 2x SPI and the aforementioned Nand/QSPI. The 3.3V module supports an RTC, watchdog, and tamper protections.

phyBoard-Polaris SBC

The phyCORE-i.MX 8M is also available soldered onto a carrier board that will be sold as a monolithic phyBoard-Polaris SBC. The 100 mm x 100 mm phyBoard-Polaris SBC features the Quad version of the phyCORE-i.MX 8M clocked to 1.3 GHz, loaded with 1 GB KPDDR4 and 8 GB eMMC. The SBC also adds a microSD slot.

phyBoard-Polaris SBC
(click image to enlarge)

The phyBoard-Polaris SBC is further equipped with single GbE, USB 3.0 and USB OTG ports. There’s also an RS-232 port and MIPI-DSI and SAID audio interfaces made available via A/V connectors. Dual MIPI-CSI interfaces are also onboard.A mini-PCIe slot and GPIO slot are available for expansion. The latter includes SPI, UART, JTAG, NAND, USB, SPDIF and DIO.

Other features include a reset button, RTC with coin cell, and JTAG via a debug adapter (PEB-EVAL). There’s a 12 V – 24 V input and adapter, and the board offers the same industrial temperature support as all the new Phytec modules.

phyCORE-i.MX 8

The phyCORE-i.MX 8, which is said to be “ideal for image and speech recognition,” is the third module we’ve seen to support NXP’s top-of-the-line, 64-bit i.MX8 series. The module supports all three flavors of i.MX8 while the other two COMs we’ve seen have been limited to the high-end QuadMax: Toradex’s Apalis iMX8 and iWave’s iW-RainboW-G27M.

phyCORE-i.MX 8 (top) and block diagram (bottom)
(click images to enlarge)

Like Rockchip’s RK3399, NXP’s hexa-core i.MX8 QuadMax features dual high-end Cortex-A72 cores clocked to up to 1.6 GHz plus four Cortex-A53 cores. The i.MX8 QuadPlus design is the same, but with only one Cortex-A72 core, and the quad has no -A72 cores.All three i.MX8 models provide two Cortex-M4F cores for real-time processing, a Tensilica HiFi 4 DSP, and two Vivante GC7000LiteXS/VX GPUs. The SoC’s “full-chip hardware-based virtualization, resource partitioning and split GPU and display architecture enable safe and isolated execution of multiple systems on one processor,” says Phytec.

The 73 mm x 45 mm phyCORE-i.MX 8 supports up to 8 GB LPDDR4 RAM, according to the product page highlights list, while the spec list itself says 1 GB to 64 GB. Like the phyCORE-i.MX 8X, the module provides 64 MB to 256 MB of Micron Octal SPI/DualSPI flash. There’s no NAND option, but you get 4 GB to 128 GB eMMC.

The phyCORE-i.MX 8 lacks WiFi, but you get dual GbE controllers. Other features expressed via the 480 connection pins include single USB 3.0, USB OTG, and PCIe 2.0 based SATA interfaces. Dual PCIe interfaces are also available

The module provides a 4K-ready HDMI output, 2x LVDS, and 2x MIPI-DSI for up 4x simultaneous HD screens. For image capture you get 2x MIPI-CSI and an HDMI input. Audio features are listed as “2x ESAI up to 4 SAI.”

The phyCORE-i.MX 8 is further equipped with I/O including 2x UART, 2x CAN, 2x MMC/SD/SDIO, 8x A/D, up to 19x I2C, and a PWM interface. For SPI, you get “up to 4x + 1x QSPI.” The module supports an RTC and offers industrial temperature support.

phyCORE-i.MX 8 carrier board (click image to enlarge)

In addition to the unnamed carrier board for the phyCORE-i.MX 8 module shown above, Phytec plans to produce a “Machine Vision and Camera kit” to exploit i.MX8 multimedia features including the VPU, the Vivante GPU’s Vulkan and OGL support, and interfaces including MIPI-DSI, MIPI-CSI, HDMI, and LVDS. In addition, the company will offer rapid prototyping services for customizing customer-specific hardware I/O platforms.Finally, Phytec is planning to develop a smaller, Pico-ITX form factor SBC based on the i.MX8 SoC, and it’s taking a novel approach to do so. The company has launched a Cre-8 community which intends to crowdsource the SBC. The company is seeking developers to join this alpha-stage project to contribute ideas. We saw no promises of open source hardware support, however.

Further information

[As of March 29] No availability information was provided for the phyCORE-i.MX 8X, phyCORE-i.MX 8M, or phyCORE-i.MX 8 modules, but the phyCORE-i.MX 8M-based phyBoard-Polaris is due in the third quarter. More information may be found in Phytec’s phyCORE-i.MX 8X, phyCORE-i.MX 8M, and phyCORE-i.MX 8 product pages as well as the phyBoard-Polaris SBC product page. More on development kits for all these boards may be found here.

This article originally appeared on LinuxGizmos.com on March 29.

Phytec issue a Press Release announcing these products on April 19.
UPDATE: “Early access program sampling for the phyCORE-i.MX8 and phyCORE-i.MX8M is planned for Q3 2018, with general availability expected in Q4 2018.”

Phytec | www.phytec.eu

Drones Tap a Variety of Video Solutions

Eyes in the Skies

In one way or another, much of today’s commercial drone development revolves around video. Technology options range from single-chip solutions to complex networked arrays.

By Jeff Child, Editor-in-Chief

Commercial drones represent one of the most dynamic, fast-growing segments of embedded systems design today. And while all aspects of commercial drone technology are advancing, video is front and center. Because video is the main mission of the majority of commercial drones, video technology has become a center of gravity in today’s drone design decisions. But video covers a wide set of topics including single-chip video processing, 4k HD video capture, image stabilization, complex board-level video processing, drone-mounted cameras, hybrid IR/video camera and mesh-networks for integrated multiple drone camera streams.

Technology suppliers serving all of those areas are under pressure to deliver products to integrate into video processing, camera and communications electronics inside today’s commercial drones. Drone designers have to pack in an ambitious amount of functionality onto their platforms while keeping size, weight and power (SWaP) as low as possible. Feeding these needs, vendors at the chip, board and system-level continue to evolve their existing drone video technologies while also creating new innovative solutions.

Video Processing SOC

Exemplifying the cutting edge in single-chip video processing for drones, Ambarella in March introduced its CV2 camera SoC (Photo 1). It combines advanced computer vision, image processing, 4Kp60 video encoding and stereovision in a single chip. Targeting drone and related applications, the company says it delivers up to 20 times the deep neural network performance of Ambarella’s first generation CV1 chip. Fabricated in advanced 10nm process technology, CV2 offers extremely low power consumption.

Photo 1
The CV2 camera SoC combines advanced computer vision, image processing, 4Kp60 video encoding and stereovision in a single chip.

The CV2’s CVflow architecture provides computer vision processing up to 4K or 8-Megapixel resolution, to enable object recognition and perception over long distances and with high accuracy. Its stereovision processing provides the ability to detect generic objects without training. Advanced image processing with HDR (High Dynamic Range) processing delivers outstanding imaging even in low light and from high contrast scenes. Its highly efficient 4Kp60 AVC and HEVC video encoding supports the addition of video recording to drone platforms.

At the heart of the CV2 is a Quad-core 1.2 GHz ARM Cortex A53 with NEON DSP extensions and FPU. CV2 includes a full suite of advanced security features to prevent hacking, including secure boot, TrustZone and I/O virtualization. A complete set of tools is provided to help embedded systems developers easily port their own neural networks onto the CV2 SoC. This includes compiler, debugger and support for industry standard training tools including Caffe and TensorFlow, with extensive guidelines for CNN (Convolutional Neural Network) performance optimizations.

Board-Level Solutions

Moving up to the board-level, Sightline Applications specializes in onboard video processing for advanced camera systems. Its processor boards are designed to be integrated at the camera level to provide low-latency video processing on a variety of platforms including commercial drones. Sightline offers two low SWaP board products. Both products are supported by SLA’s Video Processing Software: a suite of video functions that are key in a wide variety of ISR applications. The processing software has two pricing tiers, SLE and SLA. SLE provides processing only and SLA processes the video and provides telemetry feedback. . …

Read the full article in the May 334 issue of Circuit Cellar

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Tiny i.MX8M Module Focuses on Streaming Media

By Eric Brown

Innocomm announced a 50 mm x 50 mm “WB10” module with an NXP i.MX8M Quad SoC, 8 GB eMMC, Wi-Fi-ac, BT 4.2, GbE, HDMI 2.0 with 4K HDR and audio I/O including SAI, SPDIF and DSD512.Among the many embedded products announced in recent weeks that run NXP’s 1.5 GHz, Cortex-A53-based i.MX8M SoC, Innocomm’s 50 mm x 500 mm WB10 is one of the smallest. The top prize goes to Variscite’s SODIMM-style, 55 mm x 30 mm DART-MX8M. Like Emcraft’s 80 mm x 60mm i.MX 8M SOM, the home entertainment focused WB10 supports only the quad-core i.MX8M instead of the dual-core model. Other i.MX8M modules include Compulab’s 68 mm x 42mm CL-SOM-iMX8.

WB10 (above) and NXP i.MX8M block diagram (below)
(click images to enlarge)
No OS support was listed, but all the other i.MX8M products we’ve seen have either run Linux or Linux and Android. The i.MX8M SoC incorporates a Vivante GC7000Lite GPU and VPU, enabling 4K HEVC/H265, H264, and VP9 video decoding with HDR. It also provides a 266MHz Cortex-M4 core for real-time tasks, as well as a security subsystem.

The WB10 module offers only 2 GB LPDDR4 instead of 4 GB for the other i.MX8M modules, and is also limited to 8GB eMMC. You do, however, get a GbE controller and onboard 802.11 a/b/g/n/ac with MIMO 2×2 and Bluetooth 4.2.

The WB10 is designed for Internet audio, home entertainment, and smart speaker applications, and offers more than the usual audio interfaces. Media I/O expressed via its three 80-pin connectors include HDMI 2.0a with 4K and HDR support, as well as MIPI-DSI, 2x MIPI-CSI, SPDIF Rx/Tx, 4x SAI and the high-end DSD512 audio interface.

WB10 block diagram (above) and WB10 mounted on optional carrier board (below)
(click images to enlarge)

You also get USB 3.0 host, USB 2.0 device, 2x I2C, 3x UART and single GPIO, PWM, SPI, and PCIe interfaces. No power or temperature range details were provided. The WB10 is also available with an optional, unnamed carrier board that is only slightly larger than the module itself. No more details were available. Further information

No pricing or availability information was provided for the WB10. More information may be found on Innocomm’s WB10 product page.

Innocomm | www.innocomm.com

This article originally appeared on LinuxGizmos.com on March 6.

Raspberry Pi IoT SBC Leverages Cypress Wi-Fi/Bluetooth SoC

Cypress Semiconductor has announced its Wi-Fi and Bluetooth combo solution is used on the new Raspberry Pi 3 Model B+ IoT single board computer. The Cypress CYW43455 single-chip combo provides high-performance 802.11ac Wi-Fi for faster Internet connections, advanced coexistence algorithms for simultaneous Bluetooth and Bluetooth Low Energy (BLE) operations such as audio and video streaming, and low-power BLE connections to smartphones, sensors and Bluetooth Mesh networks. The combo’s high-speed 802.11ac transmissions enable superior network performance, faster downloads and better range, as well as lower power consumption by quickly exploiting deep sleep modes. The Raspberry Pi 3 Model B+ board builds on the success of existing Raspberry Pi solutions using Cypress’ CYW43438 802.11n Wi-Fi and Bluetooth combo SoC.

Wi-Fi networks powered by 802.11ac simultaneously deliver low-latency and high-speed with secure device communication, making it the ideal wireless technology for connecting products directly to the cloud. The Raspberry Pi 3 Model B+ board with the highly-integrated Cypress CYW43455 combo SoC allows developers to quickly prototype industrial IoT systems and smart home products that leverage the benefits of 802.11ac.

The Raspberry Pi 3 Model B+ board features a 64-bit, quad-core processor running at 1.4 GHz, 1 GB RAM, full size HDMI, 4 standard USB ports, Gbit Ethernet over USB2, Power over Ethernet capability, CSI camera connector and a DSI display connector. The platform’s resources, together with its 802.11ac wireless LAN and Bluetooth/BLE wireless connectivity, provide a compact solution for intelligent edge-connected devices.

The Cypress CYW43455 SoC features a dual-band 2.4- and 5-GHz radio with 20-, 40- and 80-MHz channels with up to 433 Mbps performance. This fast 802.11ac throughput allows devices to get on and off of the network more quickly, preventing network congestion and prolonging battery life by letting devices spend more time in deep sleep modes. The SoC includes Linux open source Full Media Access Control (FMAC) driver support with enterprise and industrial features enabled, including security, roaming, voice and locationing.

Cypress’ CYW43455 SoC and other solutions support Bluetooth Mesh networks—low-cost, low-power mesh network of devices that can communicate with each other, and with smartphones, tablets and voice-controlled home assistants, via simple, secure and ubiquitous Bluetooth connectivity. Bluetooth Mesh enables battery-powered devices within the network to communicate with each other to easily provide coverage throughout even the largest homes, allowing a user to conveniently control all of the devices from the palm of their hand. The SoC is also supported in Cypress’ all-inclusive, turnkey Wireless Internet Connectivity for Embedded Devices (WICED) software development kit (SDK), which streamlines the integration of wireless technologies for IoT developers.

Cypress Semiconductor | www.cypress.com

Raspberry Pi Foundation | www.raspberrypi.org

NXP IoT Platform Links ARM/Linux Layerscape SoCs to Cloud

By Eric Brown

NXP’s “EdgeScale” suite of secure edge computing device management tools help deploy and manage Linux devices running on LSx QorIQ Layerscape SoCs, and connects them to cloud services.

NXP has added an EdgeScale suite of secure edge computing tools and services to its Linux-based Layerscape SDK for six of its networking oriented LSx QorIQ Layerscape SoCs. These include the quad-core, 1.6 GHz Cortex-A53 QorIQ LS1043A, which last year received Ubuntu Core support, as well as the octa-core, Cortex-A72 LS2088a (see farther below).



Simplified EdgeScale architecture
(click image to enlarge)
The cloud-based IoT suite is designed to remotely deploy, manage, and update edge computing devices built on Layerscape SoCs. EdgeScale bridges edge nodes, sensors, and other IoT devices to cloud frameworks, automating the provisioning of software and updates to remote embedded equipment. EdgeScale can be used to deploy container applications and firmware updates, as well as build containers and generate firmware.

The technology leverages the NXP Trust Architecture already built into Layerscape SoCs, which offers Hardware Root of Trust features. These include secure boot, secure key storage, manufacturing protection, hardware resource isolation, and runtime tamper detection.

The EdgeScale suite provides three levels of management: a “point-and-click” dashboard, a Command-Line-Interface (CLI), and the RESTful API, which enables “integration with any cloud computing framework,” as well as greater UI customization. The platform supports Ubuntu, Yocto, OpenWrt, or “any custom Linux distribution.”


Detailed EdgeScale architecture (above) and feature list (below)
(click images to enlarge)
EdgeScale supports cloud frameworks including Amazon’s AWS Greengrass, Alibaba’s Aliyun, Google Cloud, and Microsoft’s Azure IoT Edge. The latter was part of a separate announcement released in conjunction with the EdgeScale release that said that all Layerscape SoCs were being enabled with “secure execution for Azure IoT Edge computing running networking, data analytics, and compute-intensive machine learning applications.”

A year ago, NXP announced a Modular IoT Framework, which was described as a set of pre-integrated NXP hardware and software for IoT, letting customers mix and match technologies with greater assurance of interoperability. When asked how this was related to EdgeScale, Sam Fuller, head of system solutions for NXP’s digital networking group, replied: “EdgeScale is designed to manage higher level software that could have a role of processing the data and managing the communication to/from devices built from the Modular IoT Framework.”


LS102A block diagram
(click image to enlarge)
The EdgeScale suite supports the following QorIQ Layerscape processors:

  • LS102A — 80 0MHz single-core, Cortex-A53 with 1 W power consumption found on F&S’ efus A53LS module
  • LS1028A — dual-core ARMv8 with Time-Sensitive Networking (TSN)
  • LS1043A — 1.6 GHz quad-core, Cortex-A53 with 1 0GbE support, found on the QorIQ LS1043A 10G Residential Gateway Reference Design and the X-ES XPedite6401 XMC/PrPMC mezzanine module
  • LS1046A — quad-core, Cortex-A72 with dual 10 GbE support (also available in dual-core LS1026A model)
  • LS1088a — 1.5 GHz octa-core, Cortex-A53 with dual 10 GbE support, which is also supported on the XPedite6401
  • LS2088a — 2.0 GHz octa-core, Cortex-A72 with 128-bit NEON-based SIMD engine for each core, plus a 10GbE XAUI Fat Pipe interface or 4x 10GBASE-KR — found on X-ES XPedite6370 SBC.

Further information

NXP’s EdgeScale will be available by the end of the month. More information may be found on its EdgeScale product page.

NXP Semiconductors | www.nxp.com

This article originally appeared on LinuxGizmos.com on March 16.

BLE-Wi-Fi Module Solution Enables Compact IoT Gateways

Nordic Semiconductor announced that InnoComm Mobile Technology has employed Nordic’s nRF52832 Bluetooth Low Energy (Bluetooth LE) System-on-Chip (SoC) for its CM05 BLE-Wi-Fi Module. The CM05 is a compact module that combines Nordic’s Bluetooth LE solution with Wi-Fi and is designed to ease the development of IoT gateways. By combining these wireless technologies into one device, the developer eliminates the cost and complexity of working with separate Bluetooth LE and Wi-Fi modules.

A CM05-powered IoT gateway enables Bluetooth LE-equipped wireless products to connect to the Internet (via the Wi-Fi technology’s TCP/IP functionality), a key advantage for smart home and smart industry applications. The compact module enables developers to reduce gateway size, decrease production costs and speed time to market.

The Nordic SoC’s powerful 64 MHz, 32-bit Arm Cortex M4F processor provides ample processing power to both the Nordic’s S132 SoftDevice (a Bluetooth 5-certifed RF software protocol (“stack”)) and the Wi-Fi TCP/IP stack, eliminating the cost, space requirements and power demands of an additional processor. In addition, the Nordic SoC’s unique software architecture, which cleanly separates the SoftDevice from the developer’s application code, eases the development process. And when the gateway is deployed in the field, the solution enables rapid, trouble-free Over-the-Air Device Firmware Updates (OTA-DFU).

Nordic’s nRF52832 Bluetooth LE SoC supports Bluetooth 5, ANT and proprietary 2.4GHz RF protocol software and delivers up to 60 per cent more generic processing power, offering 10 times the Floating Point performance and twice the DSP performance compared to competing solutions. The SoC is supplied with the S132 SoftDevice for advanced Bluetooth LE applications. The S132 SoftDevice features Central, Peripheral, Broadcaster and Observer Bluetooth LE roles, supports up to twenty connections, and enables concurrent role operation.

Nordic Semiconductor | www.nordicsemi.com

 

SiFive Launches Linux-Capable RISC-V Based SoC

SiFive has launched the industry’s first Linux-capable RISC-V based processor SoC. The company demonstrated the first real-world use of the HiFive Unleashed board featuring the Freedom U540 SoC, based on its U54-MC Core IP, at the FOSDEM open source developer conference.

During the session, SiFive provided updates on the RISC-V Linux effort, surprising attendees with an announcement that the presentation had been run on the HiFive Unleashed development board. With the availability of the HiFive Unleashed board and Freedom U540 SoC, SiFive has brought to market the first multicore RISC-V chip designed for commercialization, and now offers the industry’s widest array of RISC-V based Core IP.

With the Freedom U540, the first RISC-V based, 64-bit 4+1 multicore SoC with support for full featured operating systems such as Linux, the HiFive Unleashed development board will greatly spur open-source software development. The underlying CPU, the U54-MC Core IP, is ideal for applications that need full operating system support such as artificial intelligence, machine learning, networking, gateways and smart IoT devices.

The company also announced its first hackathon, which will be held during the Embedded Linux Conference, March 12 to 14 in Portland, OR. The hackathon will enable registered SiFive Developers to be among the first test out SiFive’s HiFive Unleashed board featuring the U540 SoC.

Freedom U540 processor specs include:

  • 4+1 Multi-Core Coherent Configuration, up to 1.5 GHz
  • 4x U54 RV64GC Application Cores with Sv39 Virtual Memory Support
  • 1x E51 RV64IMAC Management Core
  • Coherent 2MB L2 Cache
  • 64-bit DDR4 with ECC
  • 1x Gigabit Ethernet
  • Built in 28nm process technology

The HiFive Unleased development board specs include:

  • SiFive Freedom U540 SoC
  • 8GB DDR4 with ECC for serious application development
  • Gigabit Ethernet Port
  • 32MB Quad SPI Flash
  • MicroSD Card for removable storage
  • FMC Connector for future expansion with add-in cards

Developers can purchase the HiFive Unleashed development board here. A limited batch of early access boards will ship in late March 2018, with a wider release in June. For more information or to register for the hackathon, visit www.sifive.com/products/hifive-unleashed/.

SiFive | www.sifive.com

Touch-Sensor Development Kit for ESP32

The ESP32-Sense Kit is a new touch-sensor development kit produced by Espressif Systems. It can be used for evaluating and developing the touch-sensing functionality of ESP32. The ESP32-Sense Kit consists of one motherboard and several daughterboards. The motherboard is made up of a display unit, a main control unit and a debug unit. The daughterboards can be used in different application scenarios, since the ESP32-Sense Kit supports a linear slider, a duplex slider, a wheel slider, matrix buttons, and spring buttons. Users can even design and add their own daughterboards for special use cases. The photo provides an overview of the ESP32-Sense Kit. The wheel slider, linear slider, duplex slider, motherboard, spring buttons, and matrix buttons, are shown in a clockwise direction.

The ESP32 SoC offers up to 10 capacitive I/Os that detect changes in capacitance on touch sensors due to finger contact or proximity. The chip’s internal capacitance detection circuit features low noise and high sensitivity. It allows users to use touch pads with smaller area to implement the touch detection function. Users can also use the touch panel array to detect a larger area or more test points.

The follow related resources are available to support ESP Sense Kit:

  • ESP32 t=Touch-Sensor Design: The reference design manual of the ESP32 touch-sensing system.
  • ESP32-Sense Project: Contains programs for the ESP32-Sense Kit, which can be downloaded to the development board to enable the touch-sensing function.
  • ESP-IDF: The SDK for ESP32. Provides information on how to set up the ESP32 software environment.
  • ESP-Prog: The ESP32 debugger.

Espressif Systems | www.espressif.com

 

Two Graphics Industry Leaders Join AMD RTG

AMD has announced the appointment of Mike Rayfield as senior vice president and general manager of AMD Radeon Technologies Group (RTG), and David Wang as senior vice president of engineering for RTG. Both will report to President and CEO Dr. Lisa Su. Rayfield will be responsible for all aspects of strategy and business management for AMD’s graphics business including consumer graphics, professional graphics and semi-custom products. Wang will be responsible for all aspects of graphics engineering, including the technical strategy, architecture, hardware and software for AMD graphics products and technologies.

Rayfield brings to AMD more than 30 years of technology industry experience focused on growth, building deep customer relationships, and driving results. Rayfield joins AMD from Micron Technology, where he was senior vice president and general manager of the Mobile Business Unit. Under Rayfield’s leadership, Micron’s mobile business achieved significant revenue growth and improved profitability. Prior to Micron, Rayfield served as general manager of the Mobile Business Unit at Nvidia, where he led the team that created Tegra.

With more than 25 years of graphics and silicon development experience, Wang brings deep technical expertise and an excellent track record in managing complex silicon development to AMD. Wang rejoins AMD from Synaptics, where he was senior vice president of Systems Silicon Engineering responsible for silicon systems development of Synaptics products. Under Wang’s leadership, Synaptics more than quadrupled its design team through acquisition and organic growth. Prior to joining Synaptics, Wang was corporate vice president at AMD responsible for SoC development of AMD processor products, including GPUs, CPUs and APUs. Previously, Wang held various technical and management positions at ATI, ArtX, SGI, Axil Workstations and LSI Logic.

AMD | www.amd.com

Analyst 2017 Review: Mobile Devices Dominated GPU Market

Jon Peddie Research (JPR), a market research and consulting firm focused on graphics and multimedia offers its annual review of GPU developments for 2017. In spite of the slow decline of the PC market overall, PC-based GPU sales, which include workstations, have been increasing, according to the review. In the mobile market, integrated GPUs have risen at the same rate as mobile devices and the SoCs in them. The same is true for the console market where integrated graphics are in every console and they too have increased in sales over the year.

Nearly 28% of the world’s population bought a GPU device in 2017, and that’s in addition to the systems already in use. And yet, probably less than half of them even know what the term GPU stands for, or what it does. To them the technology is invisible, and that means it’s working—they don’t have to know about it.

The market for, and use of, GPUs stretches from supercomputers and medical devices to gaming machines, mobile devices, automobiles, and wearables. Just about everyone in the industrialized world has at least a half dozen products with one a GPU, and technophiles can easily count a dozen or more. The manufacturing of GPUs approaches science fiction with features that will move below 10 nm next year and have a glide-path to 3 nm, and some think even 1 nm—Moore’s law is far from dead, but is getting trickier to coax out of the genie’s bottle as we drive into subatomic realms that can only be modeled and not seen.

Over the past 12 months JPR has a seen a few new, and some clever adaptations of GPUs that show the path for future developments and subsequent applications. 2017 was an amazing year for GPU development driven by games, eSports, AI, crypto currency mining, and simulations. Autonomous vehicles started to become a reality, as did augmented reality. The over-hyped consumer-based PC VR market explosion didn’t happen, and had little to no impact on GPU developments or sales. Most of the participants in VR already had a high-end system and the HMD was just another display to them.

Mobile GPUs, exemplified by products from Qualcomm, ARM and Imagination Technologies are key to amazing devices with long battery life, screens at or approaching 4K, and in 2017 people started talking about and showing HDR.

JPR’s review says that many, if not all, the developments we will see in 2018 were started as early as 2015, and that three to four-year lead time will continue. Lead times could get longer as we learn how to deal with chips constructed with billions of transistor manufactured at feature sizes smaller than X-rays. Ironically, buying cycles are also accelerating ensuring strong competition as players try to leap-frog each other in innovation. According to JPR, we’ll see considerable innovation in 2018, with AI being the leading application that will permeate every sector of our lives.

The JPR GPU Developments in 2017 Report is free to all subscribers of JPR. Individual copies of the report can be purchased for $100.

Jon Peddie Research | www.jonpeddie.com

Kit for R-Car V3M SoC Speeds Development

Renesas Electronics has announced the R-Car V3M Starter Kit to simplify and speed up the development of New Car Assessment Program (NCAP) front camera applications, surround view system, and LiDARs. The new starter kit is based on the R-Car V3M image recognition system-on-chip (SoC), delivering a combination of low power consumption and high performance for the growing NCAP front camera market. By combining the R-Car V3M starter kit with supporting software and tools, system developers can easily develop front camera applications, contributing to reduced development efforts and faster time-to-market.

Renesas also announced an enhancement to the R-Car V3M by integrating a new, highly power-efficient hardware accelerator for high-performance convolutional neural networks (CNNs), which enables features such as road detection or object classification that are increasingly used in automotive applications. The R-Car V3M’s innovative hardware accelerator enables CNNs to execute at ultra-low power consumption levels that cannot be reached when CNNs are running on CPUs or GPUs.

The new R-Car V3M Starter Kit, the R-Car V3M SoC, and supporting software and tools including Renesas’ open-source e² studio IDE integrated development environment (IDE), are part of Renesas’ open, innovative, and trusted Renesas autonomy Platform for ADAS and automated driving that delivers total end-to-end solutions scaling from cloud to sensing and vehicle control.

The new starter kit is a ready-to-use kit. In addition to the required interface and tools, the kit provides essential components for ADAS and automated driving development, including 2GB RAM, 4GB eMMC (embedded multi-media controller) onboard memory, Ethernet, display outputs, and interfaces for debugging. The integrated 440-pin expansion port gives full freedom for system manufacturers to develop application-specific expansion boards for a wide range of computing applications, from a simple advanced computer vision development environment to prototyping of multi-camera systems for applications such as surround view. This board flexibility reduces the time needed for hardware development in addition to maintaining a high degree of software portability and reusability.

The R-Car V3M Starter Kit is supported by a Linux Board Support Package (BSP), which is available through elinux.org. Further commercial operating systems will be made available from next year onwards. Codeplay will enable OpenCL and SYCL on the starter kit in Q1 2018. Further tools, sample code and application notes for computer vision and image processing will be provided throughout 2018. Renesas enables several tools on the R-Car V3M Starter Kit including Renesas e² studio toolchain and tools for debugging, which ease the development burden and enable faster time-to-market.

In addition to the R-Car V3M Starter Kit, Renesas has enabled ultra-low power consumption for CNNs, which achieve image recognition and image classification, on the R-Car V3M SoC. The R-Car V3M allows the implementation of high-performance, low power consumption CNN networks in NCAP cameras that cannot be realized with traditional high power consuming CPU or GPU architectures. Renesas complements the IMP-X5, a subsystem for computer vision processing that is composed of an image processor and the programmable CV engine, with a new, innovative CNN hardware accelerator developed in house, that allows the implementation of high-performance CNNs at ultra-low low power. With this new IP, Renesas enables system developers to choose between the IMP-X5 or the new hardware accelerator to deploy CNNs. This heterogeneous approach allows system developers to choose the most efficient architecture, depending on required programming flexibility, performance and power consumption.

The Renesas R-Car V3M is available now. The R-Car V3M Starter Kit with a Linux BSP will be available in Q1 2018 initially in limited quantities. A complete offering with an extended software solution is scheduled for Q3 2018.

Renesas Electronics | www.renesas.com

ARM-based SoC Targets Net Acceleration

NXP Semiconductors has announced the highest performance member of its Layerscape family, the LX2160A SoC. The LX2160A is specifically designed to enable challenging high-performance network applications, network edge compute, and data center offloads. Trusted and secure execution of virtualized cloud workloads at the edge is driving new distributed computing paradigms.

LX2160AThe LX2160A features sixteen high-performance Arm Cortex-A72 cores running at over 2 GHz in a sub 30 W power envelope, supporting both the 100 Gbit/s Ethernet and PCIe Gen4 interconnect standards. In addition, it provides L2 switching at wire rate and includes acceleration for data compression and 50 Gbit/s IPSec cryptography.

NXP supports and drives the rich ARM ecosystem for virtualization, building on the foundations of open source projects for cloud and network function virtualization including Open Daylight, OpenStack, and OP-NFV. NXP Arm processors incorporate hardware for virtualization technologies such as KVM and Linux containers and hardware acceleration of network virtualization. NXP also supports industry-standard APIs for virtualization, including DPDK, OVS, and Virtio, and standard enterprise Linux distributions, such as Debian and Ubuntu. Silicon samples and a reference board will be available in Q1 2018.

NXP Semiconductors | www.nxp.com

Embedded Analytics Firm Makes ‘Self-Aware Chip’ Push

UltraSoC has announced a significant global expansion to address the increasing demand for more sophisticated, ‘self-aware’ silicon chips in a range of electronic products, from lightweight sensors to the server farms that power the Internet. The company’s growth plans are centering on shifts in applications such as server optimization, the IoT, and UltraSoC_EmbeddedAnalyticsautomotive safety and security, all of which demand significant improvements in the intelligence embedded inside chips.

UltraSoC’s semiconductor intellectual property (SIP) simplifies development and provides valuable embedded analytic features for designers of SoCs (systems on chip). UltraSoC has developed its technology—originally designed as a chip development tool to help developers make better products—to now fulfill much wider, pressing needs in an array of applications: safety and security in the automotive industry, where the move towards autonomous vehicles is creating unprecedented change and risk; optimization in big data applications, from Internet search to data centers; and security for the Internet of Things.

These developments will be accelerated by the addition of a new facility in Bristol, UK, which will be home to an engineering and innovation team headed by Marcin Hlond, newly appointed as Director of System Engineering. Hlond will oversee UltraSoC’s embedded analytics and visualization products, and lead product development and innovation. He has over two decades of experience as system architect and developer, most recently at Blu Wireless, NVidia and Icera. He will focus on fulfilling customers’ needs for more capable analytics and rich information to enable more efficient development of SoCs, and to enhance the reliability and security of a broad range of electronic products. At the same time, the company will continue to expand engineering headcount at its headquarters in Cambridge, UK.

UltraSoC | www.ultrasoc.com