DSP vs. RISC Processors (EE Tip #110)

There are a few fundamental differences between DSP and RISC processors. One difference has to do with arithmetic. In the analog domain, saturation, or clipping, isn’t recommended. But it generally comes with a design when, for example, an op-amp is driven high with an input signal. In the digital domain, saturation should be prevented because it causes distortion of the signal being analyzed. But some saturation is better than overflow or wrap-around. Generally speaking, a RISC processor will not saturate, but a DSP will. This is an important feature if you want to do signal processing.

Let’s take a look at an example. Consider a 16-bit processor working with unsigned numbers. The minimum value that can be represented is 0 (0x0000), and the maximum is 65535 (0xFFFF). Compute:

out = 2 × x

where x is an input value (or an intermediate value in a series of calculations). With a generic processor, you’re in trouble when x is greater than 32767.

If x = 33000 (0x80E8), the result is out = 66000 (0x101D0). Because this value can’t be represented with 16 bits, the out = 2 × x processor will truncate the value:

out = 2 × 333000 = 464(0x01D0)

From that point on, all the calculations will be off. On the other end, a DSP (or an arithmetic unit with saturation) will saturate the value to its maximum (or minimum) capability:

out = 2 × 333000 = 65535(0xFFFF)

In the first case, looking at out, it would be wrong to assume that x is a small value. With saturation, the out is still incorrect, although it accurately shows that the input is a large number. Trends in the signal can be tracked with saturation. If the saturation isn’t severe (affecting only a few samples), the signal might be demodulated correctly.

Generic RISC processors like the NXP (Philips) LPC2138 don’t have a saturation function, so it’s important to ensure that the input values or the size of the variable are scaled correctly to prevent overflow. This problem can be avoided with a thorough simulation process.—Circuit Cellar 190, Bernard Debbasch, “ARM-Based Modern Answering Machine,” 2006.

This piece originally appeared in Circuit Cellar 190, 2006. 

Reduce EMI on a Micro (EE Tip #109)

Electromagnetic interference (EMI) on a typical microprocessor board is related to the clock. If the clock is a square wave, it contains frequencies at the clock frequency and harmonics. A perfect square wave clock would have harmonic frequencies at f, 3 × f, 5 × f, 7 × f, and so on. For a perfect square wave, or any string of pulses with a fast rise time, the strength of the harmonics declines inversely with frequency.

So, the eleventh harmonic would be one-eleventh as strong as the fundamental frequency. This corresponds to a decline in harmonic amplitude of 20 dB per decade.

Real time clocks are not perfect square waves, and pulses do not have infinitely fast rise times. As a result, the higher harmonics of any real waveform start dropping faster than 1/n at higher frequencies, generally dropping as 1/(n2), or 40 dB per decade, after the frequency is high enough.

You can see this in Figure 1. The antenna efficiency of PC board structures or cables increases 20 dB per decade as frequency increases and wavelength gets shorter and closer to the size of structures found on typical PC boards.

Figure 1—Here you can see the sources of EMI in a typical microprocessor and the resulting spectrum.

Figure 1: Here you can see the sources of EMI in a typical microprocessor and the resulting spectrum.

As a result, the beginning part of the radiated spectrum tends to be uniform, the 20 dB per decade decline in harmonic strength being balanced by the 20 dB per decade increase in antenna efficiency, until a high enough frequency is reached where the curve takes a bend and harmonics start declining at 40 dB per decade zone (see Figure 1).

Above this frequency, the radiated spectrum starts declining by 20 dB per octave. But, the amplitudes of the real harmonics of a real device are often quite irregular because of resonances that weaken some and reinforce others.

What is not usually understood is that the biggest source of EMI is not the clock directly, but a train of pulses generated on both edges of the clock when current surges into the microprocessor for a nanosecond or two when the clock transitions up or down. This pulse train has a frequency that’s double the clock frequency. It seeps out of the processor chip into the power supplies and generally infects the board with high-frequency EMI. It also gets into the output lines emanating from the processor package; therefore, it’s further spread around the board and to cables and devices connected to the board.

The current surges on both clock edges are related to the clock tree. The clock tree is a system consisting of a branching network of buffers that distribute the internal clock around the silicon die. Because these buffers drive considerable capacitance and have both polarities of the clock present, there is a surge of current on both edges of the clock. This occurs as current flows into the chip to charge up the capacitance in the part of the clock tree that is transitioning from 0 V to the power supply voltage. On-chip devices, such as flip-flops, also contain internal gates and buffers where both polarities of the clock are present and contribute to the current surge.

An additional current surge is related to the crossover current when both the N and P transistors in a CMOS buffer are momentarily conducting during a logic transition. The silicon chip tries to suck in the required current to service these fast transients through its power supply pins. However, these connections have inductance created by the bond wires and lead frame, so the voltage drops briefly on the die, creating an on-chip power supply voltage drop with an amplitude on the order of a few tenths of a volt and the duration of a nanosecond or so.

If this same on-chip power supply drives the output buffers that carry signal lines out of the chip, these lines will also be infected with the fast pulses present in the power and ground supplies. This is because the power supply noise is directly transmitted through the buffer power inputs to the output lines. The on-chip current surges create fast noise that passes out through the power supply pins to the power and ground planes on the PC board, further spreading the infection.

The amplitude of the harmonics of the periodic noise pulses, at least at lower frequencies, declines inversely with frequency (1/f). Unfortunately, the effectiveness of a short antenna, such as a PC board trace, increases directly with frequency (~f). The result is that the radiated EMI tends to be flat across the spectrum.

Fortunately, the amplitude of the harmonics starts declining more rapidly than 1/f; it’s more like 1/(f2) at some higher frequency determined by the finite rise time of the pulses in the pulse train. The balance of these countervailing effects is such that the most trouble is often found in the area of 100 to 300 MHz for lower-speed 8- and 16-bit microprocessor boards.

Decoupling capacitors and the intrinsic capacitance of the power and ground planes can be used to short circuit or filter noise on the power supply. However, this technique loses effectiveness above 100 MHz, because the decoupling capacitors have inductance of about 1 nH, giving an effective resistance of about 0.5 Ω at 200 MHz. The large currents involved will develop millivolt-level voltages across such capacitors.

REDUCTION TRICK #1

The problem of noise on the I/O lines of a processor can be addressed with two sets of power supply pins. One set is used for the processor core; the other is for the output drivers that are located in the I/O ring on the periphery of the die (see Figure 2).

Figure 2: The connection of separate power and ground pins for the core and I/O ring of a processor is shown here. A PC board filter blocks core noise from power planes. You can also see how I/O buffers spread power supply noise.

Figure 2: The connection of separate power and ground pins for the core and I/O ring
of a processor is shown here. A PC board filter blocks core noise from power planes.
You can also see how I/O buffers spread power supply noise.

If the I/O buffers are supplied with the same power that is made dirty by the fast transients in the processor core, every output pin of the processor will spread EMI. The EMI that tries to come out of the power pins for the core can be blocked by a combination of decoupling capacitors and PC board trace inductance. This keeps the PC board power planes a relatively clean source of power for the processor I/O ring. The design team figured this feature decreases EMI amplitudes by 10 dB, which is a factor of three in EMI electrical field strength measured by the prescribed calibrated antenna. This is a lot because it’s common to flunk the tests by 5 dB.

REDUCTION TRICK #2

Most microprocessors have I/O and memory devices connected to the same bus with distinct control signals for the devices. Generally, there is a lot more activity at a higher frequency for the memory devices. For instance, a Digi International Rabbit 3000 microprocessor has an option to use separate pins for memory and I/O devices, both address and data. The advantage is that the physical scope of the high-speed memory bus is limited to the memory devices. A separate address and data bus handles I/O cycles and has a much lower average operating frequency. In particular, the address lines toggle only during I/O bus cycles, greatly limiting the emissions from the I/O bus. This avoids the situation where the fast-toggling address and data lines of the memory bus have to be run all over the printed circuit board of a large system. This scheme also limits the capacitive loading on the memory bus, which does not have to extend to numerous I/O devices.

REDUCTION TRICK #3

A line spectrum is the spectrum generated by a square wave clock or by a train of short pulses. All of the energy is concentrated in a narrow spectral line at the harmonic frequencies.

When the FCC EMI measurement tests are performed, the spectrum analyzer measures the amplitude of the signal from a 120-kHz wide filter that is swept across the frequencies of interest. With a line spectrum, all of the energy in a single line passes through the filter, resulting in a strong signal. If the energy in the line could be spread out over a wider frequency, say 5 MHz, only one-fortieth the energy would pass through the 120-kHz wide filter, considerably reducing the reading (by 16 dB in amplitude for one fortieth of the energy). This is what a clock spectrum spreader does. It modulates the clock frequency by a little so as to smear out the spectral line in frequency.

The idea to do this for the purpose of reducing EMI was patented by Bell Labs in two patents during the 1960s. There are numerous ways to modulate the clock frequency. One method is to use a voltage-controlled oscillator and phase-lock loop so that the frequency sweeps back and forth at a low modulation rate (e.g., 50 kHz).

Another method is to insert random delays or dithers into the clock. These methods are all covered in the original Bell Labs patents. The Bell Labs people were probably interested in EMI because telephone switches involve a large amount of equipment in a small space. In addition, it’s conceivable that the early computerized switches suffered from EMI problems. We installed a clock spectrum spreader in the Rabbit 3000 based on a combination of digital and analog techniques. The spectrum spreader reduces FCC-style EMI readings by around 20 dB, which is a lot.

A control system makes sure that the modulated clock edge is never in error by more than 20 ns compared to where the clock edge would be if it were not modulated. This prevents disruption in serial communications or other timing functions. For example, a UART operating at 460,000 bps can tolerate about 500 ns of clock edge error before it will be near to generating errors. This is far less than our 20-ns worst error in clock edge position.—Circuit Cellar 146, Norman Rogers, “Killing the EMI Demon,” 2002.

This piece originally appeared in Circuit Cellar 146, 2002. Author: Norman Rogers, who was President of ZWorld, Inc. and Rabbit Semiconductor.

FET Drivers (EE Tip #105)

Modern microprocessors can deliver respectable currents from their I/O pins. Usually, they can source (i.e., deliver from the power supply) or sink (i.e., conduct to ground) up to 20 mA without any problems. This allows the direct drive of LEDs and even power FETs. It is sufficient to connect the gate to the output of the microprocessor (see Figure 1).

Elektor, 060036-1, 6/2009

Elektor, 060036-1, 6/2009

Driving a FET from a weaker driver (such as the standard 4000 series) is not recommended. The FET would switch very slowly. That is because power FETs have several nanofarads of input capacitance, and this input capacitance has to be charged or discharged by the microprocessor output. To get an idea of what we’re talking about: the charge or discharge time is roughly equal to V × C/I or 5 V × 2 × 10-9/(20 × 10-3) = 0.5 ms.

Not all that fast, but still an acceptable switching time for a FET. However, not every FET is suitable for this. Most FETs can switch only a few amps with a voltage of only 5 V at their gate. The so-called logic FETs do better. They operate well at lower gate voltages.

So take note of this when selecting a FET. To make matters worse, many modern microprocessor systems run at 3.3 V and even a logic FET doesn’t really work properly any more. The solution is obviously to apply a higher gate voltage.

This requires a little bit of external hardware, as is shown in Figure 2, for example. The microprocessor drives T1 via a resistor, which limits the base current. T1 will conduct and forms via D1 a very low impedance path to ground that quickly discharges the gate.

Elektor, 060036-1, 6/2009

Elektor, 060036-1, 6/2009

When T1 is off, the collector voltage will rise quickly to 12 V, because D1 is blocking and the capacitance of the gate does not affect this process. However, the gate is connected to this point via emitter follower T2. T2 ensures that the gate is connected quickly and through a low impedance to (nearly) 12 V.

In the example, a voltage of 12 V is used, but this could easily be different. Note that if you’re intending to use the circuit with 24 V, for example, most FETs can tolerate only 15 or 20 V of gate voltage at most. It is therefore better not to use the driver with voltages above 15 V. We briefly mentioned the 4000 series a little earlier on. There are two exceptions. The 4049 and 4050 from this series are so-called buffers, which are able to deliver a higher current (source about 4 mA and sink about 16 mA). In addition this series can operate from voltages up to 18 V. This is the reason that a few of these gates connected in parallel will also form an excellent FET drive (see Figure 3). When you connect all six gates (from the same IC!) in parallel, you can easily obtain 20 mA of driving current.

Elektor, 060036-1, 6/2009

Elektor, 060036-1, 6/2009

This looks like an ideal solution, but unfortunately there is a catch. Ideally, these gates require a voltage of two thirds of the power supply voltage at the input to recognize a logic one. In practice, it is not quite that bad. A 5-V microprocessor system will certainly be able to drive a 4049 at 9 V. But at 12 V, things become a bit marginal!

—Elektor, 060036-1, 6/2009

C-Programmable Robot Kit

ASURO Robot

ASURO Robot

Global Specialties recently introduced the ASURO Robot, a small autonomous multi-sensored robot developed for educational purposes by the DLR, the German Aerospace Center.

The  ASURO is completely programmable in C. Except for the printed circuit boards (PCB), only standard parts are utilized and freeware tools can be used for programming. The ASURO comes unassembled and includes a soldering guide, making it suitable as an introduction into processor-controlled hobby electronics for school, university, and technical education projects.

The ASURO Robot’s features include an ATmega8L microcontroller; an 8-bit AVR-RISC processor; a software and training manual CD; AVR-GCC freeware for use with Windows or Linux; a USB IR transceiver with flash software; remote control and PC-programming possibilities via USB transceiver; wireless control possibilities with optional Bluetooth and 433 MHz RF; six collision-detector sensors; an optical line-tracker unit; two independently controlled 3V-DC motors; an odometer sensor on both wheels; and pre-programmed firmware for easy hardware testing.

The list price is $99.

Global Specialties
 

Low-Power Mini-ITX Motherboard

Habey HB131 mini-ITX motherboard.

Habey HB131 mini-ITX motherboard.

The HB131 mini-ITX motherboard is based on the low-power Intel Atom Cedar Trail platform. The small, 170-mm × 170-mm motherboard is high-performance, reliable, secure, and easy to manage. The platform is well-suited for point-of-sale, self-service terminals, queue machines, and digital signage.

The dual-core Atom D2550 processor is offered with Intel’s NM10 chipset. It features lower power consumption and more enhanced graphics than previous Atom processors.

The motherboard is equipped with dual gigabit LAN ports and rich I/O. Additional features include Wake-on-LAN, a 1-to-~255-level watchdog timer, and shared system memory as video memory.

Contact HABEY for pricing.

HABEY USA, Inc.
www.habeyusa.com