New Intel Core X-Series Processors and Thunderbolt 3

During the annual Computex 2017 event, Intel unveiled its new Intel Core X-series processor family with 4 to 18 cores, which now includes the new Intel Core i9 Extreme Edition processor, the first consumer desktop CPU with 18 cores and 36 threads. Intel announced plans to integrate Thunderbolt 3 into all future Intel CPUs and to release the Thunderbolt protocol specification to the industry.Intel i9 Web

With Intel focusing its attention on competing with ARM and now saying that they want to focus on something else than PC’s, the world of computing has been stalling and no significant gains on processor performance have been announced. The result was disastrous for Windows PC makers, which among other things also failed to evolve to newer standards on connectivity, like Thunderbolt 3 and USB-C. Apple was also affected, with almost three years without a single upgrade on its popular Mac Mini, iMac desktop and Mac Pro computers. The news from Intel that a new generation of processors is finally coming will bring some hope to the industry, including to many audio professionals that use computers and workstations, and need all the memory, storage and power they can get.

Intel introduced the new Intel Core X-series processor family, which they say is the most scalable, accessible and powerful desktop platform they have ever created. Good! The new Intel Core X-series processor family spans from 4 to 18 cores with price points to match, including Intel’s first teraflop desktop CPUs. The family also introduces the new Intel Core i9 processors, representing the highest performance for extreme performance and extreme mega-tasking. Good! The new Intel Core i9 Extreme Edition processor is the first consumer desktop CPU with 18 cores and 36 threads. An industry-first, its performance capabilities will finally enable data-intensive tasks like VR content creation and heavy data visualization.

Another announcement was the Intel Compute Card, a modular computing platform with all the elements of a full computer in a size just larger than a credit card. According to Intel, the Compute Card will start shipping in August 2017 and will allow devices outside of PCs to be connected, integrating compute into everything from smart screens to interactive appliances to VR headsets. Intel Partners who have products showing at Computex include Contec, ECS, Foxconn, LG Display, MoBits Electronics, NexDock, Sharp, Seneca, SMART Technologies, Suzhou Lehui Display and TabletKiosk. Other partners currently working on solutions include Dell, HP and Lenovo.

The Intel Compute Card will initially be available in four versions, with 7th Gen Intel Core i5 vPro or i3 processors, as well as Pentium N4200 and Celeron N3450 processors. All will feature 4-GB DDR3 memory, 128 GB of SSD or 64GB of eMMC storage, and all support Wi-Fi.11ac and Bluetooth 4.2. In addition, HTC announced a Compute Card-based VR device also using Intel WiGig technology.

Thunderbolt 3

On what is possibly the most interesting front for computing, outside of pure processing power, Intel announced plans to integrate Thunderbolt 3 into all future Intel CPUs and to release the Thunderbolt protocol specification to the industry.

Intel has a long history of leading the industry in I/O innovation. In the late 1990s, Intel developed USB, which made it easier and faster to connect external devices to computers, consolidating a multitude of existing connectors. Intel continued this effort with Thunderbolt 3, one of the most significant cable I/O updates since the advent of USB.

Intel’s vision for Thunderbolt was not just to make a faster computer port, but a simpler and more versatile port available to everyone, allowing for single-cable docks with 4K video support, unlimited and faster-than-ever storage, and external graphics accelerator engines. A world where one USB-C connector does it all – today, and for many years to come.

With this vision in mind, Intel now announced that it plans to drive large-scale mainstream adoption of Thunderbolt by integrating Thunderbolt 3 into future Intel CPUs and by releasing the Thunderbolt protocol specification to the industry next year, under a nonexclusive, royalty-free license. Releasing the Thunderbolt protocol specification in this manner is expected to greatly increase Thunderbolt adoption by encouraging third-party chip makers to build Thunderbolt-compatible chips.

Microsoft has also enhanced Thunderbolt 3 device plug-and-play support in the now available Windows 10 Creators Update. Intel and Microsoft plan to continue to work together to enhance the experience in future versions of the Windows operating system.

In addition to support from Apple and Microsoft, Thunderbolt 3 has already gained significant adoption with more than 120 PC designs on systems with 7th Generation Intel Core processors, the latest MacBook Pros and dozens of peripherals – expected to ramp to nearly 150 by the end of 2017.

Source: Intel


The Future of Embedded Computing

Although my academic background is in cybernetics and artificial intelligence, and my career started out in production software development, I have been lucky enough to spend the last few years diving head first into embedded systems development. There have been some amazing steps forward in embedded computing in recent years, and I’d like to share with you some of my favorite recent advances, and how I think they will progress.

While ever-decreasing costs of embedded computing hardware is expected and not too exciting, I think there have been a few key price points that are an indicator of things to come. In the last few months, we have seen the release of Application Processor development boards that are below $10. Tiny gigahertz-level processors that are Linux-ready for an amazingly low price. The most well-known is the Raspberry Pi Zero, which is created by the Raspberry Pi Foundation, who I believe will continue to push this impressive level of development capability into schools, really giving the next generation of engineers (and non-engineers) some hands-on experience. Perhaps a less well known release is C.H.I.P, the new development platform from Next Thing Co. The hardware is like the Pi Zero, but the drive behind the company is quite different. We’ll discuss this more later.

While the hobbyist side of embedded computing is not new, the communities and resources that are being built are exciting. Most of you will have heard of Arduino and Raspberry Pi. The Pi is a low-cost, easy-to-use Linux computer. Arduino is an open-source platform consisting of a super-simple IDE, tons of libraries, and a huge range of development boards. These have set a standard for member of the maker community who expect affordable hardware, open-source designs, and strong community support, and some companies are stepping up to this.

Next Thing Co. has the goal of creating things to inspire creativity. In addition to developing low-cost hardware, they try to remove the pain from the design process and only open-source, well-documented products will do. This ethos is embodied in their C.H.I.P Pro, which is not just an open-source Linux System-on-Module. It’s built around their own GR8 IC, which contains an Allwinner 1-GHz ARM Cortex-A8, as well as 256 MB of DDR3 built in, accompanied with an open datasheet requiring no NDA, and with a one-unit minimum order quantity. This really eliminates the headaches of high-speed routing between DDR3 and the processor, and it reduces the manufacturing complexities of creating a custom Linux ready PCB. Innovation and progress like this provide a lot more value than the many other companies just producing insufficiently documented breakout boards for existing chips. I think that this will be a company to watch, and I can’t wait to see what their next ambitious project will be.

We’ve all been witnessing the ever-increasing performance of embedded systems, as successive generations of smart phones and tablets are released, but when I talk about high performance I don’t refer to a measly 2+GHz Octa-core system with a few Gig of RAM, I’m talking about embedded supercomputing!

As far as I’m concerned, the one to watch here is NVIDIA. Their recent Tegra series sees them bringing massively parallel GPU processing to affordable embedded devices. The Tegra 4 had a quadcore CPU and 72 GPU cores. The TK1 has a quadcore CPU and 192 GPU cores, and the most recent TX1 has an octacore CPU and a 256 GPU cores that provide over 1 Teraflops of processing power. These existing devices are very impressive, but NVIDIA are not slowing down development, with the Xavier expected to appear at the end of 2017. Boasting 512 GPU cores and a custom octacore CPU architecture, the Xavier claims to deliver 20 trillion operations per second for only 20-W power consumption.

NVIDIA is developing these systems with the intent for them to enable embedded artificial intelligence (AI) with a focus on autonomous vehicles and real-time computer vision. This is an amazing goal, as AI has historically lacked the processing power to make it practical in many applications, and I’m hoping that NVIDIA is putting an end to that. In addition to their extremely capable hardware, they are providing great software resources and support for developing deep learning systems.

We are on the horizon of some exciting advancements in the field of embedded computing. In addition to seeing an ever-growing number of IoT and smart devices, I believe that during the next few years we’ll see embedded computing enable great advancements in AI and smart cities. Backyard developers will be enabled to create more impressive and advanced systems, and technical literacy will become more widespread.

This essay appears in Circuit Cellar 321.


Steve Samuels ( is a Cofounder and Prototype Engineer at Think Engineer LLP, a research, development and prototyping company that specializes in creating full system prototypes and proof-of-concepts for next-generation products and services. Steve has spent most of his career in commercial research and development in domains such as transportation, satellite communications, and space robotics. Having worked in a lot of different technical areas, his main technical interests are embedded systems and machine learning.

CMX7241/CMX7341 PMR Common Platform Processor Expands Support

CML Microcircuits recently expanded the Function Image suite of its CMX7241/CMX7341 PMR Common Platform Processors. Today, all major PMR systems are supported: DMR, dPMR, NXDN, ARIB STD-T102, ARIB STD-T98, and legacy analog PMR—all with automatic digital/analog detection. The CMX7241/CMX7341 PMR Common Platform Processors now enable engineers to build a single platform radio that supports a vairety of different PMR standards.CML CMX7241

With an embedded audio codec (ADC/DAC), the devices provide a complete baseband solution with a flexible interface to support both software and hardware implementations of the AMBE+2 Vocoder. The processors can deliver FDMA digital PMR/LMR, two-slot TDMA digital PMR/LMR, and legacy analog PMR/LMR. Based on CML Microcircuits’s FirmASIC technology, a Function Image is uploaded into the device to determine the overall functions and operating characteristics.

The PMR chipset comprises a low-power RF Direct Conversion Receiver (DCRx) IC (CMX994A/E) and a PMR Common Platform Processor (CMX7341) with DMR/dPMR/NXDN/ARIB STD-T102/ARIB STD-T98 Air Interface coding and analog PMR embedded within Function Images. The CMX994A/E and CMX7341 chipset enables engineers to quickly develop a highly integrated, cost-effective radio with a low-risk development route.

Source: CML Microcircuits

Eight-Core 64-bit Processor for Mobile Devices

MediaTek has announced the MT6795, which the company is targeting at the high-end Android 4G smartphones and tablet segment. According to the press release, the eight-core processor also supports 2560 × 1600 resolution displays, FDD/TDD LTE technology, 802.11ac WiFi, Bluetooth, GPS, FM Radio, and 2G and 3G wireless networks.mediatek

The chip also supports video recording and playback at Ultra HD (4K2K) resolution using the H.265, H.264 and VP9 formats, supporting high-speed 1080p video recording at up to 480 frames per second allowing slow-motion playback on screens with 120 Hz refresh. An integrated 16-MP camera image signal processor handles video input and MediaTek’s ClearMotion technology eliminates motion jitter to ensure smooth video playback at 60fps.

The MT6795 uses eight ARM Cortex-A53 processors, based on a 28-nm process that clocks at 2.0 GHz and a Mali-T760 GPU to handle display control. MediaTek also supplies its CorePilot technology, which provides multicore processor performance and thermal control of the chip. The MT6795 also supports dual-channel LPDDR3 memory at 933 MHz.

According to MediaTek, we can expect to see 4G smartphones using MT7695 chips before the end of  2014.

[Via Elektor]


All-Programmable SoC Solution

Anyone creating a complex, powerful digital design may want to turn to a single device that integrates high-speed processing and programmable logic.

In Circuit Cellar’s April issue, columnist Colin O’Flynn explores using the Xilinx Zynq  Z-7020 All Programmable SoC (system-on-a-chip) as part of the Avnet ZedBoard development board.

“I used a Xilinx Zynq SoC device, although Altera offers several flavors of a similar device (e.g., the Cyclone V SoC, the Arria V SoC, and the Arria 10 SoC), and Microsemi offers the SmartFusion2 SoC FPGA,” O’Flynn says in his article. “The Xilinx and Altera devices feature a dual-core ARM Cortex-A9 processor, whereas the Microsemi devices feature a less powerful Cortex-M3 processor. You may not need a dual-core A9 processor, so ‘less powerful’ may be an advantage.”

While O’Flynn’s article introduces the ZedBoard, he notes many of its specifics also apply to the MicroZed board, a less expensive option with a smaller SoC. Xilinx’s Zynq device has many interesting applications made highly accessible through the ZedBoard and MicroZed boards, he says.

O’Flynn’s discussion of the Zynq SoC device includes the following excerpt. (The April issue, which includes O’Flynn’s full article, is available for membership download or single-issue purchase.)

Originally, I had planned to describe a complete demo project in this article. I was going to demonstrate how to use a combination of a custom peripheral and some of the hard cores to stream data from a parallel ADC device into DDR memory. But there wasn’t enough room to introduce the tools and cover the demo, so I decided to introduce the Zynq device (using the ZedBoard).

A demo project is available at Several tutorials for the Zynq device are available at and, so there isn’t any point in duplicating work! I’ve linked to some specific tutorials from the April 2014 post on Photo 1 shows the hardware I used, which includes a ZedBoard with my custom OpenADC board connected through the I/O lines.

An Avnet ZedBoard is connected to the OpenADC. The OpenADC provides a moderate-speed ADC (105 msps), which interfaces to the programmable logic (PL) fabric in Xilinx’s Zynq device via a parallel data bus. The PL fabric then maps itself as a peripheral on the hard-core processing system (PS) in the Zynq device to stream this data into the system DDR memory.

Photo 1: An Avnet ZedBoard is connected to the OpenADC. The OpenADC provides a moderate-speed ADC (105 msps), which interfaces to the programmable logic (PL) fabric in Xilinx’s Zynq device via a parallel data bus. The PL fabric then maps itself as a peripheral on the hard-core processing system (PS) in the Zynq device to stream this data into the system DDR memory.

Even if you’re experienced in FPGA design, you may not have used Xilinx tools for processor-specific design. These tools include the Xilinx Platform Studio (XPS) and the Xilinx Software Development Kit (SDK). Before the advent of hard-core processors (e.g., Zynq), there have long existed soft-core processors, including the popular Xilinx MicroBlaze soft processor. The MicroBlaze system is completely soft core, so you can use the XPS tool to define the peripherals you wish to include. For the Zynq device, several hard-core peripherals are always present and you can choose to add additional soft-core (i.e., use the FPGA fabric) peripherals.

In a future article I will discuss different soft-core processor options, including some open-source third-party ones that can be programmed from the Arduino environment. For now, I’ll examine only the Xilinx tools, which are applicable to the Zynq device, along with the MicroBlaze core.

The ARM cores in the Zynq device are well suited to run Linux, which gives you a large range of existing code and tools to use in your overall solution. If you don’t need those tools, you can always run on “bare metal” (e.g., without Linux), as the tools will generate a complete base project for you that compiles and tests the peripherals (e.g., printing “Hello World” out the USART). To give you a taste of this, I’ve posted a demo video of bringing up a simple “Hello World” project in both Linux and bare metal systems on

The FPGA part of the Zynq device is called the programmable logic (PL) portion. The ARM side is called the processing system (PS) portion. You will find a reference to the SoC’s PL or PS portion throughout most of the tutorials (along with this article), so it’s important to remember which is which!

For either system, you’ll be starting with the XPS software (see Photo 2). This software is used to design your hardware platform (i.e., the PL fabric), but it also gives you some customization of the PS hard-core peripherals.

This is the main screen of the Xilinx Platform Studio (XPS) when configuring a Zynq design. On the left you can see the list of available soft-core peripherals to add to the design. You can configure any of the hard-core peripherals by choosing to enable or disable them, along with selecting from various possible I/O connections. Additional screens (not shown) enable you to configure peripherals addressing information, configure I/O connections for the soft-core peripherals, and connect peripherals to various available extension buses.

Photo 2: This is the main screen of the Xilinx Platform Studio (XPS) when configuring a Zynq design. On the left you can see the list of available soft-core peripherals to add to the design. You can configure any of the hard-core peripherals by choosing to enable or disable them, along with selecting from various possible I/O connections. Additional screens (not shown) enable you to configure peripherals addressing information, configure I/O connections for the soft-core peripherals, and connect peripherals to various available extension buses.

For example, clicking on the list of hard-core peripherals opens the options dialogue so you can enable or disable each peripheral along with routing the I/O connections. The ZedBoard’s Zynq device has 54 multipurpose I/O (MIO) lines that can be used by the peripherals, which are split into two banks. Each bank can use different I/O standards (e.g., 3.3 and 1.5 V).

Enabling all the peripherals would take a lot more than 54 I/O lines. Therefore, most of the I/O lines share multiple functions on the assumption that every peripheral doesn’t need to be connected. Many of the peripherals can be connected to several different I/O locations, so you (hopefully) don’t run into two peripherals needing the same I/O pin.

Almost all of the peripheral outputs can be routed to the PL fabric as well under the name EMIO, which is a dedicated 64-bit bus that connects to the PL fabric. If you simply wish to get more I/O pins, you can configure these extra pins from within XPS. But you can also use this EMIO bus to control existing cores in your FPGA fabric using peripherals on the Zynq device.

Assume you had an existing FPGA design where you had an FPGA core doing some processing connected to a microcontroller or computer via I2C, SPI, or serial. You could simply connect this core to the appropriate PS peripheral and port the existing code onto the Zynq processor by changing the low-level calls to use the Zynq peripherals. You may eventually wish to change this interface to the peripheral bus, the AMBA Advanced eXtensible Interface (AXI), for better performance. However, using standard peripherals to interface to a PL design can still be useful for many cores for which you have extensive existing code.

The MIO/EMIO pins can even be used in a bit-banging fashion, so if you need a special device or core control logic, it’s possible to quickly develop this in software. You can then move to a hardware peripheral for considerably better performance.

O’Flynn’s article goes on to discuss in greater detail the internal buses, peripherals, and taking a design from hardware to software. For more, refer to Circuit Cellar‘s  April issue and related application notes posted at O’Flynn’s companion site

Client Profile: Lauterbach, Inc

1111 Main Street #115
Vancouver, WA 98660


LauterbachFeatured Product: The TRACE32-ICD in-circuit debugger supports a range of on-chip debug interfaces. The debugger’s hardware is universal and enables you to connect to different target processors by simply changing the debug cable. The PowerDebug USB 3.0 can be upgraded with the PowerProbe or the PowerIntergrator to a logic analyzer.

Product Features: The TRACE 32-ICD JTAG debugger has a 5,000-KBps download rate. It features easy high-level Assembler debugging and an interface to all industry-standard compilers. The debugger enables fast download of code to target, OS awareness debugging, and flash programming. It displays internal and external peripherals at a logical level and includes support for hardware breakpoints and trigger (if supported by chip), multicore debugging (SMP and AMP), C and C++, and all common NOR and NAND flash devices.

For more information, visit

Real-Time Trailer Monitoring System

Dean Boman, a retired electrical engineer and spacecraft communications systems designer, noticed a problem during vacations towing the family’s RV trailer—tire blowouts.

“In every case, there were very subtle changes in the trailer handling in the minutes prior to the blowouts, but the changes were subtle enough to go unnoticed,” he says in his article appearing in January’s Circuit Cellar magazine.

So Boman, whose retirement hobbies include embedded system design, built the trailer monitoring system (TMS), which monitors the vibration of each trailer tire, displays the

Figure 1—The Trailer Monitoring System consists of the display unit and a remote data unit (RDU) mounted in the trailer. The top bar graph shows the right rear axle vibration level and the lower bar graph is for left rear axle. Numbers on the right are the axle temperatures. The vertical bar to the right of the bar graph is the driver-selected vibration audio alarm threshold. Placing the toggle switch in the other position  displays the front axle data.

Photo 1 —The Trailer Monitoring System consists of the display unit and a remote data unit (RDU) mounted in the trailer. The top bar graph shows the right rear axle vibration level and the lower bar graph is for left rear axle. Numbers on the right are the axle temperatures. The vertical bar to the right of the bar graph is the driver-selected vibration audio alarm threshold. Placing the toggle switch in the other position displays the front axle data.

information to the driver, and sounds an alarm if tire vibration or heat exceeds a certain threshold. The alarm feature gives the driver time to pull over before a dangerous or damaging blowout occurs.

Boman’s article describes the overall layout and operation of his system.

“The TMS consists of accelerometers mounted on each tire’s axles to convert the gravitational (g) level vibration into an analog voltage. Each axle also contains a temperature sensor to measure the axle temperature, which is used to detect bearing or brake problems. Our trailer uses the Dexter Torflex suspension system with four independent axles supporting four tires. Therefore, a total of four accelerometers and four temperature sensors were required.

“Each tire’s vibration and temperature data is processed by a remote data unit (RDU) that is mounted in the trailer. This unit formats the data into RS-232 packets, which it sends to the display unit, which is mounted in the tow vehicle.”

Photo 1 shows the display unit. Figure 1 is the complete system’s block diagram.

Figure 1—This block diagram shows the remote data unit accepting data from the accelerometers and temperature sensors and sending the data to the display unit, which is located in the tow vehicle for the driver display.

Figure 1—This block diagram shows the remote data unit accepting data from the accelerometers and temperature sensors and sending the data to the display unit, which is located in the tow vehicle for the driver display.

The remote data unit’s (RDU’s) hardware design includes a custom PCB with a Microchip Technology PIC18F2620 processor, a power supply, an RS-232 interface, temperature sensor interfaces, and accelerometers. Photo 2 shows the final board assembly. A 78L05 linear regulator implements the power supply, and the RS-232 interface utilizes a Maxim Integrated MAX232. The RDU’s custom software design is written in C with the Microchip MPLAB integrated development environment (IDE).

The remote data unit’s board assembly is shown.

Photo 2—The remote data unit’s board assembly is shown.

The display unit’s hardware includes a Microchip Technology PIC18F2620 processor, a power supply, a user-control interface, an LCD interface, and an RS-232 data interface (see Figure 1). Boman chose a Hantronix HDM16216H-4 16 × 2 LCD, which is inexpensive and offers a simple parallel interface. Photo 3 shows the full assembly.

The display unit’s completed assembly is shown with the enclosure opened. The board on top is the LCD’s rear view. The board on bottom is the display unit board.

Photo 3—The display unit’s completed assembly is shown with the enclosure opened. The board on top is the LCD’s rear view. The board on bottom is the display unit board.

Boman used the Microchip MPLAB IDE to write the display unit’s software in C.

“To generate the display image, the vibration data is first converted into an 11-element bar graph format and the temperature values are converted from Centigrade to Fahrenheit. Based on the toggle switch’s position, either the front or the rear axle data is written to the LCD screen,” Boman says.

“To implement the audio alarm function, the ADC is read to determine the driver-selected alarm level as provided by the potentiometer setting. If the vibration level for any of the four axles exceeds the driver-set level for more than 5 s, the audio alarm is sounded.

“The 5-s requirement prevents the alarm from sounding for bumps in the road, but enables vibration due to tread separation or tire bubbles to sound the alarm. The audio alarm is also sounded if any of the temperature reads exceed 160°F, which could indicate a possible bearing or brake failure.”

The comprehensive monitoring gives Boman peace of mind behind the wheel. “While the TMS cannot prevent tire problems, it does provide advance warning so the driver can take action to prevent serious damage or even an accident,” he says.

For more details about Boman’s project, including RDU and display unit schematics, check out the January issue.

I/O Raspberry Pi Expansion Card

The RIO is an I/O expansion card intended for use with the Raspberry Pi SBC. The card stacks on top of a Raspberry Pi to create a powerful embedded control and navigation computer in a small 20-mm × 65-mm × 85-mm footprint. The RIO is well suited for applications requiring real-world interfacing, such as robotics, industrial and home automation, and data acquisition and control.

RoboteqThe RIO adds 13 inputs that can be configured as digital inputs, 0-to-5-V analog inputs with 12-bit resolution, or pulse inputs capable of pulse width, duty cycle, or frequency capture. Eight digital outputs are provided to drive loads up to 1 A each at up to 24 V.
The RIO includes a 32-bit ARM Cortex M4 microcontroller that processes and buffers the I/O and creates a seamless communication with the Raspberry Pi. The RIO processor can be user-programmed with a simple BASIC-like programming language, enabling it to perform logic, conditioning, and other I/O processing in real time. On the Linux side, RIO comes with drivers and a function library to quickly configure and access the I/O and to exchange data with the Raspberry Pi.

The RIO features several communication interfaces, including an RS-232 serial port to connect to standard serial devices, a TTL serial port to connect to Arduino and other microcontrollers that aren’t equipped with a RS-232 transceiver, and a CAN bus interface.
The RIO is available in two versions. The RIO-BASIC costs $85 and the RIO-AHRS costs $175.

Roboteq, Inc.

DSP vs. RISC Processors (EE Tip #110)

There are a few fundamental differences between DSP and RISC processors. One difference has to do with arithmetic. In the analog domain, saturation, or clipping, isn’t recommended. But it generally comes with a design when, for example, an op-amp is driven high with an input signal. In the digital domain, saturation should be prevented because it causes distortion of the signal being analyzed. But some saturation is better than overflow or wrap-around. Generally speaking, a RISC processor will not saturate, but a DSP will. This is an important feature if you want to do signal processing.

Let’s take a look at an example. Consider a 16-bit processor working with unsigned numbers. The minimum value that can be represented is 0 (0x0000), and the maximum is 65535 (0xFFFF). Compute:

out = 2 × x

where x is an input value (or an intermediate value in a series of calculations). With a generic processor, you’re in trouble when x is greater than 32767.

If x = 33000 (0x80E8), the result is out = 66000 (0x101D0). Because this value can’t be represented with 16 bits, the out = 2 × x processor will truncate the value:

out = 2 × 333000 = 464(0x01D0)

From that point on, all the calculations will be off. On the other end, a DSP (or an arithmetic unit with saturation) will saturate the value to its maximum (or minimum) capability:

out = 2 × 333000 = 65535(0xFFFF)

In the first case, looking at out, it would be wrong to assume that x is a small value. With saturation, the out is still incorrect, although it accurately shows that the input is a large number. Trends in the signal can be tracked with saturation. If the saturation isn’t severe (affecting only a few samples), the signal might be demodulated correctly.

Generic RISC processors like the NXP (Philips) LPC2138 don’t have a saturation function, so it’s important to ensure that the input values or the size of the variable are scaled correctly to prevent overflow. This problem can be avoided with a thorough simulation process.—Circuit Cellar 190, Bernard Debbasch, “ARM-Based Modern Answering Machine,” 2006.

This piece originally appeared in Circuit Cellar 190, 2006. 

Reduce EMI on a Micro (EE Tip #109)

Electromagnetic interference (EMI) on a typical microprocessor board is related to the clock. If the clock is a square wave, it contains frequencies at the clock frequency and harmonics. A perfect square wave clock would have harmonic frequencies at f, 3 × f, 5 × f, 7 × f, and so on. For a perfect square wave, or any string of pulses with a fast rise time, the strength of the harmonics declines inversely with frequency.

So, the eleventh harmonic would be one-eleventh as strong as the fundamental frequency. This corresponds to a decline in harmonic amplitude of 20 dB per decade.

Real time clocks are not perfect square waves, and pulses do not have infinitely fast rise times. As a result, the higher harmonics of any real waveform start dropping faster than 1/n at higher frequencies, generally dropping as 1/(n2), or 40 dB per decade, after the frequency is high enough.

You can see this in Figure 1. The antenna efficiency of PC board structures or cables increases 20 dB per decade as frequency increases and wavelength gets shorter and closer to the size of structures found on typical PC boards.

Figure 1—Here you can see the sources of EMI in a typical microprocessor and the resulting spectrum.

Figure 1: Here you can see the sources of EMI in a typical microprocessor and the resulting spectrum.

As a result, the beginning part of the radiated spectrum tends to be uniform, the 20 dB per decade decline in harmonic strength being balanced by the 20 dB per decade increase in antenna efficiency, until a high enough frequency is reached where the curve takes a bend and harmonics start declining at 40 dB per decade zone (see Figure 1).

Above this frequency, the radiated spectrum starts declining by 20 dB per octave. But, the amplitudes of the real harmonics of a real device are often quite irregular because of resonances that weaken some and reinforce others.

What is not usually understood is that the biggest source of EMI is not the clock directly, but a train of pulses generated on both edges of the clock when current surges into the microprocessor for a nanosecond or two when the clock transitions up or down. This pulse train has a frequency that’s double the clock frequency. It seeps out of the processor chip into the power supplies and generally infects the board with high-frequency EMI. It also gets into the output lines emanating from the processor package; therefore, it’s further spread around the board and to cables and devices connected to the board.

The current surges on both clock edges are related to the clock tree. The clock tree is a system consisting of a branching network of buffers that distribute the internal clock around the silicon die. Because these buffers drive considerable capacitance and have both polarities of the clock present, there is a surge of current on both edges of the clock. This occurs as current flows into the chip to charge up the capacitance in the part of the clock tree that is transitioning from 0 V to the power supply voltage. On-chip devices, such as flip-flops, also contain internal gates and buffers where both polarities of the clock are present and contribute to the current surge.

An additional current surge is related to the crossover current when both the N and P transistors in a CMOS buffer are momentarily conducting during a logic transition. The silicon chip tries to suck in the required current to service these fast transients through its power supply pins. However, these connections have inductance created by the bond wires and lead frame, so the voltage drops briefly on the die, creating an on-chip power supply voltage drop with an amplitude on the order of a few tenths of a volt and the duration of a nanosecond or so.

If this same on-chip power supply drives the output buffers that carry signal lines out of the chip, these lines will also be infected with the fast pulses present in the power and ground supplies. This is because the power supply noise is directly transmitted through the buffer power inputs to the output lines. The on-chip current surges create fast noise that passes out through the power supply pins to the power and ground planes on the PC board, further spreading the infection.

The amplitude of the harmonics of the periodic noise pulses, at least at lower frequencies, declines inversely with frequency (1/f). Unfortunately, the effectiveness of a short antenna, such as a PC board trace, increases directly with frequency (~f). The result is that the radiated EMI tends to be flat across the spectrum.

Fortunately, the amplitude of the harmonics starts declining more rapidly than 1/f; it’s more like 1/(f2) at some higher frequency determined by the finite rise time of the pulses in the pulse train. The balance of these countervailing effects is such that the most trouble is often found in the area of 100 to 300 MHz for lower-speed 8- and 16-bit microprocessor boards.

Decoupling capacitors and the intrinsic capacitance of the power and ground planes can be used to short circuit or filter noise on the power supply. However, this technique loses effectiveness above 100 MHz, because the decoupling capacitors have inductance of about 1 nH, giving an effective resistance of about 0.5 Ω at 200 MHz. The large currents involved will develop millivolt-level voltages across such capacitors.


The problem of noise on the I/O lines of a processor can be addressed with two sets of power supply pins. One set is used for the processor core; the other is for the output drivers that are located in the I/O ring on the periphery of the die (see Figure 2).

Figure 2: The connection of separate power and ground pins for the core and I/O ring of a processor is shown here. A PC board filter blocks core noise from power planes. You can also see how I/O buffers spread power supply noise.

Figure 2: The connection of separate power and ground pins for the core and I/O ring
of a processor is shown here. A PC board filter blocks core noise from power planes.
You can also see how I/O buffers spread power supply noise.

If the I/O buffers are supplied with the same power that is made dirty by the fast transients in the processor core, every output pin of the processor will spread EMI. The EMI that tries to come out of the power pins for the core can be blocked by a combination of decoupling capacitors and PC board trace inductance. This keeps the PC board power planes a relatively clean source of power for the processor I/O ring. The design team figured this feature decreases EMI amplitudes by 10 dB, which is a factor of three in EMI electrical field strength measured by the prescribed calibrated antenna. This is a lot because it’s common to flunk the tests by 5 dB.


Most microprocessors have I/O and memory devices connected to the same bus with distinct control signals for the devices. Generally, there is a lot more activity at a higher frequency for the memory devices. For instance, a Digi International Rabbit 3000 microprocessor has an option to use separate pins for memory and I/O devices, both address and data. The advantage is that the physical scope of the high-speed memory bus is limited to the memory devices. A separate address and data bus handles I/O cycles and has a much lower average operating frequency. In particular, the address lines toggle only during I/O bus cycles, greatly limiting the emissions from the I/O bus. This avoids the situation where the fast-toggling address and data lines of the memory bus have to be run all over the printed circuit board of a large system. This scheme also limits the capacitive loading on the memory bus, which does not have to extend to numerous I/O devices.


A line spectrum is the spectrum generated by a square wave clock or by a train of short pulses. All of the energy is concentrated in a narrow spectral line at the harmonic frequencies.

When the FCC EMI measurement tests are performed, the spectrum analyzer measures the amplitude of the signal from a 120-kHz wide filter that is swept across the frequencies of interest. With a line spectrum, all of the energy in a single line passes through the filter, resulting in a strong signal. If the energy in the line could be spread out over a wider frequency, say 5 MHz, only one-fortieth the energy would pass through the 120-kHz wide filter, considerably reducing the reading (by 16 dB in amplitude for one fortieth of the energy). This is what a clock spectrum spreader does. It modulates the clock frequency by a little so as to smear out the spectral line in frequency.

The idea to do this for the purpose of reducing EMI was patented by Bell Labs in two patents during the 1960s. There are numerous ways to modulate the clock frequency. One method is to use a voltage-controlled oscillator and phase-lock loop so that the frequency sweeps back and forth at a low modulation rate (e.g., 50 kHz).

Another method is to insert random delays or dithers into the clock. These methods are all covered in the original Bell Labs patents. The Bell Labs people were probably interested in EMI because telephone switches involve a large amount of equipment in a small space. In addition, it’s conceivable that the early computerized switches suffered from EMI problems. We installed a clock spectrum spreader in the Rabbit 3000 based on a combination of digital and analog techniques. The spectrum spreader reduces FCC-style EMI readings by around 20 dB, which is a lot.

A control system makes sure that the modulated clock edge is never in error by more than 20 ns compared to where the clock edge would be if it were not modulated. This prevents disruption in serial communications or other timing functions. For example, a UART operating at 460,000 bps can tolerate about 500 ns of clock edge error before it will be near to generating errors. This is far less than our 20-ns worst error in clock edge position.—Circuit Cellar 146, Norman Rogers, “Killing the EMI Demon,” 2002.

This piece originally appeared in Circuit Cellar 146, 2002. Author: Norman Rogers, who was President of ZWorld, Inc. and Rabbit Semiconductor.

FET Drivers (EE Tip #105)

Modern microprocessors can deliver respectable currents from their I/O pins. Usually, they can source (i.e., deliver from the power supply) or sink (i.e., conduct to ground) up to 20 mA without any problems. This allows the direct drive of LEDs and even power FETs. It is sufficient to connect the gate to the output of the microprocessor (see Figure 1).

Elektor, 060036-1, 6/2009

Elektor, 060036-1, 6/2009

Driving a FET from a weaker driver (such as the standard 4000 series) is not recommended. The FET would switch very slowly. That is because power FETs have several nanofarads of input capacitance, and this input capacitance has to be charged or discharged by the microprocessor output. To get an idea of what we’re talking about: the charge or discharge time is roughly equal to V × C/I or 5 V × 2 × 10-9/(20 × 10-3) = 0.5 ms.

Not all that fast, but still an acceptable switching time for a FET. However, not every FET is suitable for this. Most FETs can switch only a few amps with a voltage of only 5 V at their gate. The so-called logic FETs do better. They operate well at lower gate voltages.

So take note of this when selecting a FET. To make matters worse, many modern microprocessor systems run at 3.3 V and even a logic FET doesn’t really work properly any more. The solution is obviously to apply a higher gate voltage.

This requires a little bit of external hardware, as is shown in Figure 2, for example. The microprocessor drives T1 via a resistor, which limits the base current. T1 will conduct and forms via D1 a very low impedance path to ground that quickly discharges the gate.

Elektor, 060036-1, 6/2009

Elektor, 060036-1, 6/2009

When T1 is off, the collector voltage will rise quickly to 12 V, because D1 is blocking and the capacitance of the gate does not affect this process. However, the gate is connected to this point via emitter follower T2. T2 ensures that the gate is connected quickly and through a low impedance to (nearly) 12 V.

In the example, a voltage of 12 V is used, but this could easily be different. Note that if you’re intending to use the circuit with 24 V, for example, most FETs can tolerate only 15 or 20 V of gate voltage at most. It is therefore better not to use the driver with voltages above 15 V. We briefly mentioned the 4000 series a little earlier on. There are two exceptions. The 4049 and 4050 from this series are so-called buffers, which are able to deliver a higher current (source about 4 mA and sink about 16 mA). In addition this series can operate from voltages up to 18 V. This is the reason that a few of these gates connected in parallel will also form an excellent FET drive (see Figure 3). When you connect all six gates (from the same IC!) in parallel, you can easily obtain 20 mA of driving current.

Elektor, 060036-1, 6/2009

Elektor, 060036-1, 6/2009

This looks like an ideal solution, but unfortunately there is a catch. Ideally, these gates require a voltage of two thirds of the power supply voltage at the input to recognize a logic one. In practice, it is not quite that bad. A 5-V microprocessor system will certainly be able to drive a 4049 at 9 V. But at 12 V, things become a bit marginal!

—Elektor, 060036-1, 6/2009

C-Programmable Robot Kit



Global Specialties recently introduced the ASURO Robot, a small autonomous multi-sensored robot developed for educational purposes by the DLR, the German Aerospace Center.

The  ASURO is completely programmable in C. Except for the printed circuit boards (PCB), only standard parts are utilized and freeware tools can be used for programming. The ASURO comes unassembled and includes a soldering guide, making it suitable as an introduction into processor-controlled hobby electronics for school, university, and technical education projects.

The ASURO Robot’s features include an ATmega8L microcontroller; an 8-bit AVR-RISC processor; a software and training manual CD; AVR-GCC freeware for use with Windows or Linux; a USB IR transceiver with flash software; remote control and PC-programming possibilities via USB transceiver; wireless control possibilities with optional Bluetooth and 433 MHz RF; six collision-detector sensors; an optical line-tracker unit; two independently controlled 3V-DC motors; an odometer sensor on both wheels; and pre-programmed firmware for easy hardware testing.

The list price is $99.

Global Specialties

Low-Power Mini-ITX Motherboard

Habey HB131 mini-ITX motherboard.

Habey HB131 mini-ITX motherboard.

The HB131 mini-ITX motherboard is based on the low-power Intel Atom Cedar Trail platform. The small, 170-mm × 170-mm motherboard is high-performance, reliable, secure, and easy to manage. The platform is well-suited for point-of-sale, self-service terminals, queue machines, and digital signage.

The dual-core Atom D2550 processor is offered with Intel’s NM10 chipset. It features lower power consumption and more enhanced graphics than previous Atom processors.

The motherboard is equipped with dual gigabit LAN ports and rich I/O. Additional features include Wake-on-LAN, a 1-to-~255-level watchdog timer, and shared system memory as video memory.

Contact HABEY for pricing.


Client Profile: Netburner, Inc

NetBurner, Inc.
5405 Morehouse Drive
San Diego, CA 92121


Embedded Products/Services: The NetBurner solution provides hardware, software, and tools to network enable new and existing products. All components are integrated and fully functional, so you can immediately begin working on your application.

Product Categories:

  • Serial to Ethernet: Modules can be used out of the box with no programming, or you can use a development kit to create your own custom applications. Hardware ranges from a single chip to small modules with many features.
  • Core Modules: Typically used as the core processing module in a design, core modules include the processor, flash, RAM and on-board network capability. The processor pins are brought out to connectors and include functions such as SPI, I2C, address/data bus, ADC, DAC, UARTs, digital I/O, PWM, and CAN.
  • Development Kits: Development kits can be used to customize any of NetBurner’s Serial-to-Ethernet or Core Modules. Kits include the Eclipse IDE, a C/C++ compiler/linker, a debugger, a RTOS, a TCP/IP stack, and board support packages.

Product Information: The MOD54415 and the NANO54415 modules provide 250-MHz processor, up to 32 MB flash, 64 MB DDR, ADC, DAC, eight UARTs, four I2C, three SPI, 1-wire, microSD flash socket, five PWM, and up to 44 digital I/O.

Exclusive Offer: Receive 15% off on select development kits. Promo code: CIRCUITCELLAR

Circuit Cellar prides itself on presenting readers with information about innovative companies, organizations, products, and services relating to embedded technologies. This space is where Circuit Cellar enables clients to present readers useful information, special deals, and more.

Q&A: Peter Lomas – Raspberry Pi: One Year Later, 1 Million Sold

Peter Lomas

Clemens Valens, Editor-in-Chief of Elektor Online and head of Elektor Labs, caught up with Peter Lomas, hardware designer for the Raspberry Pi single-board computer, earlier this year at the Embedded World 2013 trade show in Nuremberg, Germany. This is a longer version of an interview with Lomas published in Elektor’s May 2013 issue. The Lomas interview provided a one-year update on the rapid growth of interest in the Raspberry Pi since Elektor’s April 2012 interview with Eben Upton, one of the founders and trustees of the Raspberry Pi Foundation. The UK-based charitable foundation developed the inexpensive, credit card-sized computer to encourage the study of basic computer science in schools. In early 2012, the Raspberry Pi’s first production batches were arriving. Since then, more than 1 million boards have been sold.

CLEMENS: Raspberry Pi, the phenomena. It is quite amazing what happened.

PETER: It is, and lots of people keep asking me, why has Raspberry Pi done what it has done, what makes it different? I think it’s something we’ve really been trying to grasp. The first thing that happened with Raspberry Pi, which I think is important, is that we had one of our very first prototypes on a UK blog for one of the BBC correspondents, Rory Cellan-Jones, and they made a little video, a YouTube video, and that got 600,000 hits. So I guess that if you look at it from one aspect, that created a viral marketing, a very viral marketing campaign for Raspberry Pi. The other I think, the name, Raspberry Pi was key. And the logo that Paul Beach did for us is absolutely key because it has become iconic.

CLEMENS: Yes, it’s very recognizable.

PETER: Very recognizable. If I show you that, you know exactly what it is, in the electronics circle. So I think the brand has been very important. But you know, we shouldn’t forget the amount of work that Liz Upton’s been doing with the blogs and on our website, keeping people informed about what we’re doing. Then, I think we’ve got the fact we are a charity… that we are focused on the education of computing and electronics and that’s our motive—not actually to make boards and to make money except to fund the foundation.

CLEMENS: I looked at the Raspberry Pi website, and it doesn’t look easy to me. You target education, children, and on the website it’s hard to find what Raspberry Pi exactly is. It’s not really explained. You have to know it. There are several distributions, so you have to know Linux and you have to program in Python.

PETER: Well, that’s true and, in a weird way, that’s part of its success, because you actually have to be active. In order to do something with Pi, you can’t just get it out of a shiny box, put it on the desk and press “on.” You have to do some mental work. You have to figure some things out. Now, I actually think that there’s a bit of a benefit there, because when it actually works, you have some achievement. You’ve done something. Not “we’ve done something.” You’ve done it personally, and there is a gratification from doing it.

CLEMENS: But it’s not the easiest platform.

PETER: No, but with our educational proposition, the whole object now is to package that up in easier-to-use bundles. We can make the SD card boot straight to Scratch (a website project and simple programming language developed at the Massachusetts Institute of Technology Media Lab), so Linux becomes temporarily invisible, and there’s a set of worksheets and instructions. But we’re never going to take away, hopefully, the fact that you have to put your wires in, and I do think that is part of the importance and the attraction of it.

CLEMENS: Because of all these layers of complexity and having to program it in English (Python is in English), for the non-English population it is yet another hurdle. That’s why Arduino was so successful; they made the programming really easy. They had cheap hardware but also a way to easily program it.

PETER: There’s no doubt Arduino is a brilliant product. You are right, it enables people to get to what I call “Hello World” very easily. But, in fact, on a Raspberry Pi, after you’ve made those connections and plugged the card in, you can get to an equivalent “Hello World.” But ours is the Scratch cat. Once you’ve moved the Scratch cat, you can go in a few different directions: you can move it some more, or you can use Scratch with an I/O interface to make an LED light up or you can press a button to make the Scratch cat move. There are endless directions you can go. I’ve found, and I think Eben has similarly experienced, that kids just get it. As long as you don’t make it too complicated, the kids just get it. It’s the adults who have more problems.

CLEMENS: I saw that there are at least three different distributions for the boards. So what are the differences between the three? Why isn’t there just one?

PETER: Well, they all offer subtly different features. The whole idea was to make Raspberry Pi as an undergraduate tool. You give it to Cambridge University, hopefully Manchester University, and undergraduates can view the science before they start it. They have the summer. They can work on it, come back, and say: “Look, I did this on this board.” That’s where it all started.

CLEMENS: OK. So, you were already on quite a high level.

PETER: Well we were on a high level, that’s true. We were on a high level, so Scratch wouldn’t have been on the agenda. It was really just Python—that’s actually where the Pi comes from.
What has really happened is that we’ve developed this community and this ecosystem around Pi. So we have to be able to support the, if you like, “different roots” of people wanting to use Pi. Now we’ve got the RISC OS that you can use. And people are even doing bare-metal programming. If we just gave one distribution, I guess we’re closing it up. I fully approve of having different distributions.

CLEMENS: From the website, it’s not clear to me what is different in these distributions. For the first one, it is written: “If you’re just starting out.”

PETER: I think maybe we do need to put some more material in there to explain to people the difference. I have to explain: I’m the hardware guy. I’m the guy who sat there connecting the tracks up, connecting the components up. My expertise with the operating systems, with the distributions that we have, is really limited to the graphical interface because that’s what I use day in, day out.

CLEMENS: Once you have chosen your distribution and you want to control an LED, you have to open a driver or something, I suppose?

PETER: Well, you’ve got the library; you just have to make a library call. Again, it’s not easy. You have to go and find the libraries and you have to download them. Which is where things such as the Pi-Face (add-on board) come in, because that comes with an interactive library that will go onto Scratch. And you’ve got the Gertboard (another extension board) and that comes with the libraries to drive it and some tutorial examples and then you can wind that back to just the bare metal interface on the GPIOs.

CLEMENS: So the simplicity is now coming from the add-on boards?

PETER: Some of the add-on boards can make it simpler, where they give you the switches and they give you the LEDs. You don’t need to do any wiring. My view is that I’m trying to make it like an onion: You can start with the surface and you can do something, and then you can peel away the layers. The more interested you get, the more layers you can peel away and the more different directions you can go (in what you do with it). You must have seen the diverse things that can be done.

CLEMENS: I’ve looked at some projects. I was surprised by the number of media centers. That’s how RS Components (which distributes the Raspberry Pi) is promoting the board. Aren’t you disappointed with that? It seems to be, for a lot of people, a cheap platform to do a Linux application on. They just want to have a media center.

PETER: I know exactly what you mean. And I suppose I should be disappointed that some people buy it, they make it into a media center, and that’s all it does. But I think if only 5% or 10% of those people who make it into a media center will think: “Well, that was easy, maybe I’ll get another and see if I can do something else with it,” then it’s a success.

CLEMENS: It would be an enabler.

PETER: Getting the technology in front of people is the first problem. Getting the “Hello World” so they’ve got a sense of achievement is the second problem. Then turning them over from doing that to “Okay, well what if I try and do this?”  then that’s  Nirvana. Certainly for the kids that’s crucial, because we’re changing them from doing what they’re told, to start doing things that they think they might be able to do—and trying it. That makes them into engineers.

CLEMENS: Let’s move on to the board’s hardware.

PETER: Sure.

CLEMENS: So, you chose a Broadcom processor. Because Eben worked at Broadcom?

PETER: He still works within Broadcom. It would be hard for me to argue that that wasn’t an influence on the decision, because Eben said: “Oh look, here’s the bright shiny chip. It can do all the things that we want, why wouldn’t we use it?” The decision we made is we nailed our credentials and our reputations to the website by saying it will cost $35—it will cost $25 for the basic one. And there was no way on Earth any of us were going to go back on that… We had a spreadsheet, the basic numbers looked plausible, we just had to do a lot of work to chop it down—to hone it, to get it tight so it would actually meet the prices. So, I think if we’d gone another way, like maybe with Samsung, that would have blown the budget.

CLEMENS: Did Broadcom help in any way to make this possible?

PETER: Every semiconductor manufacturer helped the project by making the chips available. Also, the price point of the chips is important. I think some of the people who helped us took an educated gamble and gave us good pricing from day one. Because the big problem you get with trying to bootstrap any project, is that if you don’t know what your volume is going to be. You have to be conservative.

So, initially, we priced for a thousand boards, but quickly we priced for 20,000 boards, but nowhere in our wildest dreams did we think we were going to get to a 200,000-board requirement on launch day and be so tantalizingly close to selling a million after our first year. So that’s helped in a lot of ways, because obviously it’s driven the price of all the components down. I’m not going to pretend it doesn’t please the vendors of the components that had faith in us from day one, because they’ve obviously made some money out of it.

We always had the rationale that we had to have a sustainable model where the foundation, our community that is buying the boards, and our suppliers were all making a living and could feed themselves. It would have been a total disaster if someone such as Broadcom had said: “Tell you what guys, let’s give you the processors. We’ll give you the first 20,000.” And so, we could have provided all sorts of extra bells and whistles to the design. Then, when we would have sold these 20,000 boards, we’re going to raise the price of everything by $12. That would’ve been the end of Raspberry Pi.

CLEMENS: If Eben and the others had not worked for Broadcom…

PETER: Would we have used a different chip? Well, I sort of speculated about this and I went around and had a look and, at the time for the price point, we couldn’t find anything that would’ve met our requirements as well as that chip. So I was comfortable that was the one that would allow us to get to where we wanted to be, and I think the big key crunch for that was the high-definition multimedia interface (HDMI). From a technical point of view, one of the challenges we had was getting the breakout under the BGA, because blind and buried vias on PCBs are very expensive.

CLEMENS: How many layers is the board?

PETER: Six, which is a pretty bog-standard layer count. The only little trick that we used was to put blind vias only on layers one and two—so we had an extra drilling stage—but only one bonding stage. So that added $0.02 onto the cost of the board. But, because the next layer down was a ground plane, it meant that a lot of the connections that come out of the Broadcom processor just go down one layer. And that meant that I could have space underneath to route other things and actually make it all happen.

CLEMENS: Don’t they have guidelines at Broadcom?

PETER: Oh, they do have guidelines! Use blind and buried vias or vias in pads. Our first prototype was all singing, all dancing, but it would have cost $100 to $110 to manufacture. So we got the machete out and started hacking down all the things that we didn’t need. So you’ve got all the functionality that you want. You can get the performance that you want, you can get the compliance, but it’s got nothing extra.

CLEMENS: Have you been thinking about the future of Raspberry Pi?

PETER: Well, yeah… In our industry, you know, Moore’s law guarantees that everything is old-hat in two years’ time. So we’re thinking about it, but that’s all we’re doing. We’re trying to improve our educational release. I mean, let’s face it, I’m not going to pretend that the Raspberry Pi is perfect. We only made one modification to the board from design to release. We’ve only made some minor modifications under the V2 release. Some of that is to fix some anomalies, some of that was also to help our new manufacturing partner, Sony (in Pencoed, Wales), take it. Their process needed some slight changes to the board to make it easier to manufacture.

CLEMENS: About the original idea of Raspberry Pi, the educational thing. I had a look at the forum and there are lots of forums about technical details, quite a lot of questions and topics about start-up problems. But the educational forum is pretty small.

PETER: You’re right. You’re absolutely right. A lot of that work has been going on slowly and carefully in the background. To be completely honest with you, we were caught on the hub with the interest with Raspberry Pi, and so I’ve certainly spent the last 12 months making sure that we can deliver the product to our community so that they can develop with it and perhaps talk a little bit about our educational goals. But we’re absolutely refocusing on that.

CLEMENS: First, get the hardware into people’s hands and then focus on the education.

PETER: Exactly. And of course, we’ve also released the first computers in schools as manual teaching tools. But also we’ve got Clive, who is a full-time employee helping with the educational deployment. And it’s great that we’ve had all this support (from Google Giving) to get 15,000 kits into schools. I won’t pretend we don’t have a lot of work to do but, I think of where we were a year ago, just still trying to launch.

CLEMENS: It all went really fast.

PETER: Oh yes, it’s gone like a rocket!

CLEMENS: Have you personally learned something valuable from it?

PETER: Well, I’ve learned lots of things. I think the most valuable, maybe not a lesson, but a reinforcement of something I already thought, is that education doesn’t just exist in the classroom. It exists all around us. The opportunity to learn and the opportunity to teach exists every day in almost every aspect in what we do. You know, there are people who spend their lives trying to keep every secret, keep everything to themselves. But there are also people who just give. And I’ve met so many people who are just givers. I suppose I’ve learned there is a whole new system of education that goes on outside of the standard curriculum that helps people do what they want to do.

Editor’s Note: Interview by Clemens Valens, Transcription by Joshua Walbey.


  • Embedded Linux Wiki, “RPi Gertboard,”
  • W. Hettinga, “What Are You Doing? The Raspberry Pi $25 Computer,” Elektor April 2012.
  • Massachusetts Institute of Technology Media Lab, “Scratch,”
  • University of Manchester School of Computer Science, Projects Using Raspberry Pi, “Pi-Face Digital Interface,”