A Look at Low-Noise Amplifiers

Maurizio Di Paolo Emilio, who has a PhD in Physics, is an Italian telecommunications engineer who works mainly as a software developer with a focus on data acquisition systems. Emilio has authored articles about electronic designs, data acquisition systems, power supplies, and photovoltaic systems. In this article, he provides an overview of what is generally available in low-noise amplifiers (LNAs) and some of the applications.

By Maurizio Di Paolo Emilio
An LNA, or preamplifier, is an electronic amplifier used to amplify sometimes very weak signals. To minimize signal power loss, it is usually located close to the signal source (antenna or sensor). An LNA is ideal for many applications including low-temperature measurements, optical detection, and audio engineering. This article presents LNA systems and ICs.

Signal amplifiers are electronic devices that can amplify a relatively small signal from a sensor (e.g., temperature sensors and magnetic-field sensors). The parameters that describe an amplifier’s quality are:

  • Gain: The ratio between output and input power or amplitude, usually measured in decibels
  • Bandwidth: The range of frequencies in which the amplifier works correctly
  • Noise: The noise level introduced in the amplification process
  • Slew rate: The maximum rate of voltage change per unit of time
  • Overshoot: The tendency of the output to swing beyond its final value before settling down

Feedback amplifiers combine the output and input so a negative feedback opposes the original signal (see Figure 1). Feedback in amplifiers provides better performance. In particular, it increases amplification stability, reduces distortion, and increases the amplifier’s bandwidth.

 Figure 1: A feedback amplifier model is shown here.

Figure 1: A feedback amplifier model is shown.

A preamplifier amplifies an analog signal, generally in the stage that precedes a higher-power amplifier.

Op-amps are widely used as AC amplifiers. Linear Technology’s LT1028 or LT1128 and Analog Devices’s ADA4898 or AD8597 are especially suitable ultra-low-noise amplifiers. The LT1128 is an ultra-low-noise, high-speed op-amp. Its main characteristics are:

  • Noise voltage: 0.85 nV/√Hz at 1 kHz
  • Bandwidth: 13 MHz
  • Slew rate: 5 V/µs
  • Offset voltage: 40 µV

Both the Linear Technology and Analog Devices amplifiers have voltage noise density at 1 kHz at around 1 nV/√Hz  and also offer excellent DC precision. Texas Instruments (TI)  offers some very low-noise amplifiers. They include the OPA211, which has 1.1 nV/√Hz  noise density at a  3.6 mA from 5 V supply current and the LME49990, which has very low distortion. Maxim Integrated offers the MAX9632 with noise below 1nV/√Hz.

The op-amp can be realized with a bipolar junction transistor (BJT), as in the case of the LT1128, or a MOSFET, which works at higher frequencies and with a higher input impedance and a lower energy consumption. The differential structure is used in applications where it is necessary to eliminate the undesired common components to the two inputs. Because of this, low-frequency and DC common-mode signals (e.g., thermal drift) are eliminated at the output. A differential gain can be defined as (Ad = A2 – A1) and a common-mode gain can be defined as (Ac = A1 + A2 = 2).

An important parameter is the common-mode rejection ratio (CMRR), which is the ratio of common-mode gain to the differential-mode gain. This parameter is used to measure the  differential amplifier’s performance.

Figure 2: The design of a simple preamplifier is shown. Its main components are the Linear Technology LT112 and the Interfet IF3602 junction field-effect transistor (JFET).

Figure 2: The design of a simple preamplifier is shown. Its main components are the Linear Technology LT1128 and the Interfet IF3602 junction field-effect transistor (JFET).

Figure 2 shows a simple preamplifier’s design with 0.8 nV/√Hz at 1 kHz background noise. Its main components are the LT1128 and the Interfet IF3602 junction field-effect transistor (JFET).  The IF3602 is a dual Nchannel JFET used as stage for the op-amp’s input. Figure 3 shows the gain and Figure 4 shows the noise response.

Figure 3: The gain of a low-noise preamplifier.

Figure 3: The is a low-noise preamplifier’s gain.


Figure 4: The noise response of a low-noise preamplifier

Figure 4: A low-noise preamplifier’s noise response is shown.

The Stanford Research Systems SR560 low-noise voltage preamplifier has a differential front end with 4nV/√Hz input noise and a 100-MΩ input impedance (see Photo 1a). Input offset nulling is accomplished by a front-panel potentiometer, which is accessible with a small screwdriver. In addition to the signal inputs, a rear-panel TTL blanking input enables you to quickly turn the instrument’s gain on and off (see Photo 1b).

Photo 1a:The Stanford Research Systems SR560 low-noise voltage preamplifier

Photo 1a: The Stanford Research Systems SR560 low-noise voltage preamplifier. (Photo courtesy of Stanford Research Systems)

Photo 1 b: A rear-panel TTL blanking input enables you to quickly turn the Stanford Research Systems SR560 gain on and off.

Photo 1b: A rear-panel TTL blanking input enables you to quickly turn the Stanford Research Systems SR560 gain on and off. (Photo courtesy of Stanford Research Systems)

The Picotest J2180A low-noise preamplifier provides a fixed 20-dB gain while converting a 1-MΩ input impedance to a 50-Ω output impedance and 0.1-Hz to 100-MHz bandwidth (see Photo 2). The preamplifier is used to improve the sensitivity of oscilloscopes, network analyzers, and spectrum analyzers while reducing the effective noise floor and spurious response.

Photo 2: The Picotest J2180A low-noise preamplifier is shown.

Photo 2: The Picotest J2180A low-noise preamplifier is shown. (Photo courtesy of picotest.com)

Signal Recovery’s Model 5113 is among the best low-noise preamplifier systems. Its principal characteristics are:

  • Single-ended or differential input modes
  • DC to 1-MHz frequency response
  • Optional low-pass, band-pass, or high-pass signal channel filtering
  • Sleep mode to eliminate digital noise
  • Optically isolated RS-232 control interface
  • Battery or line power

The 5113 (see Photo 3 and Figure 5) is used in applications as diverse as radio astronomy, audiometry, test and measurement, process control, and general-purpose signal amplification. It’s also ideally suited to work with a range of lock-in amplifiers.

Photo 3: This is the Signal Recovery Model 5113 low-noise pre-amplifier.

Photo 3: This is the Signal Recovery Model 5113 low-noise preamplifier. (Photo courtesy of Signal Recovery)

Figure 5: Noise contour figures are shown for the Signal Recovery Model 5113.

Figure 5: Noise contour figures are shown for the Signal Recovery Model 5113.

This article briefly introduced low-noise amplifiers, in particular IC system designs utilized in simple or more complex systems such as the Signal Recovery Model 5113, which is a classic amplifier able to obtain different frequency bands with relative gain. A similar device is the SR560, which is a high-performance, low-noise preamplifier that is ideal for a wide variety of applications including low-temperature measurements, optical detection, and audio engineering.

Moreover, the Krohn-Hite custom Models 7000 and 7008 low-noise differential preamplifiers provide a high gain amplification to 1 MHz with an AC output derived from a very-low-noise FET instrumentation amplifier.

One common LNA amplifier is a satellite communications system. The ground station receiving antenna will connect to an LNA, which is needed because the received signal is weak. The received signal is usually a little above background noise. Satellites have limited power, so they use low-power transmitters.

Telecommunications engineer Maurizio Di Paolo Emilio was born in Pescara, Italy. Working mainly as a software developer with a focus on data acquisition systems, he helped design the thermal compensation system (TCS) for the optical system used in the Virgo Experiment (an experiment for detecting gravitational waves). Maurizio currently collaborates with researchers at the University of L’Aquila on X-ray technology. He also develops data acquisition hardware and software for industrial applications and manages technical training courses. To learn more about Maurizio and his expertise, read his essay on “The Future of Data Acquisition Technology.”

High-Voltage Gate Driver IC

Allegro A4900 Gate Driver IC

Allegro A4900 Gate Driver IC

The A4900 is a high-voltage brushless DC (BLDC) MOSFET gate driver IC. It is designed for high-voltage motor control for hybrid, electric vehicle, and 48-V automotive battery systems (e.g., electronic power steering, A/C compressors, fans, pumps, and blowers).

The A4900’s six gate drives can drive a range of N-channel insulated-gate bipolar transistors (IGBTs) or power MOSFET switches. The gate drives are configured as three high-voltage high-side drives and three low-side drives. The high-side drives are isolated up to 600 V to enable operation with high-bridge (motor) supply voltages. The high-side drives use a bootstrap capacitor to provide the supply gate drive voltage required for N-channel FETs. A TTL logic-level input compatible with 3.3- or 5-V logic systems can be used to control each FET.

A single-supply input provides the gate drive supply and the bootstrap capacitor charge source. An internal regulator from the single supply provides the logic circuit’s lower internal voltage. The A4900’s internal monitors ensure that the high- and low-side external FET’s gate source voltage is above 9 V when active.

The control inputs to the A4900 offer a flexible solution for many motor control applications. Each driver can be driven with an independent PWM signal, which enables implementation of all motor excitation methods including trapezoidal and sinusoidal drive. The IC’s integrated diagnostics detect undervoltage, overtemperature, and power bridge faults that can be configured to protect the power switches under most short-circuit conditions. Detailed diagnostics are available as a serial data word.

The A4900 is supplied in a 44-lead QSOP package and costs $3.23 in 1,000-unit quantities.

Allegro MicroSystems, LLC

PC-Programmable Temperature Controller

Oven Industries 5R7-388 temperature controller

Oven Industries 5R7-388 temperature controller

The 5R7-388 is a bidirectional temperature controller. It can be used in independent thermoelectric modules or in conjunction with auxiliary or supplemental resistive heaters for cooling and heating applications. The solid-state MOSFET output devices’ H-bridge configuration enables the bidirectional current flow through the thermoelectric modules.
The RoHS-compliant controller is PC programmable via an RS-232 communication port, so it can directly interface with a compatible PC. It features an easily accessible communications link that enables various operational mode configurations. The 5R7-388 can perform field-selectable parameters or data acquisition in a half duplex mode.

In accordance with RS-232 interface specifications, the controller accepts a communications cable length. Once the desired set parameters are established, the PC may be disconnected and the 5R7-388 becomes a unique, stand-alone controller. All parameter settings are retained in nonvolatile memory. The 5R7-388’s additional features include 36-VDC output using split supply, a PC-configurable alarm circuit, and P, I, D, or On/Off control.

Contact Oven Industries for pricing.

Oven Industries, Inc.

The Future of Very Large-Scale Integration (VLSI) Technology

The historical growth of IC computing power has profoundly changed the way we create, process, communicate, and store information. The engine of this phenomenal growth is the ability to shrink transistor dimensions every few years. This trend, known as Moore’s law, has continued for the past 50 years. The predicted demise of Moore’s law has been repeatedly proven wrong thanks to technological breakthroughs (e.g., optical resolution enhancement techniques, high-k metal gates, multi-gate transistors, fully depleted ultra-thin body technology, and 3-D wafer stacking). However, it is projected that in one or two decades, transistor dimensions will reach a point where it will become uneconomical to shrink them any further, which will eventually result in the end of the CMOS scaling roadmap. This essay discusses the potential and limitations of several post-CMOS candidates currently being pursued by the device community.

Steep transistors: The ability to scale a transistor’s supply voltage is determined by the minimum voltage required to switch the device between an on- and an off-state. The sub-threshold slope (SS) is the measure used to indicate this property. For instance, a smaller SS means the transistor can be turned on using a smaller supply voltage while meeting the same off current. For MOSFETs, the SS has to be greater than ln(10) × kT/q where k is the Boltzmann constant, T is the absolute temperature, and q is the electron charge. This fundamental constraint arises from the thermionic nature of the MOSFET conduction mechanism and leads to a fundamental power/performance tradeoff, which could be overcome if SS values significantly lower than the theoretical 60-mV/decade limit could be achieved. Many device types have been proposed that could produce steep SS values, including tunneling field-effect transistors (TFETs), nanoelectromechanical system (NEMS) devices, ferroelectric-gate FETs, and impact ionization MOSFETs. Several recent papers have reported experimental observation of SS values in TFETs as low as 40 mV/decade at room temperature. These so-called “steep” devices’ main limitations are their low mobility, asymmetric drive current, bias dependent SS, and larger statistical variations in comparison to traditional MOSFETs.

Spin devices: Spintronics is a technology that utilizes nano magnets’ spin direction as the state variable. Spintronics has unique properties over CMOS, including nonvolatility, lower device count, and the potential for non-Boolean computing architectures. Spintronics devices’ nonvolatility enables instant processor wake-up and power-down that could dramatically reduce the static power consumption. Furthermore, it can enable novel processor-in-memory or logic-in-memory architectures that are not possible with silicon technology. Although in its infancy, research in spintronics has been gaining momentum over the past decade, as these devices could potentially overcome the power bottleneck of CMOS scaling by offering a completely new computing paradigm. In recent years, progress has been made toward demonstration of various post-CMOS spintronic devices including all-spin logic, spin wave devices, domain wall magnets for logic applications, and spin transfer torque magnetoresistive RAM (STT-MRAM) and spin-Hall torque (SHT) MRAM for memory applications. However, for spintronics technology to become a viable post-CMOS device platform, researchers must find ways to eliminate the transistors required to drive the clock and power supply signals. Otherwise, the performance will always be limited by CMOS technology. Other remaining challenges for spintronics devices include their relatively high active power, short interconnect distance, and complex fabrication process.

Flexible electronics: Distributed large area (cm2-to-m2) electronic systems based on flexible thin-film-transistor (TFT) technology are drawing much attention due to unique properties such as mechanical conformability, low temperature processability, large area coverage, and low fabrication costs. Various forms of flexible TFTs can either enable applications that were not achievable using traditional silicon based technology, or surpass them in terms of cost per area. Flexible electronics cannot match the performance of silicon-based ICs due to the low carrier mobility. Instead, this technology is meant to complement them by enabling distributed sensor systems over a large area with moderate performance (less than 1 MHz). Development of inkjet or roll-to-roll printing techniques for flexible TFTs is underway for low-cost manufacturing, making product-level implementations feasible. Despite these encouraging new developments, the low mobility and high sensitivity to processing parameters present major fabrication challenges for realizing flexible electronic systems.

CMOS scaling is coming to an end, but no single technology has emerged as a clear successor to silicon. The urgent need for post-CMOS alternatives will continue to drive high-risk, high-payoff research on novel device technologies. Replicating silicon’s success might sound like a pipe dream. But with the world’s best and brightest minds at work, we have reasons to be optimistic.

Author’s Note: I’d like to acknowledge the work of PhD students Ayan Paul and Jongyeon Kim.

CC267: Continuity of Embedded Tech Content

The October issue features articles on topics ranging from FAT cache to IIR digital filters to a quadcopter that uses a mechanical gyro. Let’s review.

Jeff’s quadcopter uses a mechanical gyro that is “an inexpensive yet elegant attempt to counteract wind gusts.” With its protective shield removed, you can see the motorized spinning rotor that sustains equilibrium as its frame moves.

On page 16, Stuart Oliver details how to use math routines that include the dsPIC hardware features, such as the accumulators and barrel shifter. He uses the math for implementing Assembler routines.

Turn to page 30 to learn how Kerry Imming uses FAT cache for SD card access. You can implement his cache technique in a variety of other applications.

Before you start a new project, familiarize yourself George Novacek’s tips on managing project risk (p. 34). He explains how to define, evaluate, and handle risk. Better yet, why not just reduce risk by avoiding as many problems as possible?

Bob Japenga addresses this issue as well (p. 38). In the third part of his series on concurrency in embedded systems, he details how to avoid concurrency-related problems, which can be difficult because the more concurrency you add to a project, the more complicated it becomes.

Ed Nisley presented a MOSFET tester in his August 2012 article, “MOSFET Channel Resistance.” In this issue, Ed covers temperature measurement, the control circuitry, the firmware’s proportional integral control loop, and more (p. 42).

A fan under the black CPU heatsink keeps it near ambient temperature, so that the Peltier module under the aluminum block can control the MOSFET temperature. The gray epoxy block holds a linearized thermistor circuit connected to the Arduino microcontroller under the PCB. (Source: E. Nisley)

Check out Robert Lacoste’s article on page 58 for an introduction to IIR digital filters. You’ll learn about the differences between IIR filters, FIR filters, and analog filters.

WinFilter allows you to calculate and simulate all kind of IIR filters just by entering their key characteristics (left). The plots shows you the resulting frequency and time behavior. (Source: R. Lacoste)

Working with an unstable mechanical gyro? As Jeff Bachiochi explains, a MEMS system is the solution (p. 68).

Lastly, check out the interview with Helen Li on page 54. You’ll find her impressive research exciting and inspirational.