January Circuit Cellar: Sneak Preview

Happy New Years! The January issue of Circuit Cellar magazine is coming soon. Don’t miss this 1st issue of Circuit Cellar 2019. Enjoy pages and pages of great, in-depth embedded electronics articles.

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Here’s a sneak preview of January 2019 Circuit Cellar:

TRENDS & CHOICES IN EMBEDDED COMPUTING

Comms and Control for Drones
Consumer and commercial drones represent one of the most dynamic areas of embedded design today. Chip, board and system suppliers are offering improved ways for drones to do more processing on board the drone, while also providing solutions for implementing the control and communication subsystems in drones. This article by Circuit Cellar’s Editor-in-Chief Jeff Child looks at the technology and products available today that are advancing the capabilities of today’s drones.

Choosing an MPU/MCU for Industrial Design
By Microchip Technology’s Jacko Wilbrink
As MCU performance and functionality improve, the traditional boundaries between MCUs and microprocessor units (MPUs) have become less clear. In this article, Jacko examines the changing landscape in MPU vs. MCU capabilities, OS implications and the specifics of new SiP and SOM approaches for simplifying higher-performance computing requirements in industrial applications.

Product Focus: COM Express Boards
The COM Express architecture has found a solid and growing foothold in embedded systems. COM Express boards provide a complete computing core that can be upgraded when needed, leaving the application-specific I/O on the baseboard. This Product Focus section updates readers on this technology and provides a product album of representative COM Express products.

MICROCONTROLLERS ARE DOING EVERYTHING

Connecting USB to Simple MCUs
By Stuart Ball
Sometimes you want to connect a USB device such as a flash drive to a simple microcontroller. Problem is most MCUs cannot function as a USB host. In this article, Stuart steps through the technology and device choices that solve this challenge. He also puts the idea into action via a project that provides this functionality.

Vision System Enables Overlaid Images
By Daniel Edens and Elise Weir
In this project article, learn how these two Cornell students designed a system to overlay images from a visible light camera and an infrared camera. They use software running on a PIC32 MCU to interface the two types of cameras. The MCU does the computation to create the overlaid images, and displays them on an LCD screen.

DATA ACQUISITION AND MEASUREMENT

Data Acquisition Alternatives
By Jeff Child
While the fundamentals of data acquisition remain the same, its interfacing technology keeps evolving and changing. USB and PCI Express brought data acquisition off the rack, and onto the lab bench top. Today solutions are emerging that leverage Mini PCIe, Thunderbolt and remote web interfacing. Circuit Cellar’s Editor-in-Chief, Jeff Child, dives into the latest technology trends and product developments in data acquisition.

High-Side Current Sensing
By Jeff Bachiochi
Jeff says he likes being able to measure things—for example, being able to measure load current so he can predict how long a battery will last. With that in mind, he recently found a high-side current sensing device, Microchip’s EMC1701. In his article, Jeff takes you through the details of the device and how to make use of it in a battery-based system.

Power Analysis Capture with an MCU
By Colin O’Flynn
Low-cost microcontrollers integrate many powerful peripherals in them. You can even perform data capture directly to internal memory. In his article, Colin uses the ChipWhisperer-Nano as a case study in how you might use such features which would otherwise require external programmable logic.

TOOLS AND TECHNIQUES FOR EMBEDDED SYSTEM DESIGN

Easing into the IoT Cloud (Part 2)
By Brian Millier
In Part 1 of this article series Brian examined some of the technologies and services available today enabling you to ease into the IoT cloud. Now, in Part 2, he discusses the hardware features of the Particle IoT modules, as well as the circuitry and program code for the project. He also explores the integration of a Raspberry Pi solution with the Particle cloud infrastructure.

Hierarchical Menus for Touchscreens
By Aubrey Kagan
In his December article, Aubrey discussed his efforts to build a display subsystem and GUI for embedded use based on a Noritake touchscreen display. This time he shares how he created a menu system within the constraints of the Noritake graphical display system. He explains how he made good use of Microsoft Excel worksheets as a tool for developing the menu system.

Real Schematics (Part 2)
By George Novacek
The first part of this article series on the world of real schematics ended last month with wiring. At high frequencies PCBs suffer from the same parasitic effects as any other type of wiring. You can describe a transmission line as consisting of an infinite number of infinitesimal resistors, inductors and capacitors spread along its entire length. In this article George looks at real schematics from a transmission line perspective.

LoRa SiP Devices Provide Low Power IoT Node Solution

Microchip Technology has introduced a highly integrated LoRa System-in-Package (SiP) family with an ultra-low-power 32-bit MCU, sub-GHz RF LoRa transceiver and software stack. The SAM R34/35 SiPs come with certified reference designs and interoperability with major LoRaWAN gateway and network providers. The devices also provide the ultra-low power consumption in sleep modes, offering extended battery life in remote IoT nodes.

Most LoRa end devices remain in sleep mode for extended periods of time, only waking up occasionally to transmit small data packets. Powered by the ultra-low-power SAM L21 Arm Cortex-M0+ based MCU, the SAM R34 devices provide sleep modes as low as 790 nA to significantly reduce power consumption and extend battery life in end applications. Highly integrated in a compact 6 mm x 6 mm package, the SAM R34/35 family is well suited for a broad array of long-range, low-power IoT applications that require small form factor designs and multiple years of battery life.

In addition to ultra-low-power consumption, the simplified development process means developers can accelerate their designs by combining their application code with Microchip’s LoRaWAN stack and quickly prototype with the ATSAMR34-XPRO development board (DM320111), which is supported by the Atmel Studio 7 Software Development Kit (SDK). The development board is certified with the Federal Communications Commission (FCC), Industry Canada (IC) and Radio Equipment Directive (RED), providing developers with the confidence that their designs will meet government requirements across geographies.
LoRa technology is designed to enable low-power applications to communicate over longer ranges than Zigbee, Wi-Fi and Bluetooth using the LoRaWAN open protocol. Ideal for a range of applications such as smart cities, agricultural monitoring and supply chain tracking, LoRaWAN enables the creation of flexible IoT networks that can operate in both urban and rural environments. According to the LoRa Alliance, the number of LoRaWAN operators has doubled from 40 to 80 over the last 12 months, with more than 100 countries actively developing LoRaWAN networks.

The SAM R34/35 family is supported by Microchip’s LoRaWAN stack, as well as a certified and proven chip-down package that enables customers to accelerate the design of RF applications with reduced risk. With support for worldwide LoRaWAN operation from 862 to 1,020 MHz, developers can use a single part variant across geographies, simplifying the design process and reducing inventory burden. The SAM R34/35 family supports Class A and Class C end devices as well as proprietary point-to-point connections.

Microchip’s SAM R34/35 LoRa family is available in six device variants. SAM R34 devices in a 64-lead TFBGA package begin at $3.76 each in 10,000-unit quantities. SAM R35 devices are available without a USB interface starting at $3.66 each in 10,000-unit quantities.

Microchip Technology | www.microchip.com

Chip-Level Solutions Feed AI Needs

Embedded Supercomputing

Gone are the days when supercomputing meant big, rack-based systems in an air conditioned room. Today, embedded processors, FPGAs and GPUs are able to do AI and machine learning operations, enabling new types of local decision making in embedded systems.

By Jeff Child, Editor-in-Chief

Embedded computing technology has evolved way past the point now where complete system functionality on a single chip is remarkable. Today, the levels of compute performance and parallel processing on an IC means that what were once supercomputing levels of capabilities can now be implemented in in chip-level solutions.

While supercomputing has become a generalized term, what system developers are really interested in are crafting artificial intelligence, machine learning and neural networking using today’s embedded processing. Supplying the technology for these efforts are the makers of leading-edge embedded processors, FPGAs and GPUs. In these tasks, GPUs are being used for “general-purpose computing on GPUs”, a technique also known as GPGPU computing.

With all that in mind, embedded processor, GPU and FPGA companies have rolled out a variety of solutions over the last 12 months, aimed at performing AI, machine learning and other advanced computing functions for several demanding embedded system application segments.

FPGAS Take AI Focus

Back March, FPGA vendor Xilinx announced its plans to launch a new FPGA product category it calls its adaptive compute acceleration platform (ACAP). Following up on that, in October the company unveiled Versal—the first of its ACAP implementations. Versal ACAPs combine scalar processing engines, adaptable hardware engines and intelligent engines with advanced memory and interfacing technologies to provide heterogeneous acceleration for any application. But even more importantly, according to Xilinx, the Versal ACAP’s hardware and software can be programmed and optimized by software developers, data scientists and hardware developers alike. This is enabled by a host of tools, software, libraries, IP, middleware and frameworks that facilitate industry-standard design flows.

Built on TSMC’s 7-nm FinFET process technology, the Versal portfolio combines software programmability with domain-specific hardware acceleration and adaptability. The portfolio includes six series of devices architected to deliver scalability and AI inference capabilities for a host of applications across different markets, from cloud to networking to wireless communications to edge computing and endpoints.

The portfolio includes the Versal Prime series, Premium series and HBM series, which are designed to deliver high performance, connectivity, bandwidth, and integration for the most demanding applications. It also includes the AI Core series, AI Edge series and AI RF series, which feature the AI Engine (Figure 1). The AI Engine is a new hardware block designed to address the emerging need for low-latency AI inference for a wide variety of applications and also supports advanced DSP implementations for applications like wireless and radar.

Figure 1
Xilinx’s AI Engine is a new hardware block designed to address the emerging need for low-latency AI inference for a wide variety of applications. It also supports advanced DSP implementations for applications like wireless and radar.

It is tightly coupled with the Versal Adaptable Hardware Engines to enable whole application acceleration, meaning that both the hardware and software can be tuned to ensure maximum performance and efficiency. The portfolio debuts with the Versal Prime series, delivering broad applicability across multiple markets and the Versal AI Core series, delivering an estimated 8x AI inference performance boost compared to industry-leading GPUs, according to Xilinx.

Low-Power AI Solution

Following the AI trend, back in May Lattice Semiconductor unveiled Lattice sensAI, a technology stack that combines modular hardware kits, neural network IP cores, software tools, reference designs and custom design services. In September the company unveiled expanded features of the sensAI stack designed for developers of flexible machine learning inferencing in consumer and industrial IoT applications. Building on the ultra-low power (1 mW to 1 W) focus of the sensAI stack, Lattice released new IP cores, reference designs, demos and hardware development kits that provide scalable performance and power for always-on, on-device AI applications.

Embedded system developers can build a variety of solutions enabled by sensAI. They can build stand-alone iCE40 UltraPlus/ECP5 FPGA based always-on, integrated solutions, with latency, security and form factor benefits. Alternatively, they can use CE40 UltraPlus as an always-on processor that detects key phrases or objects, and wakes-up a high-performance AP SoC / ASIC for further analytics only when required, reducing overall system power consumption. And, finally, you can use the scalable performance/power benefits of ECP5 for neural network acceleration, along with I/O flexibility to seamlessly interface to on-board legacy devices including sensors and low-end MCUs for system control.

Figure 2
Human face detection application example. iCE40 UlraPlus enables AI with an always-on image sensor, while consuming less than 1 mW of active power.

Updates to the sensAI stack include a new CNN (convolutional neural networks) Compact Accelerator IP core for improved accuracy on iCE40 UltraPlus FPGA and enhanced CNN Accelerator IP core for improved performance on ECP5 FPGAs. Software tools include an updated neural network compiler tool with improved ease-of-use and both Caffe and TensorFlow support for iCE40 UltraPlus FPGAs. Also provided are reference designs enabling human presence detection and hand gesture recognition reference designs and demos (Figure 2). New iCE40 UltraPlus development platform support includes a Himax HM01B0 UPduino shield and DPControl iCEVision board.. …

Read the full article in the December 341 issue of Circuit Cellar

Don’t miss out on upcoming issues of Circuit Cellar. Subscribe today!

Note: We’ve made the October 2017 issue of Circuit Cellar available as a free sample issue. In it, you’ll find a rich variety of the kinds of articles and information that exemplify a typical issue of the current magazine.

Cypress Semi Teams with Arm for Secure IoT MCU Solution

Cypress Semiconductor has expanded its collaboration with Arm to provide management of IoT edge nodes. The solution integrates the Arm Pelion IoT Platform with Cypress’ low power, dual-core PSoC 6 microcontrollers (MCUs) and CYW4343W Wi-Fi and Bluetooth combo radios. PSoC 6 provides Arm v7-M hardware-based security that adheres to the highest level of device protection defined by the Arm Platform Security Architecture (PSA).
Cypress and Arm demonstrated hardware-secured onboarding and communication through the integration of the dual-core PSoC 6 MCU and Pelion IoT Platform in the Arm booth at Arm TechCon last month. In the demo, the PSoC 6 was running Arm’s PSA-defined Secure Partition Manager to be supported in Arm Mbed OS version 5.11 open-source embedded operating system, which will be available this December. Embedded systems developers can leverage the private key storage and hardware-accelerated cryptography in the PSoC 6 MCU for cryptographically-secured lifecycle management functions, such as over-the-air firmware updates, mutual authentication and device attestation and revocation. According to the company, Cypress is making a strategic push to integrate security into its compute, connect and store portfolio for the IoT.

The PSoC 6 architecture is built on ultra-low-power 40-nm process technology, and the MCUs feature low-power design techniques to extend battery life up to a full week for wearables. The dual-core Arm Cortex-M4 and Cortex-M0+ architecture lets designers optimize for power and performance simultaneously. Using its dual cores combined with configurable memory and peripheral protection units, the PSoC 6 MCU delivers the highest level of protection defined by the Platform Security Architecture (PSA) from Arm.

Designers can use the MCU’s software-defined peripherals to create custom analog front-ends (AFEs) or digital interfaces for innovative system components such as electronic-ink displays. The PSoC 6 MCU features the latest generation of Cypress’ industry-leading CapSense capacitive-sensing technology, enabling modern touch and gesture-based interfaces that are robust and reliable.

Cypress Semiconductor | www.cypress.com

IoT Door Security System Uses Wi-Fi

Control Via App or Web

Discover how these Cornell students built an Internet-connected door security system with wireless monitoring and control through web and mobile applications. The article discusses the interfacing of a Microchip PIC32 MCU with the Internet, and the application of IoT to a door security system.

By Norman Chen, Ram Vellanki and Giacomo Di Liberto

The idea for an Internet of Things (IoT) door security system came from our desire to grant people remote access to and control over their security system. Connecting the system with the Internet not only improves safety by enabling users to monitor a given entryway remotely, but also allows the system to transmit information about the traffic of the door to the Internet. With these motivations, we designed our system using a Microchip Technology PIC32 microcontroller (MCU) and an Espressif ESP8266 Wi-Fi module to interface a door sensor with the Internet, which gives the user full control over the system via mobile and web applications.

The entire system works in the following way. To start, the PIC32 tells the Wi-Fi module to establish a connection to a TCP socket, which provides fast and reliable communication with the security system’s web server. Once a connection has been established, the PIC32 enters a loop to analyze the distance sensor reading to detect motion in the door. Upon any detection of motion, the PIC32 commands the Wi-Fi module to signal the event to the web server. Each motion detection is saved in memory, and simultaneously the data are sent to the website, which graphs the number of motion detections per unit time. If the security system was armed at the time of motion detection, then the PIC32 will sound the alarm via a piezoelectric speaker from CUI. The alarm system is disarmed at default, so each motion detection is logged in the web application but no sound is played. From both the web and mobile application, the user can arm, disarm and sound the alarm immediately in the case of an emergency.

DESIGN

The PIC32 acts as the hub of the whole system. As shown in Figure 1, each piece of hardware is connected to the MCU, as it detects motion by analyzing distance sensor readings, generates sound for the piezoelectric speaker and commands the Wi-Fi module for actions that pertain to the web server. The distance sensor used in our system is rated to accurately measure distances of only 10 to 80 cm [1]. That’s because motion detection requires us only to measure large changes in distances instead of exact distances, the sensor was sufficient for our needs.

Figure 1
The schematic of the security system. Note that the door sensor runs on 5  V, whereas the rest of the components run on 3.3 V

In our design, the sensor is facing down from the top of the doorway, so the nearest object to the sensor is the floor at idle times, when there is no movement through the door. For an average height of a door, about 200 cm, the sensor outputs a miniscule amount of voltage of less than 0.5 V. If a human of average height, about 160 cm, passes through the doorway, then according to the datasheet [1], the distance sensor will output a sudden spike of about 1.5 V. The code on the PIC32 constantly analyzes the distance sensor readings for such spikes, and interprets an increase and subsequent decrease in voltage as motion through the door. The alarm sound is generated by having the PIC32 repeatedly output a 1,500 Hz wave to the piezoelectric speaker through a DAC. We used the DMA feature on the PIC32 for playing the alarm sound, to allow the MCU to signal the alarm without using an interrupt-service-routine. The alarm sound output therefore, did not interfere with motion detection and receiving commands from the web server.

The Wi-Fi module we used to connect the PIC32 to the Internet is the ESP8266, which has several variations on the market. We chose model number ESP8266-01 for its low cost and small form factor. This model was not breadboard-compatible, but we designed a mount for the device so that it could be plugged into the breadboard without the need for header wires. Figure 2 shows how the device is attached to the breadboard, along with how the rest of the system is connected.

Figure 2
The full system is wired up on a breadboard. The door sensor is at the bottom of the photo, and is attached facing down from the top of a doorway when in use. The device at the top of the figure is the PIC32 MCU mounted on a development board.

The module can boot into two different modes, programming or normal, by configuring the GPIO pins during startup. To boot into programming mode, GPIO0 must be pulled to low, while GPIO2 must be pulled high. To boot into normal mode, both GPIO0 and GPIO2 must be pulled high. Programming mode is used for flashing new firmware onto the device, whereas normal mode enables AT commands over UART on the ESP8266. Because we only needed to enable the AT commands on the module, we kept GPIO0 and GPIO2 floating, which safely and consistently booted the module into normal mode.

SENDING COMMANDS

Before interfacing the PIC32 with the Wi-Fi module, we used a USB-to-TTL serial cable to connect the module to a computer, and tested the functionality of its AT commands by sending it commands from a serial terminal. …

Read the full article in the December 341 issue of Circuit Cellar

Don’t miss out on upcoming issues of Circuit Cellar. Subscribe today!

Note: We’ve made the October 2017 issue of Circuit Cellar available as a free sample issue. In it, you’ll find a rich variety of the kinds of articles and information that exemplify a typical issue of the current magazine.

New CPU Core Boosts Performance for Renesas MCUs

Renesas Electronics has announced the development of its third-generation 32-bit RX CPU core, the RXv3. The RXv3 CPU core will be employed in Renesas’ new RX microcontroller families that begin rolling out at the end of 2018. The new MCUs are designed to address the real-time performance and enhanced stability required by motor control and industrial applications in next-generation smart factory, smart home and smart infrastructure equipment.

The RXv3 core boosts CPU core architecture performance with up to 5.8 CoreMark/MHz, as measured by EEMBC benchmarks, to deliver industry-leading performance, power efficiency and responsiveness. The RXv3 core is backwards compatible with the RXv2 and RXv1 CPU cores in Renesas’ current 32-bit RX MCU families. Binary compatibility using the same CPU core instruction sets ensures that applications written for the previous-generation RXv2 and RXv1 cores carry forward to the RXv3-based MCUs. Designers working with RXv3-based MCUs can also take advantage of the robust Renesas RX development ecosystem to develop their embedded systems.
The RX CPU core combines a design optimized for power efficiency and a fabrication process producing excellent performance. The new RXv3 CPU core is primarily a CISC (Complex Instruction Set Computer) architecture that offers significant advantages over the RISC (Reduced Instruction Set Computer) architecture in terms of code density. RXv3 utilizes a pipeline to deliver high instructions per cycle (IPC) performance comparable to RISC. The new RXv3 core builds on the proven RXv2 architecture with an enhanced pipeline, options for register bank save functions and double precision floating-point unit (FPU) capabilities to achieve high computing performance, along with power and code efficiency.

The enhanced RX core five-stage superscalar architecture enables the pipeline to execute more instructions simultaneously while maintaining excellent power efficiency. The RXv3 core will enable the first new RX600 MCUs to achieve 44.8 CoreMark/mA with an energy-saving cache design that reduces both access time and power consumption during on-chip flash memory reads, such as instruction fetch.

The RXv3 core achieves significantly faster interrupt response times with a new option for single-cycle register saves. Using dedicated instruction and a save register bank with up to 256 banks, designers can minimize the interrupt handling overhead required for embedded systems operating in real-time applications such as motor control. RTOS context switch time is up to 20 percent faster with the register bank save function.

The model-based development (MBD) approach has penetrated various application developments; it enables the DP-FPU to help reduce the effort of porting high precision control models to the MCU. Similar to the RXv2 core, the RXv3 core performs DSP/FPU operations and memory accesses simultaneously to substantially boost signal processing capabilities.

Renesas plans to start sampling shipments of RXv3-based MCUs before the end of Q4 2018.

Renesas Electronics | www.renesas.com

New IDE Version Shrinks Arm MCU Executable Program Sizes

After a successful beta period, Segger Microcontroller has added the new Linker and Link-Time Optimization (LTO) to the latest release build of their powerful cross-platform integrated development environments, Embedded Studio for ARM and Embedded Studio for Cortex-M.

The new product versions deliver on the promise of program size reduction, achieving a significant 5-12% reduction over the previous versions on typical applications, and even higher gains compared to conventional GCC tool chains. These savings are the result of the new LTO, combined with Segger’s Linker and Run-time library emLib-C. Through LTO, it is possible to optimize the entire application, opening the door for optimization opportunities that are simply not available to the compiler.

The Linker adds features such as compression of initialized data and deduplication, as well as the flexibility of dealing with fragmented memory maps that embedded developers have to cope with. Like all Segger software, it is written from scratch for use in deeply embedded computing systems. Additionally, the size required by the included runtime library is significantly lower than that of runtime libraries used by most GCC tool chains.

Segger Microcontroller | www.segger.com

December Circuit Cellar: Sneak Preview

The December issue of Circuit Cellar magazine is coming soon. Don’t miss this last issue of Circuit Cellar in 2018. Pages and pages of great, in-depth embedded electronics articles prepared for you to enjoy.

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Here’s a sneak preview of December 2018 Circuit Cellar:

AI, FPGAs and EMBEDDED SUPERCOMPUTING

Embedded Supercomputing
Gone are the days when supercomputing levels of processing required a huge, rack-based systems in an air-conditioned room. Today, embedded processors, FPGAs and GPUs are able to do AI and machine learning kinds of operation, enable new types of local decision making in embedded systems. In this article, Circuit Cellar’s Editor-in-Chief, Jeff Child, looks at these technology and trends driving embedded supercomputing.

Convolutional Neural Networks in FPGAs
Deep learning using convolutional neural networks (CNNs) can offer a robust solution across a wide range of applications and market segments. In this article written for Microsemi, Ted Marena illustrates that, while GPUs can be used to implement CNNs, a better approach, especially in edge applications, is to use FPGAs that are aligned with the application’s specific accuracy and performance requirements as well as the available size, cost and power budget.

NOT-TO-BE-OVERLOOKED ENGINEERING ISSUES AND CHOICES

DC-DC Converters
DC-DC conversion products must juggle a lot of masters to push the limits in power density, voltage range and advanced filtering. Issues like the need to accommodate multi-voltage electronics, operate at wide temperature ranges and serve distributed system requirements all add up to some daunting design challenges. This Product Focus section updates readers on these technology trends and provides a product gallery of representative DC-DC converters.

Real Schematics (Part 1)
Our magazine readers know that each issue of Circuit Cellar has several circuit schematics replete with lots of resistors, capacitors, inductors and wiring. But those passive components don’t behave as expected under all circumstances. In this article, George Novacek takes a deep look at the way these components behave with respect to their operating frequency.

Do you speak JTAG?
While most engineers have heard of JTAG or have even used JTAG, there’s some interesting background and capabilities that are so well know. Robert Lacoste examines the history of JTAG and looks at clever ways to use it, for example, using a cheap JTAG probe to toggle pins on your design, or to read the status of a given I/O without writing a single line of code.

PUTTING THE INTERNET-OF-THINGS TO WORK

Industrial IoT Systems
The Industrial Internet-of-Things (IIoT) is a segment of IoT technology where more severe conditions change the game. Rugged gateways and IIoT edge modules comprise these systems where the extreme temperatures and high vibrations of the factory floor make for a demanding environment. Here, Circuit Cellar’s Editor-in-Chief, Jeff Child, looks at key technology and product drives in the IIoT space.

Internet of Things Security (Part 6)
Continuing on with his article series on IoT security, this time Bob Japenga returns to his efforts to craft a checklist to help us create more secure IoT devices. This time he looks at developing a checklist to evaluate the threats to an IoT device.

Applying WebRTC to the IoT
Web Real-time Communications (WebRTC) is an open-source project created by Google that facilitates peer-to-peer communication directly in the web browser and through mobile applications using application programming interfaces. In her article, Callstats.io’s Allie Mellen shows how IoT device communication can be made easy by using WebRTC. With WebRTC, developers can easily enable devices to communicate securely and reliably through video, audio or data transfer.

WI-FI AND BLUETOOTH IN ACTION

IoT Door Security System Uses Wi-Fi
Learn how three Cornell students, Norman Chen, Ram Vellanki and Giacomo Di Liberto, built an Internet connected door security system that grants the user wireless monitoring and control over the system through a web and mobile application. The article discusses the interfacing of a Microchip PIC32 MCU with the Internet and the application of IoT to a door security system.

Self-Navigating Robots Use BLE
Navigating indoors is a difficult but interesting problem. Learn how these two Cornell students, Jane Du and Jacob Glueck, used Received Signal Strength Indicator (RSSI) of Bluetooth Low Energy (BLE) 4.0 chips to enable wheeled, mobile robots to navigate towards a stationary base station. The robot detects its proximity to the station based on the strength of the signal and moves towards what it believes to be the signal source.

IN-DEPTH PROJECT ARTICLES WITH ALL THE DETAILS

Sun Tracking Project
Most solar panel arrays are either fixed-position, or have a limited field of movement. In this project article, Jeff Bachiochi set out to tackle the challenge of a sun tracking system that can move your solar array to wherever the sun is coming from. Jeff’s project is a closed-loop system using severs, opto encoders and the Microchip PIC18 microcontroller.

Designing a Display System for Embedded Use
In this project article, Aubrey Kagan takes us through the process of developing an embedded system user interface subsystem—including everything from display selection to GUI development to MCU control. For the project he chose a 7” Noritake GT800 LCD color display and a Cypress Semiconductor PSoC5LP MCU.

Benchmarks for the IoT

Input Voltage

–Jeff Child, Editor-in-Chief

JeffHeadShot

I remember quite vividly back in 1997 when Marcus Levy founded the Embedded Microprocessor Benchmark Consortium, better known as EEMBC. It was big deal at the time because, while benchmarks where common in the consumer computing world of desktop/laptop processors, no one had ever crafted any serious benchmarks for embedded processors. I was an editor covering embedded systems technology at the time, and Marcus, as an editor with EDN Magazine back then, traveled in the same circles as I did. On both the editorial side and on the processor vendor side, he had enormous respect in the industry—making him an ideal person to spin up an effort like EEMBC.

Creating benchmarks for embedded processors was more complicated than for general purpose processors, but EEMBC was up the challenge. Fast forward to today, and EEEBC now boasts a rich list of performance benchmarks for the hardware and software used in a variety of applications including autonomous driving, mobile imaging, mobile devices and many others. In recent years, the group has taken on the complex challenge of developing benchmarks for the Internet-of-Things (IoT).

I recently had the chance to talk with EEMBC’s current president, Peter Torelli, about the consortium’s latest effort: its IoTMark-BLE benchmark. It’s part of the EEMBC’s IoTMark benchmarking suite for measuring the combined energy consumption of an edge node’s sensor interface, processor and radio interface. IoTMark-BLE focuses on Bluetooth Low Energy (BLE) devices. In late September, EEMBC announced that the IoTMark-BLE benchmark is available for licensing.

The IoTMark-BLE benchmark profile models a real IoT edge node consisting of an I²C sensor and a BLE radio through sleep, advertise and connected-mode operation. The benchmark measures the energy required to power the edge node platform and to run the tests fed by the benchmark. At the center of the benchmark is the IoTConnect framework, a low-cost benchmarking harness used by multiple EEMBC benchmarks. The framework provides an external sensor emulator (the I/O Manager), a BLE gateway (the radio manager) and an Energy Monitor.

Benchmark users interact with the DUT via an interface with which they can set a number of tightly defined parameters, such as connection interval, I²C speed, BLE transmission power and more. Default values are provided to enable direct comparisons between DUTs, or users can change them to analyze a design’s sensitivity to each parameter. IoTMark-BLE’s IoTConnect framework supports microcontrollers (MCUs) and radio modules from any vendor, and it is compatible with any embedded OS, software stack or OEM hardware.

It makes sense that IoT benchmarks focus on power and energy use. IoT edge devices need to work in remote locations near the sensors they’re linked with. With that in mind, Peter Torelli says that the benchmark measures everything inside an IoT system-on-chip (SoC)—including the peripheral I/O reading from the I2C sensor, the transmit and receive amplifiers in the BLE radio—everything except the sensor itself. Torelli says it was important to not use intelligent sensors for the benchmark, the idea being that its important that the MCU’s role performing communication be part of the measurement. Interestingly, in developing the benchmark, it was found that even the software stacks on IoT SoCs have a big impact on performance. “Some are very efficient when they’re in advertise mode or in active mode, and then go to sleep,” says Torelli, “And there are others that remain active for much longer times and burn a lot of power.”

Shifting gears, I want to take moment to praise long time columnist and member of the Circuit Cellar family, Ed Nisley. Over 30 years ago, Steve Ciarcia asked Ed to write a regular column for the brand-new Circuit Cellar INK magazine. After an even 200 articles, Ed decided to make his September column his last. Thank you, Ed, for your many years of insightful, quality work in the pages of this magazine. You’ll be missed. Readers can follow Ed’s continuing series of shop notes, projects and curiosities on his blog at softsolder.com.

Let me welcome Brian Millier as our newest Circuit Cellar columnist—his column Pickup Up Mixed Signals begins this issue. Brian is no stranger to the magazine, penning over 50 guest features in the magazine since the mid-90s on a variety of topics including guitar amplifier electronics, IoT system design, LCDs and many others. I’m thrilled to have Brian joining our team. With his help, we promise to continue fulfilling Circuit Cellar’s role as the leading media platform aimed at inspiring the evolution of embedded system design.

This appears in the November 340 issue of Circuit Cellar magazine

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MCU Family Serves Up Ultra-Low Power Functionality

STMicroelectronics has released its STM32L0x0 Value Line microcontrollers that provide an additional, low-cost entry point to the STM32L0 series The MCUs embed the Arm Cortex -M0+ core. With up to 128 KB flash memory, 20 KB SRAM and 512 byte true embedded EEPROM on-chip the MCUs save external components to cut down on board space and BOM cost. In addition to price-sensitive and space-constrained consumer devices such as fitness trackers, computer or gaming accessories and remotes, the new STM32L0x0 Value Line MCUs are well suited for personal medical devices, industrial sensors, and IoT devices such as building controls, weather stations, smart locks, smoke detectors or fire alarms.
The devices leverage ST’s power-saving low-leakage process technology and device features such as a low-power UART, low-power timer, 41µA 10 ksample/s ADC and wake-up from power saving in as little as 5µs. Designers can use these devices to achieve goals such as extending battery runtime without sacrificing product features, increasing wireless mobility, or endowing devices like smart meters or IoT sensors with up to 10-year battery-life leveraging the ultra-frugal 670 nA power-down current with RTC and RAM retention.

The Keil MDK-ARM professional IDE supports STM32L0x0 devices free of charge, and the STM32CubeMX configuration-code generator provides easy-to-use design analysis including a power-consumption calculator. A compatible Nucleo-64 development board (NUCLEO-L010RB) with Hardware Abstraction Layer (HAL) library is already available, to facilitate fast project startup.

The STM32L0x0 Value Line comprises six new parts, giving a choice of 16- KB, 64- KB, or 128- KB of flash memory, 128-byte, 256-byte or 512-byte EEPROM, and various package options. In addition, pin-compatibility with the full STM32 family of more than 800 part numbers offering a wide variety of core performance and integrated features, allows design flexibility and future scalability, with the freedom to leverage existing investment in code, documentation and tools.

STM32L0x0 Value Line microcontrollers are in production now, priced from $0.44 with 16-KB of flash memory and 128-byte EEPROM, for orders of 10,000 pieces. The unit price starting at $0.32 is available for high-volume orders.

STMicroelectronics| www.st.com

Module Meets Needs of Simple Bluetooth Low Energy Systems

Laird has announced its new Bluetooth 5 module series, designed to simplify the process of bringing wireless designs to market. The BL651 Series is the latest addition to Laird’s Nordic Semiconductor family of Bluetooth 5 offerings. Building on the success of the BL652 and BL654 series, the BL651 is a cost-effective solution for simple Bluetooth Low Energy (BLE) applications that provides all the capabilities of the Nordic nRF52810 silicon in a small, fully certified module.

The BL651 leverages the benefits of Bluetooth 5 features, including higher data throughput and increased broadcasting capacity, in a tiny footprint. According to the company, the BL651 has been designed to allow a seamless hardware upgrade path to the more fully featured BL652 series if additional flash and RAM requirements are identified in the customer development process.

The BL651 series delivers the capabilities of the Nordic nRF52810 silicon in a small, fully certified module with simple soldering castellation for easy prototyping and mass production manufacturing. Designers can use the Nordic SDK and SoftDevice or Zephyr RTOS to build their BLE application. In addition, the BL651 series is 100% PCB footprint drop in compatible with the BL652 Series of modules, allowing flexibility to upscale designs if more flash/RAM or further feature sets are required during the design process.

In large factories Bluetooth sensor networks can easily span an entire campus and gather sensor data that can provide deep insights needed to maintain efficiency, productivity and security. The BL651 Series helps make these types of sensor networks easy to build, scale, and maintain.

Laird Connectivity | www.lairdtech.com

AVR Microcontrollers Get MPLAB X IDE Support

Designers who have traditionally used Microchip’s PIC microcontrollers and developed with the MPLAB ecosystem can now easily evaluate and incorporate AVR MCUs into their applications. The majority of AVR MCUs are now beta supported with the release of MPLAB X Integrated Development Environment (IDE) version 5.05, available now from Microchip Technology. Support for additional AVR MCUs and enhancements will be added in future MPLAB versions. AVR support will continue to be added to Atmel Studio 7 and Atmel START for current and future AVR devices.

MPLAB X IDE version 5.05 provides a unified development experience that is both cross-platform and scalable with compatibility on Windows, macOS and Linux operating systems, allowing designers to develop with AVR MCUs on their hardware system of choice. The tool chain has been enhanced with support for Microchip’s code configuration tool, MPLAB Code Configurator (MCC), making it easy for developers to configure software components and device settings such as clocks, peripherals and pin layout with the tools’ menu-driven interface. MCC can also generate code for specific development boards, such as Microchip’s Curiosity ATmega4809 Nano (DM320115) development board and existing AVR Xplained development boards.

More compiler choices and debugger/programmer options are also available when compiling and programming AVR MCUs using MPLAB X IDE 5.05. Compiler choices include the AVR MCU GNU Compiler Collection (GCC) or the MPLAB XC8 C Compiler, providing developers with additional advanced software optimization techniques to reduce code size. Designers can also accelerate debugging and programming using MPLAB PICki 4 programmer/debugger tool or the newly released MPLAB Snap programmer/debugger tool.

The majority of development boards available to evaluate and program AVR MCUs are supported by the MPLAB ecosystem and MCC. Xplained development boards are compatible with START and are now compatible with MPLAB X IDE. Xplained development boards are cost-effective, fully integrated MCU development platforms targeted at first-time users, makers, and those seeking a feature-rich rapid prototyping board. The Xplained platform includes an integrated programmer/debugger and requires no additional hardware to get started.

MPLAB X IDE version 5.05, MPLAB XC8 C Compiler and AVR MCU GCC are available for free on Microchip’s website. The MPLAB PICkit 4 (PG164140) development tool is available today for $47.95. The MPLAB Snap (PG164100) is available today for $14.95. The ATmega4809 Curiosity Nano board (DM320115) is available today for $10.00.

Microchip Technology | www.microchip.com

MCUs Provide Inductive Sensing Solution

Cypress Semiconductor has announced production availability of the PSoC 4700S series of microcontrollers that use MagSense inductive sensing technology for contactless metal sensing. The series also incorporates Cypress’ industry-leading CapSense capacitive-sensing technology, empowering consumer, industrial, and automotive product developers to create sleek, state-of-the-art designs using metals and other materials. The highly-integrated MCUs enable cost-efficient system designs by reducing bill-of-material costs and provide superior noise immunity for reliable operation, even in extreme environmental conditions.
Cypress also announced availability of the new CY8CKIT-148 PSoC 4700S Inductive Sensing Evaluation Kit, a low-cost hardware platform that enables design and debug of the MCUs. The kit includes MagSense inductive-sensing buttons and a proximity sensor, as well as an FPC connector to evaluate various coils, such as a rotary encoder. The PSoC 4700S series is supported in Cypress’ PSoC Creator Integrated Design Environment (IDE), which allows users to drag and drop production-ready hardware blocks, including the MagSense inductive sensing capability, into a design and configure them easily via a simple graphical user interface.

The PSoC 4700S MCUs integrate:

  • A 32-bit Arm Cortex-M0+ core
  • Up to 32 KB Flash and 4 KB SRAM
  • 36 GPIOs
  • 7 programmable analog blocks
  • 7 programmable digital blocks

Support for up to 16 sensors, enabling implementation of buttons, linear and rotary encoders, and proximity sensing.

The CY8CKIT-148 PSoC 4700S Inductive Sensing Evaluation Kit is available for $49 at the Cypress online store and from select distributors.

Cypress Semiconductor | www.cypress.com

Firms Team to Teach Implementing Power Supplies on STM32 MCUs

STMicroelectronics and Biricha Digital Power, an industrial training and consultancy company focused on switched power design and EMC, have developed a workshop to show power-supply engineers why and how to quickly move to a digital implementation. The workshop, aimed at analog PSU (Power Supply Unit) designers and embedded-system engineers who need to build high-performance, stable digital power supplies and Digital PFCs (Power Factor Corrections), will be based on a complementary portfolio of tailored hardware, software, tools, labs and detailed training documentation.

This includes the STM32F334 product line (with its high-resolution timer – 217 ps), a member of ST’s STM32 family of more than 800 MCUs covering the full spectrum from ultra-low power to high performance and supporting ecosystem, combined with Biricha’s Power Supply and PFC design software.

Key sessions will demonstrate how to quickly design digital power supplies and power factor correction from scratch, and how to design stable digital control loops for both voltage and current mode DC/DC and PFC applications. Workshop participants will get a chance to design, code, implement, and test several digital power supplies. The first workshop, an all-inclusive 4-day course hosted by Future Electronics, is scheduled for November 27-30, 2018 in Munich, Germany.

Biricha Digital Power | www.biricha.com

STMicroelectronics | www.st.com

MCU-Based Project Enhances Dance Game

Using Wavelet Transform

Microcontrollers are perfect for systems that need to process analog signals such as audio and do real-time digital control in conjunction with those signals. Along just those lines, learn how these two Cornell students recreated the classic arcade game “Dance Dance Revolution” using a Microchip PIC32 MCU. Their version performs wavelet transforms to detect beats from an audio signal to synthesize dance move instructions in real time without preprocessing.

By Michael Solomentsev and Drew Dunne

We designed a version of the traditional arcade game, “Dance Dance Revolution,” that synthesizes dance instructions from any audio source using the PIC32 MCU. Unlike the original game, in which users must choose from a pre-selected list of songs, our system allows users to plug in their audio device and play songs of their choice. The dance move instructions are then generated in real time by buffering the audio and processing it, using the discrete wavelet transform.

We were inspired by a mutual desire to work on a music-related project, and both of us had fond memories of playing this kind of game. We also wanted to add some sort of novel, interesting component, so we brainstormed the idea of allowing the player to play whatever song he or she wanted. The game is much more fun when the song playing is your favorite tune. All versions of the commercial game have pre-programmed song libraries, so replay value is limited. Our version has no such limitation. The discrete wavelet transform was selected as a processing method because we needed both time and frequency resolution. We also needed a computationally efficient algorithm.

The system requires two kinds of user input: an audio source and button presses from the dance mat floor tiles. The audio input must be processed, so it needs to be delayed or buffered until the processing is complete. Another reason for the delay of the audio output is to give ample time for the user to react to the instructions created from processing the audio. In contrast, the user input needs to be in real time. We use two PIC32s to do the input processing—one detects beats and reads the dance mat input, while the other buffers audio. We use a macOS application to display the beats and handle scoring.

Figure 1
Overview of our entire “Dance Dance Evolution” project fully set up

We built a custom dance mat for the game, consisting of five individual tiles that could each detect when players put their weight on it (Figure 1). They needed to be both durable and sensitive to pressure. To achieve this, we used force sensitive resistors wired in parallel. These were polled at approximately 20 Hz for changes in resistance. These resistors were placed directly between the tiles—which were made out of canvas covered boards—and the supports that raised them off the ground.

Hardware Design

We used a PIC32 development board designed by Sean Carroll, with an DAC socket and GPIO pins brought out, to provide flexibility for development [1]. We also used a second PIC32 on a smaller development board, with connections to the floor tiles and the Serial to USB cable. The floor tiles were wired underneath to a protoboard, and all-important signals were fed up to our main protoboard using a ribbon cable. Figure 2 shows the schematic of the system, incorporating Sean Carroll’s full-size and small PIC32 development boards.

Figure 2
Shown here is the schematic of the system, incorporating Sean Carroll’s full-size and small PIC32 development boards.

We soldered our audio circuitry on a protoboard to make it easier to debug and to reduce noise. Our audio input jack fed into a 500 µF capacitor to cut out any DC component, then we fed it into an offset circuit, such that the ADCs could read it with no clipping. The DAC output was fed directly to an audio jack and speakers.

Another PIC32 MCU handled audio buffering, because SPI communication with both a 128 KB serial SRAM and DAC took too many cycles to perform the necessary signal processing simultaneously. We used our professor Bruce Land’s code for the SRAM chip for reading and writing to the SRAM and writing to the DAC [2]. His code included some read/write methods, and handled the SPI setup and mode changes. We had to add code to read from the ADC in a timer interrupt at 40 kHz, write to a location in the SRAM, and finally read from a different location and write that value to the DAC. The locations written to and read from were incremented each time, to create a loop around the SRAM memory locations. To change how long we wanted to buffer the audio, we just needed to change the values of MAX_ADDR and MIN_ADDR. The closer together they were, the smaller the range of the SRAM we used. This was important, because using the entire SRAM gave us a buffer of about 3.3 seconds, and we wanted only about 2.5 seconds.

The major consideration that affected our tile construction was a desire for resiliency. Because users would probably stomp on each of the tiles fairly hard, we wanted to make sure that our press detection system could withstand a lot of force. We also wanted a simple, easy solution to mock-up and build.

Initially we looked into using strain gauges, but they would require mounting to a base plate and the tile to be pushed. Traditional buttons did not seem like a robust enough option. Instead, we decided to use force sensitive resistors (FSRs). Initial testing revealed that the unpressed FSRs had resistance of approximately 6 MΩ. When pressed, it was approximately 1 kΩ. This huge discrepancy made it easy to probe it for a press. We thank Interlink Electronics, who were gracious enough to donate 10 FSR402s for use in our project. ..

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