Innovative Magnetic Sensing Integrated IC

Texas Instruments recently unveiled the DRV421 magnetic sensing IC with a fully integrated fluxgate sensor and compensation coil driver. It includes all the required signal conditioning circuitry.DRV421_TI

Compared to traditional Hall effect sensors, the DRV421 provides high sensor accuracy and linearity, high dynamic range, and simpler system design. With it, you can easily design magnetic closed-loop current sensors for a variety of applications (e.g., motor control, renewable energy, battery chargers and power monitoring).

The $49 DRV421 evaluation module (DRV421EVM) makes it easy to evaluate the new current sensing IC’s features and performance. The DRV421 comes in a 4 mm- × 4 mm QFN package. Pre-production samples are available now. Production quantities will be available in Q3 2015 for 2.50 in 1,000-unit quantities.

Source: Texas Instruments

H.264 Video I/O Companion Integrated Circuits

Microchip Technology has announced the availability of the OS85621 and OS85623, which are the world’s first H.264 video I/O companion integrated circuits (ICs) optimized for the Media Oriented Systems Transport (MOST) high-speed automotive infotainment and Advanced Driver Assistance Systems (ADAS) network technology. Microchip OS85621

Featuring a low-latency, high-quality H.264 codec and an on-chip Digital Transmission Content Protection (DTCP) coprocessor, the OS85621 enables automotive designers to quickly implement content-protected video transmission solutions. You can now transmit video streams with restricted access from devices (e.g., DIDs, digital media drives, and TV tuners) as encrypted H.264 over a MOST network.

The OS85621’s on-chip DTCP coprocessor accelerates the computation-intensive operations required for DTCP authentication and content protection. You can simultaneously route up to eight independent data streams through the DTCP coprocessor’s cipher engine for M6 or AES-128 encryption/decryption.

The ultra-low-latency mode of the H.264 codec enables single-digit millisecond latency from video input to video output, including encoding, transmission over a MOST network, and decoding. This real-time, high-speed video processing makes the OS85623—which has no DTCP coprocessor—an excellent option for camera-based ADAS applications that are designed to enhance vehicle safety.

The OS85621 and OS85623 H.264 video I/O companion ICs are now available in a BGA 196 package. Volume pricing starts at $8.

Source: Microchip Technology

The Future of Very Large-Scale Integration (VLSI) Technology

The historical growth of IC computing power has profoundly changed the way we create, process, communicate, and store information. The engine of this phenomenal growth is the ability to shrink transistor dimensions every few years. This trend, known as Moore’s law, has continued for the past 50 years. The predicted demise of Moore’s law has been repeatedly proven wrong thanks to technological breakthroughs (e.g., optical resolution enhancement techniques, high-k metal gates, multi-gate transistors, fully depleted ultra-thin body technology, and 3-D wafer stacking). However, it is projected that in one or two decades, transistor dimensions will reach a point where it will become uneconomical to shrink them any further, which will eventually result in the end of the CMOS scaling roadmap. This essay discusses the potential and limitations of several post-CMOS candidates currently being pursued by the device community.

Steep transistors: The ability to scale a transistor’s supply voltage is determined by the minimum voltage required to switch the device between an on- and an off-state. The sub-threshold slope (SS) is the measure used to indicate this property. For instance, a smaller SS means the transistor can be turned on using a smaller supply voltage while meeting the same off current. For MOSFETs, the SS has to be greater than ln(10) × kT/q where k is the Boltzmann constant, T is the absolute temperature, and q is the electron charge. This fundamental constraint arises from the thermionic nature of the MOSFET conduction mechanism and leads to a fundamental power/performance tradeoff, which could be overcome if SS values significantly lower than the theoretical 60-mV/decade limit could be achieved. Many device types have been proposed that could produce steep SS values, including tunneling field-effect transistors (TFETs), nanoelectromechanical system (NEMS) devices, ferroelectric-gate FETs, and impact ionization MOSFETs. Several recent papers have reported experimental observation of SS values in TFETs as low as 40 mV/decade at room temperature. These so-called “steep” devices’ main limitations are their low mobility, asymmetric drive current, bias dependent SS, and larger statistical variations in comparison to traditional MOSFETs.

Spin devices: Spintronics is a technology that utilizes nano magnets’ spin direction as the state variable. Spintronics has unique properties over CMOS, including nonvolatility, lower device count, and the potential for non-Boolean computing architectures. Spintronics devices’ nonvolatility enables instant processor wake-up and power-down that could dramatically reduce the static power consumption. Furthermore, it can enable novel processor-in-memory or logic-in-memory architectures that are not possible with silicon technology. Although in its infancy, research in spintronics has been gaining momentum over the past decade, as these devices could potentially overcome the power bottleneck of CMOS scaling by offering a completely new computing paradigm. In recent years, progress has been made toward demonstration of various post-CMOS spintronic devices including all-spin logic, spin wave devices, domain wall magnets for logic applications, and spin transfer torque magnetoresistive RAM (STT-MRAM) and spin-Hall torque (SHT) MRAM for memory applications. However, for spintronics technology to become a viable post-CMOS device platform, researchers must find ways to eliminate the transistors required to drive the clock and power supply signals. Otherwise, the performance will always be limited by CMOS technology. Other remaining challenges for spintronics devices include their relatively high active power, short interconnect distance, and complex fabrication process.

Flexible electronics: Distributed large area (cm2-to-m2) electronic systems based on flexible thin-film-transistor (TFT) technology are drawing much attention due to unique properties such as mechanical conformability, low temperature processability, large area coverage, and low fabrication costs. Various forms of flexible TFTs can either enable applications that were not achievable using traditional silicon based technology, or surpass them in terms of cost per area. Flexible electronics cannot match the performance of silicon-based ICs due to the low carrier mobility. Instead, this technology is meant to complement them by enabling distributed sensor systems over a large area with moderate performance (less than 1 MHz). Development of inkjet or roll-to-roll printing techniques for flexible TFTs is underway for low-cost manufacturing, making product-level implementations feasible. Despite these encouraging new developments, the low mobility and high sensitivity to processing parameters present major fabrication challenges for realizing flexible electronic systems.

CMOS scaling is coming to an end, but no single technology has emerged as a clear successor to silicon. The urgent need for post-CMOS alternatives will continue to drive high-risk, high-payoff research on novel device technologies. Replicating silicon’s success might sound like a pipe dream. But with the world’s best and brightest minds at work, we have reasons to be optimistic.

Author’s Note: I’d like to acknowledge the work of PhD students Ayan Paul and Jongyeon Kim.