Zynq SoC SOM Module Enabled With HSR/PRP IP

iWave Systems has partnered with SoC-e for enabling HSR/PRP IP on iWave’s Zynq 7000 SoC SOM Module. iWave has rigorously validated SoC-e’s High-availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP) IP Protocol on our Zynq 7000 SoC based SOM module. iWave’s Zynq 7000 SoC SOM and SoC-e’s HSR/PRP Switch IP Core reduce the time-to-market and simplifying design complexity. SOC-e develops IP portfolios for leading-edge networking and synchronization technologies for time critical systems.The Zynq-7000 programmable SoC family integrates the software programmability of an Arm-based processor with the hardware programmability of an FPGA, enabling key analytics and hardware acceleration while integrating CPU, DSP, ASSP and mixed signal functionality on a single device. The iW-RainboW-G28M (Zynq 7000 Board) is a featured-full and ready to-operate embedded software and advanced circuit development kit built around the smallest member from the Xilinx Zynq-7000 family, the Z-7010.

The Zynq-7000 SOM / Development Kit is based on the Xilinx All Programmable System-on-Chip architecture, which firmly incorporates a single / Dual Cortex A9 with Xilinx 7-series FPGA logic. At the point when combined with the rich set of media and connectivity peripherals accessible on the Zynq 7000 SOM, the Zynq Z-7007S, Z-7014S, Z-7010, Z-7020, can host an entire design system.

Memories, 512 MB DDR3 (Expandable to 1 GB) or 512 MB NAND Flash (Expandable), that are on-board, video and sound I/O, USB 2.0 OTG, Gigabit Ethernet and SD (4-bit) will have your board up-and-running with no extra hardware required. Moreover, PMIC with RTC bolster connectors is accessible to put any design on a simple development way.

The iW-RainboW-G28M gives an ultra-cost to embedded designers that don’t require the high-thickness I/O of the FMC connector yet at the same time wish to use the enormous preparing force and extensibility of the Zynq AP SoC architecture.

iWave Systems | www.iwavesystems.com

FMC Board Serves up Rich, Flexible I/O Set

Vadatech has announced the FMC155. The FMC155 is an FPGA Mezzanine Card (FMC) per VITA 57.1 standard, offering a small footprint and allowing for general-purpose I/O expansion.

The FMC155 provides sixteen LVDS input/outputs, eight RS-485/422 RX plus eight RS-485/422 TX, and sixteen single-ended +3.3 V input/outputs. LVDS signals go through a Cross Bar Switch (CBS), which allows input/output routing within each group of eight LVDS signals. Each FMC155 CBS port can be individually software-configured for routing, termination, and direction. RS-485/422 can be full duplex or half-duplex depending on ordering option selected.

System integrators will value having a single off the shelf module to provide multiple I/O with standard high density connector for ease of cabling and differential signaling between the transceivers on the FMC and the FPGA on the carrier for optimal signal integrity across the FMC connector. The flexibility provided by the cross bar switch eases integration with programmable LVDS termination and routing.

Vadatech | www.vadatech.com

Fast Quad IF DAC

ADI AD9144 16-bit 2.8 GSPS DAC - Fastest Quad IF DAC - High DynaThe AD9144 is a four-channel, 16-bit, 2.8-GSPS DAC that supports high data rates and ultra-wide signal bandwidth to enable wideband and multiband wireless applications. The DAC features 82-dBc spurious-free dynamic range (SFDR) and a 2.8-GSPS maximum sample rate, which permits multicarrier generation up to the Nyquist frequency.

With –164-dBm/Hz noise spectral density, the AD9144 enables higher dynamic range transmitters to be built. Its low SFDR and distortion design techniques provide high-quality synthesis of wideband signals from baseband to high intermediate frequencies. The DAC features a JESD204B eight-lane interface and low inherent latency of fewer than two DAC clock cycles. This simplifies hardware and software system design while permitting multichip synchronization.

The combination of programmable interpolation rate, high sample rates, and low power at 1.5 W provides flexibility when choosing DAC output frequencies. This is especially helpful in meeting four- to six-carrier Global System for Mobile Communications (GSM) transmission specifications and other communications standards. For six-carrier GSM intermodulation distortion (IMD), the AD9144 operates at 77 dBc at 75-MHz IF. Operating with the on-chip phase-locked loop (PLL) at a 30-MHz DAC output frequency, the AD9144 delivers a 76-dB adjacent-channel leakage ratio (ACLR) for four-carrier Wideband Code Division Multiple Access (WCDMA) applications.

The AD9144 includes integrated interpolation filters with selectable interpolation factors. The dual DAC data interface supports word and byte load, enabling users to reduce input pins on lower data rates to save board space, power, and cost.

The DAC is supported by an evaluation board with an FPGA Mezzanine Card (FMC) connector, software, tools, a SPI controller, and reference designs. Analog Devices’s VisualAnalog software package combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface that enables users to customize their input signal and data analysis.

The AD9144BCPZ DAC costs $80. The AD9144-EBZ and AD9144-FMC-EBZ FMC evaluation boards cost $495.

Analog Devices, Inc.
www.analog.com