Issue 290: EQ Answers

Problem 1—What is an R-C snubber, and what is a typical application for one?

Answer 1—An R-C snubber is the series combination of a resistor and a capacitor that is placed in parallel with a switching element that controls the power to an inductive load in order to safely absorb the energy of switching transients.

The problem is that a load that has an inductive component will produce a brief very high-voltage “spike” when the current through it is interrupted quickly. This spike can cause semiconductor devices to break down or even mechanical contacts to arc over, reducing their lifetime. The snubber absorbs the energy of the spike and dissipates it as heat, without ever allowing the voltage to rise too high.

Problem 2—How do you pick the resistor value in an R-C snubber?

Answer 2—To pick the resistor value, you first need to know what the maximum voltage you want to allow is. For example, if you have a MOSFET that has a drain-to-source breakdown rating of 400 V, you might choose to limit the snubber voltage to 200 V. Call this VMAX. Next, you need to know the maximum current that will be flowing through the load (and the switching element). Call this IMAX. At the instant the switching element opens, this current will be flowing through the resistor, and this will determine the initial voltage that appears across the switching element. Therefore pick the resistance: R = VMAX/IMAX.

Question 3—How do you pick the capacitor value in an R-C snubber?

Answer 3—Picking the capacitor can be more tricky. The key concept is that you need to pick a capacitor that can absorb the energy stored in the inductance of the load while keeping its terminal voltage under VMAX. Since loads don’t often specify their values of inductance, this may require some experimentation. Let’s call the load inductance LLOAD. The energy that it stores at the maximum current is: E = 0.5 IMAX2 LLOAD.The energy that a capacitor stores is: E = 0.5 V2C.

So, if we say that we want the capacitor to store the same energy that’s in the inductance when its terminal voltage is at VMAX, we can combine the twe equations and then solve for C:



This value will actually be somewhat conservative, because some of the initial energy of the inductance will be dissipated in the resistor during the initial transient, before it even gets to the capacitor. After that, the inductance and the capacitor will behave as a series-resonant circuit, with the current oscillating back and forth until all of the energy is gone.

Problem 4—What additional concern is there with regard to an R-C snubber when switching AC power?

Answer 4—When switching DC, the snubber absorbs the energy stored in the load’s inductance, and after a while, no current flows and the capacitor is charged to the supply voltage. However, when switching AC, the snubber has a finite impedance at the AC frequency, which means that it “leaks” a certain amount of current even when the main switching element is open. While this may or may not cause a problem for the load (usually not), there is also the issue of the continuous power being dissipated in the snubber resistor. The resistor must be rated to withstand this leakage power in addition to the energy of the switching events.


Issue 288: EQ Answers

Problem 1—When designing a pair of band-splitting filters (for, say, an audio crossover), why is it important to match frequencies of the –3-dB points of the low-pass and high-pass responses?

Answer 1—The cutoff frequencies of the two filters should be the same so that the overall frequency response when the filter outputs are recombined is flat and has no phase shift. For example, if you feed the cutoff frequency into both filters and then combine the results again, the output will be the same level as the input (0-dB overall gain). As long as the “order” of the two filters is the same (they have the same roll-off slope), the gain will be flat across the entire transition band of frequencies.

What’s really going on is this: A filter’s –3-dB point is where the output has half the power of the input signal, which means that the output voltage is 1/sqrt(2) times the input voltage. The –3-dB point is also where the output signal is phase shifted by 45°. It lags by 45° in the low-pass filter and leads by 45° in the high-pass filter. This means that the outputs of the two filters have a total phase shift of 90° relative to each other.

When you add two sinewaves that have the same amplitude and a 90° phase shift, you don’t get double the voltage. You get sqrt{2} times the voltage. You also get a waveform that has a phase midway between the two signals being added.

So, the final amplitude is sqrt{2}/sqrt{2} times the original input voltage, and the final phase is midway between 45° and –45°, or 0°. In other words, you get the original sinewave back exactly.

Problem 2—A certain portable stereo unit runs for about 12 h on a set of LR20 (D-size alkaline) batteries. If you want to extend the stereo’s run-time, is it better to simply use multiple sets of batteries sequentially, or to connect them all in series-parallel to create one big battery pack?

Answer 2—In general, batteries provide greater capacity at lower average currents. This is partly due to the battery’s internal chemistry, but largely due to the simple fact that less power is wasted in the internal resistance of the battery.

Here are two graphs taken from two different datasheets that illustrate this.eq0659_fig1eq0659_fig2

If the stereo is running for 12 h on a set of batteries, based on eyeballing these graphs, it’s probably getting about 8 A-h of capacity out of one set, so it’s drawing about 660 mA on average. Putting three sets of batteries in parallel would drop the current in each set to about 220 mA, and it will get something closer to 12 A-h from each set.

In other words, if you use, say, three sets of batteries sequentially, you’ll get 36 h of playing time (24 A-h total), but if you use them in parallel together, you’ll get something closer to 54 h of playing time (36 A-h total).

Problem 3—If you wanted to make a capacitor from scratch, what common household materials might you use?

Answer 3—A capacitor consists of two flat conductors separated by a dielectric. Aluminum foil is an obvious candidate for the conductors, and either waxed paper or plastic food wrap would be suitable dielectrics — they have similar characteristics.

Problem 4—How big would a 10-µF capacitor using these materials be?

Answer 4—You need to do some basic calculations first. The formula for capacitance is:Eq288eq1

  • εR is the relative permittivity of the dielectric
  • ε0 is the permittivity of free space
  • A is the area of one plate
  • d is the separation between the plates

Let’s say you want to use 1-mil (25.4 µm) waxed paper as a dielectric. Note that this will determine the voltage rating of the capacitor. The dielectric strength of waxed paper is about 35-40 MV/m, so this will give you a capacitor that can theoretically handle almost a kilovolt, but be conservative in how you use it!

The relative permittivity of waxed paper is about 3.7, the permittivity of free space is 8.854e-12 F/m. Solve for the area required:Eq288eq2

If you get aluminum foil and waxed paper that’s about 12″ (30 cm) wide, you can probably get an overlap of, say, 25 cm, which means that you’ll need a length of about 15.5 m to get the area you need.

If you then roll up your capacitor (using a second layer of waxed paper), the capacitance will be doubled, or about 10 µF. Obviously, this will be physically rather large, more than a foot long and several inches in diameter.

Plastic food wrap has a similar dielectric constant and dielectric strength as waxed paper, but typically comes in a 0.5-mil (12.7 µm) thickness. A capacitor using this would have about half the voltage rating and about half the overall volume.

Issue 286: EQ Answers

Question 1—A divider is a logic module that takes two binary numbers and produces their numerical quotient (and optionally, the remainder). The basic structure is a series of subtractions and multiplexers, where the multiplexer uses the result of the subtraciton to select the value that gets passed to the next step. The quotient is formed from the bits used to control the multiplexers, and the remainder is the result of the last subtraction.

If it is implemented purely combinatorially, then the critical path through all of this logic is quite long (even with carry-lookahead in the subtractors) and the clock cycle must be very slow. What could be done to shorten the clock period without losing the ability to get a result on every clock?

Answer 1—Pretty much any large chunk of combinatorial logic can be pipelined in order to reduce the clock period. This allows it to produce more results in a given amount of time, at the expense of increasing the latency for any particular result.

Divider logic is very easy to pipeline, and the number of pipeline stages you can use is fairly arbitrary. You could insert a pipeline register after each subtract-mux pair, or you might choose to do two or more subtract-mux stages per pipeline register You could even go so far as to pipeline the subtracts and the muxes separately (or even pipeline *within* each subtract) in order to get the fastest possible clock speed, but this would be rather extreme.

The more pipeline registers you use, the shorter the critical path (and the clock period) can be, but you use more resources (the registers). Also, the overall latency goes up, since you need to account for the setup and propagation times of the pipeline registers in the clock period (in addition to the subtract-mux logic delays). This gets multiplied by the number of pipeline stages in order to compute the total latency.

Question 2—On the other hand, what could be done to reduce the amount of logic required for the divider, giving up the ability to have a result on every clock?


Answer 2—If you don’t need the level of performance provided by a pipelined divider, you can computes the quotient serially, one bit at a time. You would just need one subtractor and one multiplexer, along with registers to hold the input values, quotient bits and the intermediate result.

You could potentially compute more than one bit per clock period using additional subtract-mux stages. This gives you the flexibility to trade off space and time as needed for a particular application.

Question 3—An engineer wanted to build an 8-MHz filter that had a very narrow bandwidth, so he used a crystal lattice filter like this:


However, when he built and tested his filter, he discovered that while it worked fine around 8 MHz, the attenuation at very high frequencies (e.g., >80 MHz) was very much reduced. What caused this?

Answer 3—The equivalent circuit for a quartz crystal is something like this:EQ-fig2-CC287-June14

The components across the bottom represent the mechanical resonance of the crystal itself, while the capacitor at the top represents the capacitance of the electrodes and holder. Typical values are:

  • Cser: 10s of fF (yes, femtofarads, 10-15F)
  • L: 10s of mH
  • R: 10s of ohms
  • Cpar: 10s of pF

The crystal has a series-resonant frequency based on just Cser and L. It has a relatively low impedance (basically just R) at this frequency.

It also has a parallel-resonant (sometimes called “antiresonant”) frequency when you consider the entire loop, including Cpar. Since Cser and Cpar are essentially in series, together they have a slightly lower capacitance than Cser alone, so the parallel-resonant frequency is slightly higher. The crystal’s impedance is very high at this frequency.

But at frequencies much higher than either of the resonant frequencies, you can see that the impedance of Cparalone dominates, and this just keeps decreasing with increasing frequency. This reduces the crystal lattice filter to a simple capacitive divider, which passes high freqeuncies with little attenuation.

Question 4—Suppose you know that a nominal 10.000 MHz crystal has a series-resonant frequency of 9.996490 MHz and a parallel-resonant frequency of 10.017730 MHz. You also know that its equivalent series capacitance is 27.1 fF. How can you calculate the value of its parallel capacitance?

Answer 4—First, calculate the crystal’s equivalent inductance, based on the series-resonant frequency:EQ-equation1-CC287-June14

Next, calculate the capacitance required to resonate with that inductance at the parallel-resonant frequency:EQ-equation2-CC287-June14

Finally, calculate the value of Cpar required to give that value of capacitance when in series with Cser:EQ-equation3-CC287-June14

Note that all three equations can be combined into one, and this reduces to:EQ-equation4-CC287-June14

Issue 284: EQ Answers

Can you name all of the signals in the original 25-pin RS-232 connector?

Pins 9, 10, 11, 18, and 25 are unassigned/reserved. The rest are:

Pin Abbreviation Source Description
1 PG - Protective ground
2 TD DTE Transmitted data
3 RD DCE Received data
4 RTS DTE Request to send
5 CTS DCE Clear to send
6 DSR DCE Data Set Ready
7 SG - Signal ground
8 CD DCE Carrier detect
12 SCD DCE Secondary carrier detect
13 SCTS DCE Secondary clear to send
14 STD DTE Secondary transmitted data
15 TC DCE Transmitter clock
16 SRD DCE Secondary received data
17 RC DCE Receiver clock
19 SRTS DTE Secondary request to send
20 DTR DTE Data terminal ready
21 SQ DCE Signal quality
22 RI DCE Ring indicator
23 - DTE Data rate selector
24 ETC DTE External transmitter clock


What is the key difference between a Moore state machine and a Mealy state machine?

The key difference between Moore and Mealy is that in a Moore state machine, the outputs depend only on the current state, while in a Mealy state machine, the outputs can also be affected directly by the inputs.


What are some practical reasons you might choose one state machine over the other?

In practice, the difference between Moore and Mealy in most situations is not very important. However, when you’re trying to optimize the design in certain ways, it sometimes is.

Generally speaking, a Mealy machine can have fewer state variables than the corresponding Moore machine, which will save physical resources on a chip. This can be important in low-power designs.

On the other hand, a Moore machine will typically have shorter logic paths between flip-flops (total combinatorial gate delays), which will enable it to run at a higher clock speed than the corresponding Mealy machine.


What is the key feature that distinguishes a DSP from any other general-purpose CPU?

Usually, the key distinguishing feature of a DSP when compared with a general-purpose CPU is that the DSP can execute certain signal-processing operations with few, if any, CPU cycles wasted on instructions that do not compute results.

One of the most basic operations in many key DSP algorithms is the MAC (multiply-accumulate) operation, which is the fundamental step used in matrix dot and cross products, FIR and IIR filters, and fast Fourier transforms (FFTs). A DSP will typically have a register and/or memory organization and a data path that enables it to do at least 64 MAC operations (and often many more) on unique data pairs in a row without any clocks wasted on loop overhead or data movement. General-purpose CPUs do not generally have enough registers to accomplish this without using additional instructions to move data between registers and memory.

Issue 282: EQ Answers

Construct an electrical circuit to find the values of Xa, Xb, and Xc in this system of equations:

21Xa – 10Xb – 10Xc = 1
–10Xa + 22Xb – 10Xc = –2
–10Xa – 10Xb + 20Xc = 10

Your circuit should include only the following elements:

one 1-Ω resistor
one 2-Ω resistor
three 10-Ω resistors
three ideal constant voltage sources
three ideal ammeters

The circuit should be designed so that each ammeter displays one of the values Xa, Xb, or Xc. Given that the Xa, Xb, and Xc values represent currents, what kind of circuit analysis yields equations in this form?

You get equations in this form when you do mesh analysis of a circuit. Each equation represents the sum of the voltages around one loop in the mesh.

What do the coefficients on the left side of the equations represent? What about the constants on the right side?

The coefficients on the left side of each equation represent resistances. Resistance multiplied by current (the unknown Xa, Xb, and Xc values) yields voltage.
The “bare” numbers on the right side of each equation represent voltages directly (i.e., independent voltage sources).

What is the numerical solution for the equations?

To solve the equations directly, start by solving the third equation for Xc and substituting it into the other two equations:

Xc = 1/2 Xa + 1/2 Xb + 1/2

21Xa – 10Xb – 5Xa – 5Xb – 5 = 1
–10Xa + 22Xb – 5Xa – 5Xb – 5 = –2

16Xa – 15Xb = 6
–15Xa + 17Xb = 3

Solve for Xa by multiplying the first equation by 17 and the second equation by 15 and then adding them:

272Xa – 255Xb = 102
–225Xa + 255Xb = 45

47Xa = 147 → Xa = 147/47

Solve for Xb by multiplying the first equation by 15 and the second equation by 16 and then adding them:

240Xa – 225Xb = 90
–240Xa + 272Xb = 48

47Xb = 138 → Xb = 138/47

Finally, substitute those two results into the equation for Xc:

Xc = 147/94 + 138/94 + 47/94 = 332/94 = 166/47

Finally, what is the actual circuit? Draw a diagram of the circuit and indicate the required value of each voltage source.

The circuit is a mesh comprising three loops, each with a voltage source. The common elements of the three loops are the three 10-Ω resistors, connected in a Y configuration (see the figure below).

cc281_eq_fig1The values of the voltage sources in each loop are given directly by the equations, as shown. To verify the numeric solution calculated previously, you can calculate all of the node voltages around the outer loop, plus the voltage at the center of the Y, and ensure they’re self-consistent.

We’ll start by naming Va as ground, or 0 V:

Vb = Va + 2 V = 2 V

Vc = Vb + 2 Ω × Xb = 2V + 2 Ω × 138/47 A = 370/47 V = 7.87234 V

Vd = Vc + 1 Ω × Xa = 370/47 V + 1 Ω × 147/47A = 517/47 V = 11.000 V

Ve = Vd – 1 V = 11.000 V – 1.000 V = 10.000 V

Va = Ve – 10 V = 0 V

which is where we started.

The center node, Vf, should be at the average of the three voltages Va, Vc, and Ve:

0 V + 370/47 V + 10 V/3 = 840/141 V = 5.95745 V

We should also be able to get this value by calculating the voltage drops across each of the three 10-Ω resistors:

Va + (Xc – Xb) × 10 Ω = 0 V + (166 – 138)/47A × 10 Ω = 280/47 V = 5.95745 V

Vc + (Xb – Xa) × 10 Ω = 370/47V + (138-147)/47A × 10 Ω = 280/47 V = 5.95745 V

Ve + (Xa – Xc) × 10 Ω = 10 V + (147-166)/47 A × 10 Ω = 280/47 V = 5.95745 V