Issue 294: EQ Answers

Problem 1—Let’s get back to basics and talk about the operation of a capacitor. Suppose you have two large, flat plates that are close to each other (with respect to their diameter). If you charge them up to a given voltage, and then physically move the plates away from each other, what happens to the voltage? What happens to the strength of the electric field between them?

Answer 1—The capacitance of the plates drops with increasing distance, so the voltage between them rises, because the charge doesn’t change and the voltage is equal to the charge divided by the capacitance. At first, while the plate spacing is still small relative to their diameter, The capacitance is proportional to the inverse of the spacing, so the voltage rises linearly with the spacing. However, as the spacing becomes larger, the capacitance drops more slowly and the voltage rises at a lower rate as well.

While the plate spacing is small, the electric field is almost entirely directly between the two plates, with only minor “fringing” effects at the edges. Since the voltage rise is proportional to the distance in this regime, the electric field (e.g., in volts per meter) remains essentially constant. However, once the plate spacing becomes comparable to the diameter of the plates, and fringing effects begin to dominate, the field begins to spread out and weaken. Ultimately, at very large distances, at which the plates themselves can be considered points, the voltage is essentially constant, and the field strength directly between them becomes proportional to the inverse of the distance.


Problem 2—If you double the spacing between the plates of a charged capapcitor, the capacitance is cut in half, and the voltage is doubled. However, the energy stored in the capacitor is defined to be E = 0.5 C V2. This means that at the wider spacing, the capacitor has twice the energy that it had to start with. Where did the extra energy come from?

Answer 2—There is an attractive force between the plates of a capacitor created by the electric field. Physically moving the plates apart requires doing work against this force, and this work becomes the additional potential energy that is stored in the capacitor.


Question 3—What happens when a dielectric is placed in an electric field? Why does the capacitance of pair of plates increase when the space betwenn them is filled with a dielectric?

Answer 3—Dielectric materials are made of atoms, and the atoms contain both positive and negative charges. Although neither the positive nor the negative charges are free to move about in the material (which is what makes it an insulator), they can be shifted to varying degress with respect to each other. An electric field causes this shift, and the shift in turn creates an opposing field that partially cancels the original field. Part of the field’s energy is absorbed by the dielectric.

In a capacitor, the energy absorbed by the dielectric reduces the field between the plates, and therefore reduces the voltage that is created by a given amount of charge. Since capacitance is defined to be the charge divided by the voltage, this means that the capacitance is higher with the dielectric than without it.


Problem 4—What is the piezoelectric effect?

Answer 4—With certain dielectrics, most notably quartz and certain ceramics, the displacement of charge also causes a significant mechanical strain (physical movement) of the crystal lattice. This effect works two ways — a physical strain also causes a shift in electric charges, creating an electric field. This effect can be exploited in a number of ways, including transducers for vibration and sound (microphones and speakers), as well as devices that have a strong mechanical resonance (e.g., crystals) that can be used to create oscillators and filters.

Contributed by David Tweed

Issue 292: EQ Answers

Problem 1—Let’s talk about noise! There are different types of noise that might be present in a system, and it’s important to understand how to deal with them.

For example, analog sensors and other types of active devices will often have AWGN, or Additive White Gaussian Noise, at their outputs. Any sort of analog-to-digital converter will add quantization noise to the data. What is the key difference between these two types of noise?

Answer 1—The key difference between AWGN and quantization noise is the PDF, or Probability Density Function, which is a description of how the values (voltage or current levels in analog systems, or data values in digital systems) are distributed.

The values from AWGN have a bell-shaped distribution, known variously as a Gaussian or Normal distribution. The formula for this distribution is:292-EQ-equation

µ represents the mean value, which we take to be zero in discussions about noise. σ is known as the “standard deviation” of the distribution, and is a way to characterize the “width” of the distribution.

It looks like this:

292-EQ-graph

Source: Wikipedia (en.wikipedia.org/wiki/File:Standard_deviation_diagram.svg)

While the curve is nonzero everywhere (from –∞ to +∞) it is important to note that the values will be within ±1 σ of the mean 68% of the time, within ±2 σ of the mean 95% of the time, and within ±3 σ of the mean 99.7% of the time. In other words, although the peak-to-peak value of this kind of noise is theoretically infinite, you can treat it as being less than 4σ 95% of the time.

On the other hand, the values from quantization noise have a uniform distribution — the values are equally probable, but only over a fixed span that’s equal to the quantization step size of the converter. The peak-to-peak range of this noise is equal to the converter’s step size (resolution).

However, it’s important to note that both sources of noise are “white”, which is a shorthand way of saying that their effects are uniformly distributed across the frequency spectrum.


Problem 2—Signal-to-noise ratios are most usefully described as power ratios. How does one characterize the power levels for both AWGN and quantization noise?

Answer 2—The power of a noise signal is proportional to the square of its RMS value.

The RMS value of AWGN is numerically equal to its standard deviation.

The RMS value of quantization noise is simply the peak-to-peak value (the step size of the converter) divided by √12, or VRMS = 0.2887 VPP. This is easily derived if you characterize the quantization noise signal as a small sawtooth wave that gets added to the analog signal.


Question 3—When you have multiple sources of noise in a system, how can you characterize their combined effect on the overall system performance?

Answer 3—When combining noise sources, you can’t simply add their RMS voltage or current values together. From one sample to the next, one noise source might partially cancel the effects of the other noise source(s).

Instead, you add the individual noise power levels to come up with an overall noise power level. Since power is proportional to voltage (or current) squared, this means that you need to square the individual RMS measurements, add them together, and then take the square root of the result in order to get an equivalent overall RMS value.

VRMS(total) = √(VRMS(n1)2 + VRMS(n2)2 + …)


Problem 4—Broadband analog sensors and other active devices often specify their noise levels in units of “microvolts per root-Hertz” (µV/√Hz) or “nanoamps per root-Hertz” (nA/√Hz). Where does this strange unit come from, and how do you use it?

Answer 4—As described in the previous answer, uncorrelated noise sources are added based on their power. With AWGN, the noise in one “segment” of the frequency spectrum is not correlated with another segment of the spectrum, so if you have a particular voltage level of noise in, say, a 1-Hz band of frequencies, you’ll have √2 times as much noise in a 2-Hz band of frequencies. In general, the RMS noise level for any particular bandwidth is going to be proportional to the square root of that bandwidth, which is why the devices are characterized that way.

So, if you have an opamp that’s characterized as having a noise level of 2 µV/√Hz, and you want to use this in an audio application with a bandwidth of 20 kHz, the overall noise at the output of the opamp will be 2 µV × √20000, or about 283 µVRMS. If your signal is a sinewave with a peak-to-peak value of 1V (353 mVRMS), you’ll have a signal-to-noise ratio of about 124 dB.

Contributed by David Tweed

Issue 290: EQ Answers

Problem 1—What is an R-C snubber, and what is a typical application for one?

Answer 1—An R-C snubber is the series combination of a resistor and a capacitor that is placed in parallel with a switching element that controls the power to an inductive load in order to safely absorb the energy of switching transients.

The problem is that a load that has an inductive component will produce a brief very high-voltage “spike” when the current through it is interrupted quickly. This spike can cause semiconductor devices to break down or even mechanical contacts to arc over, reducing their lifetime. The snubber absorbs the energy of the spike and dissipates it as heat, without ever allowing the voltage to rise too high.


Problem 2—How do you pick the resistor value in an R-C snubber?

Answer 2—To pick the resistor value, you first need to know what the maximum voltage you want to allow is. For example, if you have a MOSFET that has a drain-to-source breakdown rating of 400 V, you might choose to limit the snubber voltage to 200 V. Call this VMAX. Next, you need to know the maximum current that will be flowing through the load (and the switching element). Call this IMAX. At the instant the switching element opens, this current will be flowing through the resistor, and this will determine the initial voltage that appears across the switching element. Therefore pick the resistance: R = VMAX/IMAX.


Question 3—How do you pick the capacitor value in an R-C snubber?

Answer 3—Picking the capacitor can be more tricky. The key concept is that you need to pick a capacitor that can absorb the energy stored in the inductance of the load while keeping its terminal voltage under VMAX. Since loads don’t often specify their values of inductance, this may require some experimentation. Let’s call the load inductance LLOAD. The energy that it stores at the maximum current is: E = 0.5 IMAX2 LLOAD.The energy that a capacitor stores is: E = 0.5 V2C.

So, if we say that we want the capacitor to store the same energy that’s in the inductance when its terminal voltage is at VMAX, we can combine the twe equations and then solve for C:

0.5 VMAX2C = 0.5 IMAX2LLOAD

C = (IMAX2/VMAX2)LLOAD

This value will actually be somewhat conservative, because some of the initial energy of the inductance will be dissipated in the resistor during the initial transient, before it even gets to the capacitor. After that, the inductance and the capacitor will behave as a series-resonant circuit, with the current oscillating back and forth until all of the energy is gone.


Problem 4—What additional concern is there with regard to an R-C snubber when switching AC power?

Answer 4—When switching DC, the snubber absorbs the energy stored in the load’s inductance, and after a while, no current flows and the capacitor is charged to the supply voltage. However, when switching AC, the snubber has a finite impedance at the AC frequency, which means that it “leaks” a certain amount of current even when the main switching element is open. While this may or may not cause a problem for the load (usually not), there is also the issue of the continuous power being dissipated in the snubber resistor. The resistor must be rated to withstand this leakage power in addition to the energy of the switching events.

 

Issue 288: EQ Answers

Problem 1—When designing a pair of band-splitting filters (for, say, an audio crossover), why is it important to match frequencies of the –3-dB points of the low-pass and high-pass responses?

Answer 1—The cutoff frequencies of the two filters should be the same so that the overall frequency response when the filter outputs are recombined is flat and has no phase shift. For example, if you feed the cutoff frequency into both filters and then combine the results again, the output will be the same level as the input (0-dB overall gain). As long as the “order” of the two filters is the same (they have the same roll-off slope), the gain will be flat across the entire transition band of frequencies.

What’s really going on is this: A filter’s –3-dB point is where the output has half the power of the input signal, which means that the output voltage is 1/sqrt(2) times the input voltage. The –3-dB point is also where the output signal is phase shifted by 45°. It lags by 45° in the low-pass filter and leads by 45° in the high-pass filter. This means that the outputs of the two filters have a total phase shift of 90° relative to each other.

When you add two sinewaves that have the same amplitude and a 90° phase shift, you don’t get double the voltage. You get sqrt{2} times the voltage. You also get a waveform that has a phase midway between the two signals being added.

So, the final amplitude is sqrt{2}/sqrt{2} times the original input voltage, and the final phase is midway between 45° and –45°, or 0°. In other words, you get the original sinewave back exactly.


Problem 2—A certain portable stereo unit runs for about 12 h on a set of LR20 (D-size alkaline) batteries. If you want to extend the stereo’s run-time, is it better to simply use multiple sets of batteries sequentially, or to connect them all in series-parallel to create one big battery pack?

Answer 2—In general, batteries provide greater capacity at lower average currents. This is partly due to the battery’s internal chemistry, but largely due to the simple fact that less power is wasted in the internal resistance of the battery.

Here are two graphs taken from two different datasheets that illustrate this.eq0659_fig1eq0659_fig2

If the stereo is running for 12 h on a set of batteries, based on eyeballing these graphs, it’s probably getting about 8 A-h of capacity out of one set, so it’s drawing about 660 mA on average. Putting three sets of batteries in parallel would drop the current in each set to about 220 mA, and it will get something closer to 12 A-h from each set.

In other words, if you use, say, three sets of batteries sequentially, you’ll get 36 h of playing time (24 A-h total), but if you use them in parallel together, you’ll get something closer to 54 h of playing time (36 A-h total).


Problem 3—If you wanted to make a capacitor from scratch, what common household materials might you use?

Answer 3—A capacitor consists of two flat conductors separated by a dielectric. Aluminum foil is an obvious candidate for the conductors, and either waxed paper or plastic food wrap would be suitable dielectrics — they have similar characteristics.


Problem 4—How big would a 10-µF capacitor using these materials be?

Answer 4—You need to do some basic calculations first. The formula for capacitance is:Eq288eq1

  • εR is the relative permittivity of the dielectric
  • ε0 is the permittivity of free space
  • A is the area of one plate
  • d is the separation between the plates

Let’s say you want to use 1-mil (25.4 µm) waxed paper as a dielectric. Note that this will determine the voltage rating of the capacitor. The dielectric strength of waxed paper is about 35-40 MV/m, so this will give you a capacitor that can theoretically handle almost a kilovolt, but be conservative in how you use it!

The relative permittivity of waxed paper is about 3.7, the permittivity of free space is 8.854e-12 F/m. Solve for the area required:Eq288eq2

If you get aluminum foil and waxed paper that’s about 12″ (30 cm) wide, you can probably get an overlap of, say, 25 cm, which means that you’ll need a length of about 15.5 m to get the area you need.

If you then roll up your capacitor (using a second layer of waxed paper), the capacitance will be doubled, or about 10 µF. Obviously, this will be physically rather large, more than a foot long and several inches in diameter.

Plastic food wrap has a similar dielectric constant and dielectric strength as waxed paper, but typically comes in a 0.5-mil (12.7 µm) thickness. A capacitor using this would have about half the voltage rating and about half the overall volume.

Issue 286: EQ Answers

Question 1—A divider is a logic module that takes two binary numbers and produces their numerical quotient (and optionally, the remainder). The basic structure is a series of subtractions and multiplexers, where the multiplexer uses the result of the subtraciton to select the value that gets passed to the next step. The quotient is formed from the bits used to control the multiplexers, and the remainder is the result of the last subtraction.

If it is implemented purely combinatorially, then the critical path through all of this logic is quite long (even with carry-lookahead in the subtractors) and the clock cycle must be very slow. What could be done to shorten the clock period without losing the ability to get a result on every clock?

Answer 1—Pretty much any large chunk of combinatorial logic can be pipelined in order to reduce the clock period. This allows it to produce more results in a given amount of time, at the expense of increasing the latency for any particular result.

Divider logic is very easy to pipeline, and the number of pipeline stages you can use is fairly arbitrary. You could insert a pipeline register after each subtract-mux pair, or you might choose to do two or more subtract-mux stages per pipeline register You could even go so far as to pipeline the subtracts and the muxes separately (or even pipeline *within* each subtract) in order to get the fastest possible clock speed, but this would be rather extreme.

The more pipeline registers you use, the shorter the critical path (and the clock period) can be, but you use more resources (the registers). Also, the overall latency goes up, since you need to account for the setup and propagation times of the pipeline registers in the clock period (in addition to the subtract-mux logic delays). This gets multiplied by the number of pipeline stages in order to compute the total latency.

Question 2—On the other hand, what could be done to reduce the amount of logic required for the divider, giving up the ability to have a result on every clock?

 

Answer 2—If you don’t need the level of performance provided by a pipelined divider, you can computes the quotient serially, one bit at a time. You would just need one subtractor and one multiplexer, along with registers to hold the input values, quotient bits and the intermediate result.

You could potentially compute more than one bit per clock period using additional subtract-mux stages. This gives you the flexibility to trade off space and time as needed for a particular application.

Question 3—An engineer wanted to build an 8-MHz filter that had a very narrow bandwidth, so he used a crystal lattice filter like this:

EQ-fig1-CC287-June14

However, when he built and tested his filter, he discovered that while it worked fine around 8 MHz, the attenuation at very high frequencies (e.g., >80 MHz) was very much reduced. What caused this?

Answer 3—The equivalent circuit for a quartz crystal is something like this:EQ-fig2-CC287-June14

The components across the bottom represent the mechanical resonance of the crystal itself, while the capacitor at the top represents the capacitance of the electrodes and holder. Typical values are:

  • Cser: 10s of fF (yes, femtofarads, 10-15F)
  • L: 10s of mH
  • R: 10s of ohms
  • Cpar: 10s of pF

The crystal has a series-resonant frequency based on just Cser and L. It has a relatively low impedance (basically just R) at this frequency.

It also has a parallel-resonant (sometimes called “antiresonant”) frequency when you consider the entire loop, including Cpar. Since Cser and Cpar are essentially in series, together they have a slightly lower capacitance than Cser alone, so the parallel-resonant frequency is slightly higher. The crystal’s impedance is very high at this frequency.

But at frequencies much higher than either of the resonant frequencies, you can see that the impedance of Cparalone dominates, and this just keeps decreasing with increasing frequency. This reduces the crystal lattice filter to a simple capacitive divider, which passes high freqeuncies with little attenuation.

Question 4—Suppose you know that a nominal 10.000 MHz crystal has a series-resonant frequency of 9.996490 MHz and a parallel-resonant frequency of 10.017730 MHz. You also know that its equivalent series capacitance is 27.1 fF. How can you calculate the value of its parallel capacitance?

Answer 4—First, calculate the crystal’s equivalent inductance, based on the series-resonant frequency:EQ-equation1-CC287-June14

Next, calculate the capacitance required to resonate with that inductance at the parallel-resonant frequency:EQ-equation2-CC287-June14

Finally, calculate the value of Cpar required to give that value of capacitance when in series with Cser:EQ-equation3-CC287-June14

Note that all three equations can be combined into one, and this reduces to:EQ-equation4-CC287-June14