Fast Quad IF DAC

ADI AD9144 16-bit 2.8 GSPS DAC - Fastest Quad IF DAC - High DynaThe AD9144 is a four-channel, 16-bit, 2.8-GSPS DAC that supports high data rates and ultra-wide signal bandwidth to enable wideband and multiband wireless applications. The DAC features 82-dBc spurious-free dynamic range (SFDR) and a 2.8-GSPS maximum sample rate, which permits multicarrier generation up to the Nyquist frequency.

With –164-dBm/Hz noise spectral density, the AD9144 enables higher dynamic range transmitters to be built. Its low SFDR and distortion design techniques provide high-quality synthesis of wideband signals from baseband to high intermediate frequencies. The DAC features a JESD204B eight-lane interface and low inherent latency of fewer than two DAC clock cycles. This simplifies hardware and software system design while permitting multichip synchronization.

The combination of programmable interpolation rate, high sample rates, and low power at 1.5 W provides flexibility when choosing DAC output frequencies. This is especially helpful in meeting four- to six-carrier Global System for Mobile Communications (GSM) transmission specifications and other communications standards. For six-carrier GSM intermodulation distortion (IMD), the AD9144 operates at 77 dBc at 75-MHz IF. Operating with the on-chip phase-locked loop (PLL) at a 30-MHz DAC output frequency, the AD9144 delivers a 76-dB adjacent-channel leakage ratio (ACLR) for four-carrier Wideband Code Division Multiple Access (WCDMA) applications.

The AD9144 includes integrated interpolation filters with selectable interpolation factors. The dual DAC data interface supports word and byte load, enabling users to reduce input pins on lower data rates to save board space, power, and cost.

The DAC is supported by an evaluation board with an FPGA Mezzanine Card (FMC) connector, software, tools, a SPI controller, and reference designs. Analog Devices’s VisualAnalog software package combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface that enables users to customize their input signal and data analysis.

The AD9144BCPZ DAC costs $80. The AD9144-EBZ and AD9144-FMC-EBZ FMC evaluation boards cost $495.

Analog Devices, Inc.
www.analog.com

Measuring Jitter (EE Tip #132)

Jitter is one of the parameters you should consider when designing a project, especially when it involves planning a high-speed digital system. Moreover, jitter investigation—performed either manually or with the help of proper measurement tools—can provide you with a thorough analysis of your product.

There are at least two ways to measure jitter: cycle-to-cycle and time interval error (TIE).

WHAT IS JITTER?
The following is the generic definition offered by The International Telecommunication Union (ITU) in its G.810 recommendation. “Jitter (timing): The short-term variations of the significant instants of a timing signal from their ideal positions in time (where short-term implies that these variations are of frequency greater than or equal to 10 Hz).”

First, jitter refers to timing signals (e.g., a clock or a digital control signal that must be time-correlated to a given clock). Then you only consider “significant instants” of these signals (i.e., signal-useful transitions from one logical state to the other). These events are supposed to happen at a specific time. Jitter is the difference between this expected time and the actual time when the event occurs (see Figure 1).

Figure 1—Jitter includes all phenomena that result in an unwanted shift in timing of some digital signal transitions in comparison to a supposedly “perfect” signal.

Figure 1—Jitter includes all phenomena that result in an unwanted shift in timing of some digital signal transitions in comparison to a supposedly “perfect” signal.

Last, jitter concerns only short-term variations, meaning fast variations as compared to the signal frequency (in contrast, very slow variations, lower than 10 Hz, are called “wander”).

Clock jitter, for example, is a big concern for A/D conversions. Read my article on fast ADCs (“Playing with High-Speed ADCs,” Circuit Cellar 259, 2012) and you will discover that jitter could quickly jeopardize your expensive, high-end ADC’s signal-to-noise ratio.

CYCLE-TO-CYCLE JITTER
Assume you have a digital signal with transitions that should stay within preset time limits (which are usually calculated based on the receiver’s signal period and timing diagrams, such as setup duration and so forth). You are wondering if it is suffering from any excessive jitter. How do you measure the jitter? First, think about what you actually want to measure: Do you have a single signal (e.g., a clock) that could have jitter in its timing transitions as compared to absolute time? Or, do you have a digital signal that must be time-correlated to an accessible clock that is supposed to be perfect? The measurement methods will be different. For simplicity, I will assume the first scenario: You have a clock signal with rising edges that are supposed to be perfectly stable, and you want to double check it.

My first suggestion is to connect this clock to your best oscilloscope’s input, trigger the oscilloscope on the clock’s rising edge, adjust the time base to get a full period on the screen, and measure the clock edge’s time dispersion of the transition just following the trigger. This method will provide a measurement of the so-called cycle-to-cycle jitter (see Figure 2).

Figure 2—Cycle-to-cycle is the easiest way to measure jitter. You can simply trigger your oscilloscope on a signal transition and measure the dispersion of the following transition’s time.

Figure 2—Cycle-to-cycle is the easiest way to measure jitter. You can simply trigger your oscilloscope on a signal transition and measure the dispersion of the following transition’s time.

If you have a dual time base or a digital oscilloscope with zoom features, you could enlarge the time zone around the clock edge you are interested in for more accurate measurements. I used an old Philips PM5786B pulse generator from my lab to perform the test. I configured the pulse generator to generate a 6.6-MHz square signal and connected it to my Teledyne LeCroy WaveRunner 610Zi oscilloscope. I admit this is high-end equipment (1-GHz bandwidth, 20-GSPS sampling rate and an impressive 32-M word memory when using only two of its four channels), but it enabled me to demonstrate some other interesting things about jitter. I could have used an analog oscilloscope to perform the same measurement, as long as the oscilloscope provided enough bandwidth and a dual time base (e.g., an old Tektronix 7904 oscilloscope or something similar). Nevertheless, the result is shown in Figure 3.

Figure 3—This is the result of a cycle-to-cycle jitter measurement of the PM5786A pulse generator. The bottom curve is a zoom of the rising front just following the trigger. The cycle-to-cycle jitter is the horizontal span of this transition over time, here measured at about 620 ps.

Figure 3—This is the result of a cycle-to-cycle jitter measurement of the PM5786A pulse generator. The bottom curve is a zoom of the rising front just following the trigger. The cycle-to-cycle jitter is the horizontal span of this transition over time, here measured at about 620 ps.

This signal generator’s cycle-to-cycle jitter is clearly visible. I measured it around 620 ps. That’s not much, but it can’t be ignored as compared to the signal’s period, which is 151 ns (i.e., 1/6.6 MHz). In fact, 620 ps is ±0.2% of the clock period. Caution: When you are performing this type of measurement, double check the oscilloscope’s intrinsic jitter as you are measuring the sum of the jitter of the clock and the jitter of the oscilloscope. Here, the latter is far smaller.

TIME INTERVAL ERROR
Cycle-to-cycle is not the only way to measure jitter. In fact, this method is not the one stated by the definition of jitter I presented earlier. Cycle-to-cycle jitter is a measurement of the timing variation from one signal cycle to the next one, not between the signal and its “ideal” version. The jitter measurement closest to that definition is called time interval error (TIE). As its name suggests, this is a measure of a signal’s transitions actual time, as compared to its expected time (see Figure 4).

Figure 4—Time interval error (TIE) is another way to measure jitter. Here, the actual transitions are compared to a reference clock, which is supposed to be “perfect,” providing the TIE. This reference can be either another physical signal or it can be generated using a PLL. The measured signal’s accumulated plot, triggered by the reference clock, also provides the so-called eye diagram.

Figure 4—Time interval error (TIE) is another way to measure jitter. Here, the actual transitions are compared to a reference clock, which is supposed to be “perfect,” providing the TIE. This reference can be either another physical signal or it can be generated using a PLL. The measured signal’s accumulated plot, triggered by the reference clock, also provides the so-called eye diagram.

It’s difficult to know these expected times. If you are lucky, you could have a reference clock elsewhere on your circuit, which would supposedly be “perfect.” In that case, you could use this reference as a trigger source, connect the signal to be measured on the oscilloscope’s input channel, and measure its variation from trigger event to trigger event. This would give you a TIE measurement.

But how do you proceed if you don’t have anything other than your signal to be measured? With my previous example, I wanted to measure the jitter of a lab signal generator’s output, which isn’t correlated to any accessible reference clock. In that case, you could still measure a TIE, but first you would have to generate a “perfect” clock. How can this be accomplished? Generating an “ideal” clock, synchronized with a signal, is a perfect job for a phase-locked loop (PLL). The technique is explained my article, “Are You Locked? A PLL Primer” (Circuit Cellar 209, 2007.) You could design a PLL to lock on your signal frequency and it could be as stable as you want (provided you are willing to pay the expense).

Moreover, this PLL’s bandwidth (which is the bandwidth of its feedback filter) would give you an easy way to zoom in on your jitter of interest. For example, if the PLL bandwidth is 100 Hz, the PLL loop will capture any phase variation slower than 100 Hz. Therefore, you can measure the jitter components faster than this limit. This PLL (often called a carrier recovery circuit) can be either an actual hardware circuit or a software-based implementation.

So, there are at least two ways to measure jitter: Cycle-to-cycle and TIE. (As you may have anticipated, many other measurements exist, but I will limit myself to these two for simplicity.) Are these measurement methods related? Yes, of course, but the relationship is not immediate. If the TIE is not null but remains constant, the cycle-to-cycle jitter is null.  Similarly, if the cycle-to-cycle jitter is constant but not null, the TIE will increase over time. In fact, the TIE is closely linked to the mathematical integral over time of the cycle-to-cycle jitter, but this is a little more complex, as the jitter’s frequency range must be limited.

Editor’s Note: This is an excerpt from an article written by Robert Lacoste, “Analyzing a Case of the Jitters: Tips for Preventing Digital Design Issues,” Circuit Cellar 273, 2013.

Evaluating Oscilloscopes (Part 4)

In this final installment of my four-part mini-series about selecting an oscilloscope, I’ll look at triggering, waveform generators, and clock synchronization, and I’ll wrap up with a series summary.

My previous posts have included Part 1, which discusses probes and physical characteristics of stand-alone vs. PC-based oscilloscopes; Part 2, which examines core specifications such as bandwidth, sample rate, and ADC resolution; and Part 3, which focuses on software. My posts are more a “collection of notes” based on my own research rather than a completely thorough guide. But I hope they are useful and cover some points you might not have otherwise considered before choosing an oscilloscope.

This is a screenshot from Colin O'Flynn's YouTube video "Using PicoScope AWG for Testing Serial Data Limits."

This is a screenshot from Colin O’Flynn’s YouTube video “Using PicoScope AWG for Testing Serial Data Limits.”

Topic 1: Triggering Methods
Triggering your oscilloscope properly can make a huge difference in being able to capture useful waveforms. The most basic triggering method is just a “rising” or “falling” edge, which almost everyone is (or should be) familiar with.

Whether you need a more advanced trigger method will depend greatly on your usage scenario and a bit on other details of your oscilloscope. If you have a very long buffer length or ability to rapid-fire record a number of waveforms, you might be able to live with a simple trigger since you can easily throw away data that isn’t what you are looking for. If your oscilloscope has a more limited buffer length, you’ll need to trigger on the exact moment of interest.

Before I detail some of the other methods, I want to mention that you can sometimes use external instruments for triggering. For example, you might have a logic analyzer with an extremely advanced triggering mechanism.  If that logic analyzer has a “trigger out,” you can trigger the oscilloscope from your logic analyzer.

On to the trigger methods! There are a number of them related to finding “odd” pulses: for example, finding glitches shorter or wider than some length or finding a pulse that is lower than the regular height (called a “runt pulse”). By knowing your scope triggers and having a bit of creativity, you can perform some more advanced troubleshooting. For example, when troubleshooting an embedded microcontroller, you can have it toggle an I/O pin when a task runs. Using a trigger to detect a “pulse dropout,” you can trigger your oscilloscope when the system crashes—thus trying to see if the problem is a power supply glitch, for example.

If you are dealing with digital systems, be on the lookout for triggers that can function on serial protocols. For example, the Rigol Technologies stand-alone units have this ability, although you’ll also need an add-on to decode the protocols! In fact, most of the serious stand-alone oscilloscopes seem to have this ability (e.g., those from Agilent, Tektronix, and Teledyne LeCroy); you may just need to pay extra to enable it.

Topic 2: External Trigger Input
Most oscilloscopes also have an “external trigger input.”  This external input doesn’t display on the screen but can be used for triggering. Specifically, this means your trigger channel doesn’t count against your “ADC channels.” So if you need the full sample rate on one channel but want to trigger on another, you can use the “ext in” as the trigger.
Oscilloscopes that include this feature on the front panel make it slightly easier to use; otherwise, you’re reaching around behind the instrument to find the trigger input.

Topic 3: Arbitrary Waveform Generator
This isn’t strictly an oscilloscope-related function, but since enough oscilloscopes include some sort of function generator it’s worth mentioning. This may be a standard “signal generator,” which can generate waveforms such as sine, square, triangle, etc. A more advanced feature, called an arbitrary waveform generator (AWG), enables you to generate any waveform you want.

I previously had a (now very old) TiePie engineering HS801 that included an AWG function. The control software made it easy to generate sine, square, triangle, and a few other waveforms. But the only method of generating an arbitrary waveform was to load a file you created in another application, which meant I almost never used the “arbitrary” portion of the AWG. The lesson here is that if you are going to invest in an AWG, make sure the software is reasonable to use.

The AWG may have a few different specifications; look for the maximum analog bandwidth along with the sample rate. Be careful of outlandish claims: a 200 MS/s digital to analog converter (DAC) could hypothetically have a 100-MHz analog bandwidth, but the signal would be almost useless. You could only generate some sort of sine wave at that frequency, which would probably be full of harmonics. Even if you generated a lower-frequency sine wave (e.g., 10 MHz), it would likely contain a fair amount of harmonics since the DAC’s output filter has a roll-off at such a high frequency.

Better systems will have a low-pass analog filter to reduce harmonics, with the DAC’s sample rate being several times higher than the output filter roll-off. The Pico Technology PicoScope 6403D oscilloscope I’m using can generate a 20-MHz signal but has a 200 MS/s sample rate on the DAC. Similarly, the TiePie engineering HS5-530 has a 30-MHz signal bandwidth, and similarly uses a 240 MS/s sample rate. A sample rate of around five to 10 times the analog bandwidth seems about standard.

Having the AWG integrated into the oscilloscope opens up a few useful features. When implementing a serial protocol decoder, you may want to know what happens if the baud rate is slightly off from the expected rate. You can quickly perform this test by recording a serial data packet on the oscilloscope, copying it to the AWG, and adjusting the AWG sample rate to slightly raise or lower the baud rate. I illustrate this in the following video.


Topic 4: Clock Synchronization

One final issue of interest: In certain applications, you may need to synchronize the sample rate to an external device. Oscilloscopes will often have two features for doing this. One will output a clock from the oscilloscope, the other will allow you to feed an external clock into the oscilloscope.

The obvious application is synchronizing a capture between multiple oscilloscopes. You can, however, use this for any application where you wish to use a synchronous capture methodology. For example, if you wish to use the oscilloscope as part of a software-defined radio (SDR), you may want to ensure the sampling happens synchronous to a recovered clock.

The input frequency of this clock is typically 10 MHz, although some devices enable you to select between several allowed frequencies. If the source of this clock is anything besides another instrument, you may have to do some clock conditioning to convert it into one of the valid clock source ranges.

Summary and Closing Comments
That’s it! Over the past four weeks I’ve tried to raise a number of issues to consider when selecting an oscilloscope. As previously mentioned, the examples were often PicoScope-heavy simply because it is the oscilloscope I own. But all the topics have been relevant to any other oscilloscope you may have.

You can check out my YouTube playlist dealing with oscilloscope selection and review.  Some topics might suggest further questions to ask.

I’ve probably overlooked a few issues, but I can’t cover every possible oscilloscope and option. When selecting a device, my final piece of advice is to download the user manual and study it carefully, especially for features you find most important. Although the datasheet may gloss over some details, the user manual will typically address the limitations you’ll run into, such as FFT length or the memory depths you can configure.

Author’s note: Every reasonable effort has been made to ensure example specifications are accurate. There may, however, be errors or omissions in this article. Please confirm all referenced specifications with the device vendor.

CC280: Analog Communications and Calibration

Are you an analog aficionado? You’re in luck. Two articles, in particular, focus on the November issue’s analog techniques theme. (Look for the issue shortly after mid-October, when it will be available on our website.)

Block Diagram

Data from the base adapter is sent by level shifting the RS-232 or CMOS serial data between 9 and 12 V. A voltage comparator at the remote adapter slices the signal to generate a 0-to-5-V logic signal. The voltage on the signal wire never goes low enough for the 5-V regulator to go out of regulation.

These adapters use a combination of tricks. A single pair of wires carries full-duplex serial data and a small amount of power to a remote device for tasks (e.g., continuous remote data collection and control). The digital signals can be simple on/off signals or more complex signals (e.g., RS-232).

These adapters use a combination of tricks. A single pair of wires carries full-duplex serial data and a small amount of power to a remote device for tasks (e.g., continuous remote data collection and control). The digital signals can be simple on/off signals or more complex signals (e.g., RS-232).

Dick Cappels, a consultant who tinkers with analog and mixed-signal projects, presents a design using a pair of cable adapters and simple analog circuits to enable full-duplex, bidirectional communications and power over more than 100 m of paired wires. Why bother when Power Over Ethernet  (PoE), Bluetooth, and Wi-Fi approaches are available?

“In some applications, using Ethernet is a disadvantage because of the higher costs and greater interface complexity,” Cappels says. “You can use a microcontroller that costs less than a dollar and a few analog parts described in this article to perform remote data gathering and control.”

The base unit including the 5-to-15-V power supply is simple for its functionality. The two eight-pin DIP ICs are a voltage comparator and the switching regulator.

The base unit including the 5-to-15-V power supply is simple for its functionality. The two eight-pin DIP ICs are a voltage comparator and the switching regulator.

Cappels’s need for data channels to monitor his inground water tank inspired his design. Because his local municipality did not always keep the tank filled, he needed to know when it was dry so his pumps wouldn’t run without water and possibly become damaged.
“Besides the mundane application of monitoring a water tank, the system would be excellent for other communication uses,” Cappels says, including computer connection to a home weather station and intrusion-detection systems. Bit rates up to 250 kHz also enable the system to be used in two-way voice communication such as intercoms, he says.

Retired engineer David Cass Tyler became interested in writing his series about calibration while working on a consulting project. “I came to realize that some people don’t really know how to approach the issue of taking an analog-to-digital value to actual engineering units, nor how to correct calibration factors after the fact,” Tyler says

In Part 1 of his article series, Tyler notes: “Digital inputs and digital outputs are pretty simple. They are either on or off. However, for ADCs and DACs to be accurate, they must first be calibrated. This article addresses linear ADCs and DACs.” Part 2, appearing in the December issue, will discuss using polynomial curve fitting to convert nonlinear data to real-world engineering values.

In addition to its analog-themed articles, the November issue includes topics ranging from a DIY solar array tracker’s software to power-capped computer systems.

Editor’s Note: Learn more about Circuit Cellar contributors Dick Cappels and David Cass Tyler by reading their posts about their workspaces and favorite DIY tools.

Client Profile: Netburner, Inc

NetBurner, Inc.
5405 Morehouse Drive
San Diego, CA 92121

www.netburner.com

Contact: sales@netburner.com

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  • Development Kits: Development kits can be used to customize any of NetBurner’s Serial-to-Ethernet or Core Modules. Kits include the Eclipse IDE, a C/C++ compiler/linker, a debugger, a RTOS, a TCP/IP stack, and board support packages.

Product Information: The MOD54415 and the NANO54415 modules provide 250-MHz processor, up to 32 MB flash, 64 MB DDR, ADC, DAC, eight UARTs, four I2C, three SPI, 1-wire, microSD flash socket, five PWM, and up to 44 digital I/O.

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