COM Express Type 6 Card Sports 8th Gen Core or Xeon Chips

ADLINK has introduced its latest COM Express Type 6 modules. According to the company, Express-CF modules are equipped with the 8th generation Intel Core processor family and Intel Xeon processor E-2100M family, and are the first Type 6 modules to support both Xeon and Core i7 Hexa-core (6-core) CPUs. These Hexa-core processors support up to 12 threads and a turbo boost of up to 4.4 GHz. Compared to earlier mobile quad-core Xeon and Core i7 CPUs, the additional two cores of the new Hexa-core CPUs results in more than 25% performance boost at no significant cost increase.ADLINK’s Express-CF provides standard support for up to 48GB non-ECC DDR4 in three SO-DIMMs (two on the top side, one on the bottom), while complying with PICMG COM.0 mechanical specifications. Modules equipped with the Xeon Hexa-core processor support both ECC and non-ECC SODIMMs.

With integrated Intel UHD Graphics 630, the Express-CF supports up to three independent 4K displays via DisplayPort, HDMI, DVI and LVDS. ADLINK also offers either eDP or analog VGA as build options by customer request. Additionally, the Express-CF supports Intel Optane memory and NVMe SSDs through high speed PCIe x4 Gen3 interfaces.

ADLINK Technology |

CC281: Overcome Fear of Ethernet on an FPGA

As its name suggests, the appeal of an FPGA is that it is fully programmable. Instead of writing software, you design hardware blocks to quickly do what’s required of a digital design. This also enables you to reprogram an FPGA product in the field to fix problems “on the fly.”

But what if “you” are an individual electronics DIYer rather than an industrial designer? DIYers can find FPGAs daunting.

Issue281The December issue of Circuit Cellar issue should offer reassurance, at least on the topic of “UDP Streaming on an FPGA.” That’s the focus of Steffen Mauch’s article for our Programmable Logic issue (p. 20).

Ethernet on an FPGA has several applications. For example, it can be used to stream measured signals to a computer for analysis or to connect a camera (via Camera Link) to an FPGA to transmit images to a computer.

Nonetheless, Mauch says, “most novices who start to develop FPGA solutions are afraid to use Ethernet or DDR-SDRAM on their boards because they fear the resulting complexity.” Also, DIYers don’t have the necessary IP core licenses, which are costly and often carry restrictions.

Mauch’s UDP monitor project avoids such costs and restrictions by using a free implementation of an Ethernet-streaming device based on a Xilinx Spartan-6 LX FPGA. His article explains how to use OpenCores’s open-source tri-mode MAC implementation and stream UDP packets with VHDL over Ethernet.

Mauch is not the only writer offering insights into FPGAs. For more advanced FPGA enthusiasts, columnist Colin O’Flynn discusses hardware co-simulation (HCS), which enables the software simulation of a design to be offloaded to an FPGA. This approach significantly shortens the time needed for adequate simulation of a new product and ensures that a design is actually working in hardware (p. 52).

This Circuit Cellar issue offers a number of interesting topics in addition to programmable logic. For example, you’ll find a comprehensive overview of the latest in memory technologies, advice on choosing a flash file system for your embedded Linux system, a comparison of amplifier classes, and much more.

Mary Wilson