DIY Dead Man’s Switch (No Microcontrollers)

A “dead man’s switch” (abbreviated here as DMS) is a very useful device for applications where the effect of forgetting to turn something off ranges from a mild annoyance to costly or dangerous consequences. We first learned about the DMS from a locomotive engineer, who explained vividly that an engineer is supposed to press a button every minute to keep the locomotive going, otherwise the machine stops. Less “dramatic” applications include turning off lights or other equipment after a period of time.

The ideal DMS provides several minutes of “on” time, requires no programming, external controls, additional power supplies and no modifications of the existing equipment. In effect, no changes should occur in the standard operating procedures of using the equipment. To reset the timer from “off” back to “on,” it is desirable to either use a button or just cycle the power.

Ironically, a multitude of electronic timers available online or at home improvement retail stores are highly over-engineered. These timers either require programming of specific date-times to be “ON” or have very long pre-sets, require changes in equipment wiring, etc.

DMS OPERATION

This article presents a DMS design that has been tested and currently in use in two different systems. One is controlling a UV source and another is controlling a hydrogen gas line valve. If someone forgets to turn off the UV source, the repairs are costly. When it comes to forgetting to turn off hydrogen, a violent explosion may happen!

The DMS works as follows. First, there are no microcontrollers—just plain physics. Capacitors C1 (bipolar, electrolytic) and C2 make a voltage divider (see Figure 1). Note this timer was originally designed for the European voltage; however, it is very simple to recalculate the capacitor divider for the US voltage.

Figure 1: This is the timer schematic. The Reset button S1 is optional.

Figure 1: This is the timer schematic. The Reset button S1 is optional.

The voltage is rectified by a bridge and smoothed by C3. The voltage on C3 is approximately 13 V. When the timer is powered on, both capacitors C4 and C5 are quickly charged each to a half of the supply voltage. FET is turned on and relay is engaged. At the same time, the charge begins a slowly redistribution between the capacitors, with C5 discharging via R3 and C4 further charging. Note that diode D1 is not conducting. When C5 is discharged enough, FET is turned off. This causes the relay to disengage. The timer will continue to be in this state as long as the power is provided, because C4 is effectively blocking any current flow. If the power is removed, D1 opens up to discharge C4 via R2. Remember: C5 is already discharged. Thus, the timer is reset to its initial condition. In addition, a manual reset switch S1 is added in case if it is more convenient to reset the timer by pushing a button rather than briefly disconnecting the mains power.

“ON” TIME

With the indicated components, the “on” time is for approximately 6 minutes. Changing C4 and C5 adjusts the “on” time. Our hydrogen valve control system uses capacitances of 30 µF each, resulting in approximately 25 minutes of “on” time. Note that the capacitances of C4 and C5 must be the same.

ABOUT THE AUTHORS

Dr. Alexander Pozhitkov has an MS in Chemistry and a PhD in Genetics from Albertus Magnus University in Cologne, Germany. For 12 years he has been involved with interdisciplinary research relating to molecular biology, physical chemistry, software, and electrical engineering. Currently, Dr. Pozhitkov is a researcher at the University of Washington, Seattle. His technical interests include hardware programming, vacuum tubes, and high-voltage electronics.

Hans-Joachim Hamann is a staffer at the Max Planck Institute for Evolutionary Biology.

 

Diode Bridge Solution (EE Tip #140)

Once I connected a battery up to a DSP in the wrong “direction,” thereby destroying the DSP. That incident drove home the necessity of “suspenders and belt” design.Diode

After the accident, my colleague and I added a diode to the circuit to make it impossible to repeat that mistake. Nowadays, when I teach elementary electronics courses, I generally mention the diode bridge as a way to make it possible to connect up a battery in either “direction” without endangering the electronics to which the battery is to be connected.

My mistake has served as a cautionary tale for many years now.—Shlomo Engelberg, CC25, 2013

One-Wire RS-232 Half Duplex (EE Tip #135)

Traditional RS-232 communication needs one transmit line (TXD or TX), one receive line (RXD or RX), and a Ground return line. The setup allows a full-duplex communication. However, many applications use only half-duplex transmissions, as protocols often rely on a transmit/acknowledge scheme. With a simple circuit like Figure 1, this is achieved using only two wires (including Ground). This circuit is designed to work with a “real” RS-232 interface (i.e., using positive voltage for logic 0s and negative voltage for logic 1s), but by reversing the diodes it also works on TTL-based serial interfaces often used in microcontroller designs (where 0 V = logic 0; 5 V = logic 1). The circuit needs no additional voltage supply, no external power, and no auxiliary voltages from other RS-232 pins (RTS/CTS or DTR/DSR).Grun1-Wire-RS232-HalfDup

Although not obvious at a first glance, the diodes and resistors form a logic AND gate equivalent to the one in Figure 2 with the output connected to both receiver inputs. The default (idle) output is logic 1 (negative voltage) so the gate’s output follows the level of the active transmitter. The idle transmitter also provides the negative auxiliary voltage –U in Figure 2. Because both receivers are connected to one line, this circuit generates a local echo of the transmitted characters into the sender’s receiver section. If this is not acceptable, a more complex circuit like the one shown in Figure 3 is needed (only one side shown). This circuit needs no additional voltage supply either. In this circuit the transmitter pulls its associated receiver to logic 1 (i.e., negative voltage) by a transistor (any standard NPN type) when actively sending a logic 0 (i.e., positive voltage) but keeps the receiver “open” for the other transmitter when idle (logic 1). Here a negative auxiliary voltage is necessary which is generated by D2 and C1. Due to the start bit of serial transmissions, the transmission line is at logic 1 for at least one bit period per character. The output impedance of most common RS-232 drivers is sufficient to keep the voltage at C1 at the necessary level.

Note: Some RS-232 converters have quite low input impedance; the values shown for the resistors should work in the majority of cases, but adjustments may be necessary. In case of extremely low input impedance, the receiving input of the sender may show large voltage variations between 1s and 0s. As long as the voltage is below –3 V at any time these variations may be ignore.— Andreas Grün, “One Wire RS-232 Half Duplex,” Elektor July/August 2009.

Issue 286: EQ Answers

Question 1—A divider is a logic module that takes two binary numbers and produces their numerical quotient (and optionally, the remainder). The basic structure is a series of subtractions and multiplexers, where the multiplexer uses the result of the subtraciton to select the value that gets passed to the next step. The quotient is formed from the bits used to control the multiplexers, and the remainder is the result of the last subtraction.

If it is implemented purely combinatorially, then the critical path through all of this logic is quite long (even with carry-lookahead in the subtractors) and the clock cycle must be very slow. What could be done to shorten the clock period without losing the ability to get a result on every clock?

Answer 1—Pretty much any large chunk of combinatorial logic can be pipelined in order to reduce the clock period. This allows it to produce more results in a given amount of time, at the expense of increasing the latency for any particular result.

Divider logic is very easy to pipeline, and the number of pipeline stages you can use is fairly arbitrary. You could insert a pipeline register after each subtract-mux pair, or you might choose to do two or more subtract-mux stages per pipeline register You could even go so far as to pipeline the subtracts and the muxes separately (or even pipeline *within* each subtract) in order to get the fastest possible clock speed, but this would be rather extreme.

The more pipeline registers you use, the shorter the critical path (and the clock period) can be, but you use more resources (the registers). Also, the overall latency goes up, since you need to account for the setup and propagation times of the pipeline registers in the clock period (in addition to the subtract-mux logic delays). This gets multiplied by the number of pipeline stages in order to compute the total latency.

Question 2—On the other hand, what could be done to reduce the amount of logic required for the divider, giving up the ability to have a result on every clock?

 

Answer 2—If you don’t need the level of performance provided by a pipelined divider, you can computes the quotient serially, one bit at a time. You would just need one subtractor and one multiplexer, along with registers to hold the input values, quotient bits and the intermediate result.

You could potentially compute more than one bit per clock period using additional subtract-mux stages. This gives you the flexibility to trade off space and time as needed for a particular application.

Question 3—An engineer wanted to build an 8-MHz filter that had a very narrow bandwidth, so he used a crystal lattice filter like this:

EQ-fig1-CC287-June14

However, when he built and tested his filter, he discovered that while it worked fine around 8 MHz, the attenuation at very high frequencies (e.g., >80 MHz) was very much reduced. What caused this?

Answer 3—The equivalent circuit for a quartz crystal is something like this:EQ-fig2-CC287-June14

The components across the bottom represent the mechanical resonance of the crystal itself, while the capacitor at the top represents the capacitance of the electrodes and holder. Typical values are:

  • Cser: 10s of fF (yes, femtofarads, 10-15F)
  • L: 10s of mH
  • R: 10s of ohms
  • Cpar: 10s of pF

The crystal has a series-resonant frequency based on just Cser and L. It has a relatively low impedance (basically just R) at this frequency.

It also has a parallel-resonant (sometimes called “antiresonant”) frequency when you consider the entire loop, including Cpar. Since Cser and Cpar are essentially in series, together they have a slightly lower capacitance than Cser alone, so the parallel-resonant frequency is slightly higher. The crystal’s impedance is very high at this frequency.

But at frequencies much higher than either of the resonant frequencies, you can see that the impedance of Cparalone dominates, and this just keeps decreasing with increasing frequency. This reduces the crystal lattice filter to a simple capacitive divider, which passes high freqeuncies with little attenuation.

Question 4—Suppose you know that a nominal 10.000 MHz crystal has a series-resonant frequency of 9.996490 MHz and a parallel-resonant frequency of 10.017730 MHz. You also know that its equivalent series capacitance is 27.1 fF. How can you calculate the value of its parallel capacitance?

Answer 4—First, calculate the crystal’s equivalent inductance, based on the series-resonant frequency:EQ-equation1-CC287-June14

Next, calculate the capacitance required to resonate with that inductance at the parallel-resonant frequency:EQ-equation2-CC287-June14

Finally, calculate the value of Cpar required to give that value of capacitance when in series with Cser:EQ-equation3-CC287-June14

Note that all three equations can be combined into one, and this reduces to:EQ-equation4-CC287-June14

High Electron Mobility Transistors

gold backgroundThe TPH3002LD and the TPH3002LS are 600-V Gallium nitride (GaN)-based, low-profile power quad flat no-lead (PQFN) high electron mobility transistors (HEMTs). The HEMTs utilize Transphorm’s patented, high-performance EZ-GaNTM technology, which combines low switching and conduction losses, reducing the overall system energy dissipation up to 50%.

The TPH3002PD and TPH3002PS HEMTs are designed for use in smaller, lower-power applications (e.g., adapters and all-in-one computer power supplies). The HEMTs feature a Kelvin connection to isolate the gate circuit from the high-current output circuit to further reduce electromagnetic interference (EMI) and high-frequency switching capabilities.
Evaluation boards are available with the devices.

Contact Transphorm for pricing.

Transphorm, Inc.
www.transphormusa.com