The Future of Inkjet-Printed Electronics

Silver nanoparticle ink is injected into an empty cartridge and used in conjunction with an off-the-shelf inkjet printer to enable ‘instant inkjet circuit’ prototyping. (Photo courtesy of Georgia Institute of Technology)

Silver nanoparticle ink is injected into an empty cartridge and used in conjunction with an off-the-shelf inkjet printer to enable ‘instant inkjet circuit’ prototyping. (Photo courtesy of Georgia Institute of Technology)

Over the past decade, major advances in additive printing technologies in the 2-D and 3-D electronics fabrication space have accelerated additive processing—printing in particular—into the mainstream for the fabrication of low-cost, conformal, and environmentally friendly electronic components and systems. Printed electronics technology is opening an entirely new world of simple and rapid fabrication to hobbyists, research labs, and even commercial electronics manufacturers.

Historically, PCBs and ICs have been fabricated using subtractive processing techniques such as photolithography and mechanical milling. These traditional techniques are costly and time-consuming. They produce large amounts of material and chemical waste and they are also difficult to perform on a small scale for rapid prototyping and experimentation.

This single-sided wiring pattern for an Arduino microcontroller was printed on a transparent sheet of coated PET film, (Photo courtesy of Georgia Technical Institute)

This single-sided wiring pattern for an Arduino microcontroller was printed on a transparent sheet of coated PET film, (Photo courtesy of Georgia Technical Institute)

To overcome the limitations of subtractive fabrication, over the past decade the ATHENA group at the Georgia Institute of Technology (Georgia Tech) has been developing an innovative inkjet-printing platform that can print complex, vertical ICs directly from a desktop inkjet printer.

To convert a standard desktop inkjet printer into an electronics fabrication platform, custom electronic inks developed by Georgia Tech replace the standard photo inks that are ejected out of the printer’s piezoelectric nozzles. Inks for depositing conductors, insulators/dielectrics, and sensors have all been developed. These inks can print not only single-layer flexible PCBs, but they can also print complex, vertically integrated electronic structures (e.g., multilayer wiring with interlayer vias, parallel-plate capacitors, batteries, and sensing topologies to sense gas, temperature, humidity, and touch).

To create highly efficient electronic inks, which are the key to the printing platform, Georgia Tech researchers exploit the nanoscale properties of electronic materials. Highly conductive metals (e.g., gold, silver, and copper) have very high melting temperatures of approximately 1,000°C when the materials are in their bulk or large-scale form. However, when these metals are decreased to nanometer-sized particles, their melting temperature dramatically decreases to below 100°C. These nanoscale particles can then be dispersed within a solvent (e.g., water or alcohol) and printed through an inkjet nozzle, which is large enough to pass the nanoparticles. After printing, the metal layer printed with nanoparticles is heated at a low temperature, which melts the particles back into a highly conductive metal to produce very low-resistance electrical structures.

Utilizing nanomaterials has enabled the creation of plastic, ceramic, piezoelectric, and carbon nanotube and graphene inks, which are the fundamental building blocks of a fully printed electronics platform. The inks are then tuned to have the correct viscosity and surface tension for a typical desktop inkjet printer.

By loading these nanomaterial-based conductive, dielectric, and sensing inks into the different-colored cartridges of a desktop inkjet printer, 3-D electronics topologies such as metal-insulator-metal (MIM) capacitors can then be created by printing the different inks on top of each other in a layer-by-layer deposition. Since printing is a non-contact additive deposition method, and the processing temperatures are below 100⁰C, these inks can be printed onto virtually any substrate, including standard photo paper, plastic, fabrics, and even silicon wafers to interface with standard ICs with printed feature sizes below 20 µm.

The Georgia Tech-developed printing platform is a major breakthrough. It makes the cost of additively fabricating circuits nearly the same as printing a photo on a home desktop inkjet printer—and with the same level of simplicity and accessibility.

These advancements in 2-D electronics printing combined with current research in low-cost 3-D printing are enabling commercial-grade fabrication of devices that typically required clean room environments and expensive manufacturing equipment. Such technology, when made accessible to the masses, has the potential to completely change the way we think about building, interacting with, and even purchasing electronics that can be digitally transmitted and printed.  While the printing technology is currently at a mature stage, we have only scratched the surface of potential applications that can benefit from printing low-cost, flexible electronic devices.

The Future of Nanotube Computing

For decades, silicon-based transistors have been the workhorse of the semiconductor industry, achieving remarkable advances in computational power. While advances continue to be made, alternative technologies are being explored to increase computational power and efficiency beyond the limits of silicon.

Carbon nanotubes (CNTs) are nanocylinders of carbon atoms, approximately 1 nm in diameter. They have amazing electrical, thermal, and physical properties. CNTs can be used to form CNT field-effect transistors (CNFETs), which use CNTs as the channel material of the transistor, with traditional lithographically defined sources, drains, and gates. It has been projected that digital systems made from carbon nanotubes can achieve more than an order of magnitude benefit in energy delay product (a common metric to compare a circuit’s performance and energy efficiency) compared to competing technologies.

However, it has been impracticable to realize these system-level benefits due to the inability to manufacture CNT-based circuits. This limitation stems from substantial imperfections inherent with the CNTs, including mispositioned and metallic CNTs. Mispositioned CNTs cause erroneous connections in a circuit, metallic (rather than semiconducting) CNTs decrease Ion/Ioff ratio, both potentially resulting in incorrect logic functionality and power wastage.

The trivial solution to these obstacles is to grow 100% perfectly aligned and semiconducting CNTs. However, this is currently infeasible, and likely never will be. Thus, to overcome these inherent imperfections, our Stanford University research team uses the imperfection-immune design paradigm. This paradigm combines processing solutions and design “tricks” to overcome these imperfections in the very-large-scale integration (VLSI) compatible manner.

Max Shulaker, a graduate student at Stanford University and author of this essay, holds a wafer filled with CNTs. (Photo: Norbert von der Groeben )

Max Shulaker, a graduate student at Stanford University and author of this essay, holds a wafer filled with CNTs. (Photo credit: Norbert von der Groeben )

We begin by growing the CNTs highly aligned. This is accomplished by growing the CNTs on a crystalline quartz substrate. The CNTs grow along the crystalline boundary of the quartz and result in highly aligned growths—99.5% alignment. However, for VLSI applications, there are millions or billions of transistors, resulting in billions of CNTs. Thus 99.5% is insufficient.

In addition, we employ mispositioned CNT immune design, which is a technique that renders the circuits that we make 100% immune to any mispositioned CNTs that would be left on the wafer. An important point is that the design is not dependent on the exact placement of the individual CNTs. It works for any arbitrary configuration of CNTs, and thus is manufacturable and scalable to very-large-scale circuits.

To remove metallic CNTs, we break them down, much like a fuse. We turn off all semiconducting CNTs in the circuit and pulse a large voltage across the transistors. Only the metallic CNTs conduct current, and by passing enough current, eventually heat up to

Max M. Shulaker, who holds a wafer filled with carbon nanotubes (CNTs), is a PhD candidate at Stanford University where he earned his BS in Electrical Engineering. He is part of a Stanford research team that recently built the first functioning computer using CNTs. Max works on experimentally demonstrating nanosystems with emerging technologies. His current research focuses on realizing increased levels of integration for CNT-based digital logic circuits. (Photo credit: Norbert von der Groeben)

Max M. Shulaker, who wrote this essay for Circuit Cellar, holds a wafer filled with carbon nanotubes (CNTs). Max is a PhD candidate at Stanford University where he earned his BS in Electrical Engineering. He is part of a Stanford research team that recently built the first functioning computer using CNTs. Max works on experimentally demonstrating nanosystems with emerging technologies. His current research focuses on realizing increased levels of integration for CNT-based digital logic circuits. (Photo credit: Norbert von der Groeben)

the point where they break down, much like a fuse. The trick is being able to perform this breakdown at a chip  scale. Computers today have billions of transistors. It would be infeasible to breakdown each transistor one by one. VLSI-compatible metallic CNT removal (VMR) is a design technique that enables the breakdown to be performed at an entire chip scale.

The imperfection-immune design paradigm, coupled with CNT-specific fabrication processing resulting in high-yield devices, permits, for the first time, the realization of larger-scale digital systems using this very promising technology. Most recently, a basic computer was fabricated at Stanford University completely using CNFETs. The CNT computer was composed of tens of thousands of CNTs, demonstrating the ability to manufacture CNT circuits in a scalable, and thus manufacturable, manner. The computer executes the subtract and branch if negative (SUBNEG) instruction, which is Turing complete, adding to the computer’s generality. As a demonstration, the CNT computer concurrently counted integers and sorted integers, continuously swapping between the two processes. To demonstrate the computer’s flexibility, it also emulated 20 different instructions from the commercial MIPS instruction set.

The CNT computer, culminating years of work by a team of researchers at Stanford University led by Professors Subhasish Mitra and Philip Wong, demonstrates that CNTs are a manufacturable and feasible technology. Beyond CNTs, it is a step forward for the broader field of emerging nanotechnologies. While many alternatives to silicon are being explored, the CNT computer represents an initial demonstration of one of these emerging technologies coming to fruition.

NJIT Professor Invents a Flexible Battery

Researchers at the New Jersey Institute of Technology (NJIT) have developed a flexible battery made with carbon nanotubes that could potentially power electronic devices with flexible displays, according to an NJIT press release.

Electronic manufacturers are now making flexible organic light-emitting diode (OLED) displays, a pioneering technology that allow devices such as cell phones, tablet computers and TVs to literally fold up.

(c) iStockPhoto.com/shawn_hempel

(c) iStockPhoto.com/ (shawn_hempel)

And this new battery, given its flexibility and components, can be used to power this new generation of bendable electronics. The battery is made from carbon nanotubes and micro-particles that serve as active components—similar to those found in conventional batteries. It is designed, though, to contain the electro-active ingredients while remaining flexible.

“This battery can be made as small as a pinhead or as large as a carpet in your living room,” says Somenath Mitra, of Bridgewater, a professor of chemistry and environmental science whose research group invented the battery. “So its applications are endless. You can place a rolled-up battery in the trunk of your electric car and have it power the vehicle.”

A patent application on the battery has been filed, and the battery will be featured in an upcoming issue of “Advanced Materials.”  Mitra developed the new technology at NJIT with assistance from Zhiqian Wang, of Kearney, a doctoral student in chemistry.

The battery has another revolutionary potential, in that it could be fabricated at home by consumers.  All one would need to make the battery is a kit composed of electrode paste and a laminating machine. One would coat two plastic sheets with the electrode paste, place a plastic separator between the sheets and then laminate the assembly. The battery assembly would function in the same way as a double-A or a triple-A battery.

“We have been experimenting with carbon nanotubes and other leading technologies for many years at NJIT,” says Mitra, “and it’s exciting to apply leading-edge technologies to create a flexible battery that has myriad consumer applications.”