Analog Devices Collaborates on IoT Farm-to-Fork Project

Analog Devices has announced a collaboration with The Cornucopia Project and ripe.io to explore the local food supply chain and use this work as a vehicle for educating students at ConVal Regional High School in Peterborough, NH, and local farmers on 21st century agriculture skills. The initiative instructs student farmers how to use Internet of Things and blockchain technologies to track the conditions and movement of produce from “Farm to Fork” to make decisions that improve quality, yields, and profitability. Together with the Cornucopia Project, the endeavor is funded by Analog Devices and ripe.io, with both companies also providing technical training.

Analog Devices Smart Agriculture Manager Erick Olsen (center) and Senior Engineer Rob O'Reilly are pictured alongside ConVal Regional High School Farm to Fork Fellows viewing tomatoes grown with the company's crop monitoring solution. (Photo: Business Wire)

Analog Devices Smart Agriculture Manager Erick Olsen (center) and Senior Engineer Rob O’Reilly are pictured alongside ConVal Regional High School Farm to Fork Fellows viewing tomatoes grown with the company’s crop monitoring solution. (Photo: Business Wire)

For the project, Analog Devices is providing a prototype version of its crop monitoring solution, which will be capable of measuring environmental factors that help farmers make sound decisions about crops related to irrigation, fertilization, pest management, and harvesting. The sensor-to-cloud, Internet of Things solution enables farmers to make better decisions based on accumulated learning from the near-real-time monitoring. These 24/7 measurements are combined with a near infrared (NIR) miniaturized spectrometer that conducts non-destructive analysis of food quality not previously possible in a farm environment.

The Cornucopia Project, a non-profit located in Peterborough, N.H., provides garden and agricultural programs to students from elementary through high school. Student farmers in its Farm to Fork program learn how to use advanced sensor instrumentation in their greenhouse, which provide valuable data to assess the attributes of tomatoes, and how these factors affect taste and quality. The program also educates students on how crops can be tracked throughout the agricultural supply chain to support food quality, sustainability, traceability and nutrition.

ripe.io is contributing its blockchain technology to model the entire fresh produce supply chain, combining the crop growing data, transportation, and storage conditions. Blockchain – a distributed ledger, consensus data technology that is used to maintain a continuously growing list of records – will track crop lifecycle from seed to distributor to retailer to consumer, bringing transparency and accountability to the agricultural supply chain.

Analog Devices | www.analog.com

13.6 GHz, Next-Generation Wideband Synthesizer

Analog Devices has launched the ADF5356, which is a 13.6 GHz next-generation wideband synthesizer with an integrated voltage-controlled oscillator (VCO). The ADF5356 is well-suited for a variety of applications, including wireless infrastructure, microwave point-to-point links, electronic test and measurement, and satellite terminals. The ADF4356 is a complementary synthesizer product that operates to 6.8 GHz and is comparable in performance.

Analog-ADF5356

The ADF5356’s and ADF4356’s features, specs, and benefits:

  • Generate RF outputs from 53.125 MHz to 13.6 GHz without gaps in frequency coverage
  • Offer superior PLL figures of merit (FOM), ultra-low VCO phase noise, very low integer-boundary and phase-detector spurs, and high phase-comparison frequency.
  • Feature VCO phase noise (–113 dBc/Hz at 100 kHz offset at 5 GHz) with integrated RMS jitter of just 97 fs (1 kHz to 20 MHz) and integer-channel noise floor of –227 dBc/Hz
  • Phase detector spurious levels are below –85 dBc (typical), and the phase detector comparison frequency can be as high as 125 MHz.
  • Fully supported by the ADIsimPLL, which is Analog Devices’s easy-to-use PLL synthesizer design and simulation tool. The synthesizers are pin-compatible with Analog Devices’s existing ADF5355 and ADF4355 devices.
  • Specified over the –40°C to 85°C range
  • Operate from nominal 3.3-V analog and digital power supplies as well as 5-V charge-pump and VCO supplies
  • Features 1.8-V logic-level compatibility

The ADF5356 costs $39.98 in 1,000-unit quantities. The ADF4356 costs $20.36 in 1,000-piece quantities. The EV-ADF5356SD1Z pre-release boards cost $450 each.

Analog Devices | www.analog.com

Single-Chip, Multi-Protocol Switch for Intelligent Apps

Analog Devices recently introduced a real-time Ethernet, multi-protocol (REM) switch chip Ethernet connectivity solution for intelligent factory applications. Well suited for a variety of connected motion applications, you can use the “TSN-ready” (time sensitive networking) fido5000 with any processor, any protocol, and any stack.

The fido5000 two-port embedded Ethernet switch’s features, specs, and benefits include:

  • Reduces board size and power consumption while improving Ethernet performance at the node under any network load condition.
  • Attaches to Analog’s ADSP-SC58x, ADSP-2158x, and ADSP-CM40x motion control processors
  • Supports PROFINET RT/IRT, EtherNet/IP with beacon-based DLR, ModbusTCP, EtherCAT, SERCOS, and POWERLINK.
  • Achieves cycle times below 125 µs
  • Includes drivers for simple integration with any Industrial Ethernet protocol stack

The fido5100 is scheduled for full production in September 2017 and will cost $6 each in 1,000-piece quantities. The fido5200 (EtherCAT Capable) is also scheduled for full production in September 2017 and will cost $8 each in 1,000-piece quantities.

Analog Devices | www.analog.com

IEEE 802.3bt PD Controller Offers 99% Efficiency

Recently acquired by Linear Technology, Analog Devices has announced the LT4294 IEEE 802.3bt Powered Device (PD) interface controller. Intended for applications requiring up to 71 W of delivered power, this new Power over Ethernet (PoE) standard (IEEE 802.3bt) both increases the power budget and supports 10-Gb Ethernet (10GBASE-T). The LT4294’s features, benefits, and specs:

  • Available in 10-lead MSOP and 3 mm x 3 mm DFN Packages.
  • It maintains backward compatibility with older IEEE 802.3af and 802.3at PoE equipment.
  • It provides up to 99% of power available from the RJ-45 connector to the hot swap output.
  • Supports new features: additional PD classes (5, 6, 7, and 8), PD types (Type 3 and Type 4), and five-event classification.
  • It can be married to any high efficiency switching regulator.
  • It controls an external MOSFET to reduce overall PD heat dissipation and maximize power efficiency.
  • An external MOSFET architecture enables you to size the MOSFET to your application’s requirements.
  • It’s available in industrial and automotive grades, supporting operating temperature ranges from –40°C to 85°C and –40°C to 125°C, respectively.Linear LT4294

The LT4294 starts at $1.95 each in 1,000-piece quantities and is available in production quantities. The LT4294 complements the LT4295 802.3bt PD interface controller with integrated switcher, both of which provide an upgrade path from our existing PoE+/LTPoE++ PD controllers, including the LT4276 and LT4275.

Source: Linear Technology

13.6-GHz, Next-Generation Wideband Synthesizer

Analog Devices recently launched the ADF5356, which is a 13.6-GHz next-generation wideband synthesizer with integrated voltage-controlled oscillator (VCO). The ADF5356 is well suited for a variety of applications, including wireless infrastructure, microwave point-to-point links, electronic test and measurement, and satellite terminals. The ADF4356 is a complimentary synthesizer product that operates to 6.8 GHz and is comparable in performance.Analog-ADF5356

The ADF5356/4356’s features, specs, and benefits:

  • Generate RF outputs from 53.125 MHz to 13.6 GHz without gaps in frequency coverage
  • Offer superior PLL figures of merit (FOM), ultra-low VCO phase noise, very low integer-boundary and phase-detector spurs, and high phase-comparison frequency.
  • Feature VCO phase noise (–113 dBc/Hz at 100 kHz offset at 5 GHz) with integrated RMS jitter of just 97 fs (1 kHz to 20 MHz) and integer-channel noise floor of –227 dBc/Hz.
  • Phase detector spurious levels are below –85 dBc (typical), and the phase detector comparison frequency can be as high as 125 MHz.
  • Fully supported by the ADIsimPLL, which is Analog Devices’s easy-to-use PLL synthesizer design and simulation tool. The synthesizers are pin-compatible with Analog Devices’s existing ADF5355 and ADF4355 devices.
  • Specified over the –40°C to 85°C range.
  • Operate from nominal 3.3-V analog and digital power supplies as well as 5-V charge-pump and VCO supplies
  • Features 1.8-V logic-level compatibility.

The ADF5356 costs $39.98 in 1,000-unit quantities. The ADF4356 costs $20.36 in 1,000-piece quantities. The EV-ADF5356SD1Z pre-release boards cost $450 each.

Source: Analog Devices

Single-Chip, Multi-Protocol Switch for Intelligent Apps

Analog Devices recently introduced a real-time Ethernet, multi-protocol (REM) switch chip Ethernet connectivity solution for intelligent factory applications. Well suited for a variety of connected motion applications, you can use the “TSN-ready” (time sensitive networking) fido5000 with any processor, any protocol, and any stack.

The fido5000 two-port embedded Ethernet switch’s features, specs, and benefits include:

  • Reduces board size and power consumption while improving Ethernet performance at the node under any network load condition.
  • Attaches to Analog’s ADSP-SC58x, ADSP-2158x, and ADSP-CM40x motion control processors
  • Supports PROFINET RT/IRT, EtherNet/IP with beacon-based DLR, ModbusTCP, EtherCAT, SERCOS, and POWERLINK.
  • Achieves cycle times below 125 µs
  • Includes drivers for simple integration with any Industrial Ethernet protocol stack

The fido5100 is scheduled for full production in September 2017 and will cost $6 each in 1,000-piece quantities. The fido5200 (EtherCAT Capable) is also scheduled for full production in September 2017 and will cost $8 each in 1,000-piece quantities.

Source: Analog Devices

13.6-GHz, Next-Generation Wideband Synthesizer

Analog Devices recently launched the ADF5356, which is a 13.6-GHz next-generation wideband synthesizer with integrated voltage-controlled oscillator (VCO). The ADF5356 is well suite for a variety of applications, including wireless infrastructure, microwave point-to-point links, electronic test and measurement, and satellite terminals. The ADF4356 is a complimentary synthesizer product that operates to 6.8 GHz and is comparable in performance.Analog ADF5356

The ADF5356’s and ADF4356’s features, specs, and benefits:

  • Generate RF outputs from 53.125 MHz to 13.6 GHz without gaps in frequency coverage
  • Offer superior PLL figures of merit (FOM), ultra-low VCO phase noise, very low integer-boundary and phase-detector spurs, and high phase-comparison frequency.
  • Feature VCO phase noise (–113 dBc/Hz at 100 kHz offset at 5 GHz) with integrated RMS jitter of just 97 fs (1 kHz to 20 MHz) and integer-channel noise floor of –227 dBc/Hz.
  • Phase detector spurious levels are below –85 dBc (typical), and the phase detector comparison frequency can be as high as 125 MHz.
  • Fully supported by the ADIsimPLL, which is Analog Devices’s easy-to-use PLL synthesizer design and simulation tool. The synthesizers are pin-compatible with Analog Devices’s existing ADF5355 and ADF4355 devices.
  • Specified over the –40°C to 85°C range.
  • Operate from nominal 3.3-V analog and digital power supplies as well as 5-V charge-pump and VCO supplies
  • Features 1.8-V logic-level compatibility.

The ADF5356 costs $39.98 in 1,000-unit quantities. The ADF4356 costs $20.36 in 1,000-piece quantities. The EV-ADF5356SD1Z pre-release boards cost $450 each.

Source: Analog Devices

New MEMS Accelerometers for Industrial Condition Monitoring Apps

Analog Devices’s new ADXL1001 and ADXL1002 high-frequency, low-noise MEMS accelerometers are designed for industrial condition-monitoring applications. The accelerometers deliver the high-resolution vibration measurements needed for the early detection of machine failure (e.g., bearing faults).Analog ADXL1001

The ADXL1001 and ADXL1002’s benefits, features, and specs:

  • Deliver ultra-low noise density over an extended bandwidth with high-g range.
  • Available in two models with full-scale ranges of ±100 g (ADXL1001) and ±50 g (ADXL1002).
  • Typical noise density for the ADXL1002 is 25 μg/√Hz, with a sensitivity of 40 mV/g, and 30 μg/√Hz for ADXL1001 with sensitivity 20 mV/g.
  • Operate on single voltage supply from 3. to 5.25 V
  • Electrostatic self-test
  • Over range indicator
  • Rated for operation over a –40°C to 125°C temperature range.

The accelerometers cost $29.61 each in 1,000-unit quantities.

Source: Analog Devices

Analog Filter Essentials

Analog frequency-selective filters are useful for noise reduction, antialiasing before digitizing a signal, frequency response correction, and more. In this article, Circuit Cellar columnist Robert Lacoste explains the differences between filters and how to design them with computer-aided tools.
 

The following article by Robert Lacoste appears in Circuit Cellar 307, 2016.

 
 
Welcome back to the Darker Side. I spoke about operational amplifiers (op-amps) in my last few columns. Op-amps shine in plenty of applications—in particular, to build active filters. This month, I’ll focus on filters—more precisely, analog frequency-selective filters, which are used in audio devices, as well as for noise reduction, antialiasing before digitizing a signal, separation of frequency-multiplexed signals, frequency response correction, and so on.

So analog filters must be in the bag of tricks of any designer. Unfortunately, filter design, or even their use, is often perceived as a difficult task close to black magic. This is, well, unfortunate. Filters are definitively useful, simple, and even fun. I bet a textbook about filters full of math would bore you, right? Well, relax. My goal for this article is more pragmatic. I will try to help you to specify a filter, understand the main filter variants, and efficiently use some great computer-aided design tools. I promise, no Laplace transforms or poles or zeros, just electronics.

FILTER SPECIFICATIONS

Let’s start with some vocabulary. By definition, a filter is a circuit that attenuates some signals more than others, depending on their frequency. Figure 1 depicts the most classic filter types. A low-pass filter lets the low frequencies pass through, but attenuates high-frequency signals. It is perfect for removing high-frequency noise on a signal coming from a sensor.

FIGURE 1: Four classic types of frequency filters. Each one attenuates a specific frequency range.

FIGURE 1: Four classic types of frequency filters. Each one attenuates a specific frequency range. Click image to enlarge.

Conversely, a high-pass filter attenuates the low frequencies, and could in particular remove any DC component of a signal. Band-pass filters are a combination of both, and they attenuate all frequencies below or above a given range. For example, any radio frequency receiver is a band-pass filter, providing attenuation of all signals except for frequencies close to its preset frequency. Lastly, a band stop filter, often called a notch filter, does the opposite, and it attenuates a selected range of frequencies. For example, a 50- or 60-Hz notch filter is included in virtually every weight scale to remove EMC perturbations from the surrounding power lines.

Want to specify a filter? Figure 2 illustrates this on a low-pass filter. The first parameter is the filter cut-off frequency, of course. By definition, this is the frequency at which the filter attenuates the power of the signal by 50%. This means that the losses of the filter will be 3 dB at that frequency. Aren’t you fluent with decibels? A decibel is one tenth of a Bel, and a Bel is the base-10 logarithm of the ratio of two powers. Take your calculator and enter 10 × log(0.5), you will get –3.01, which everybody rounds to –3 dB.

FIGURE 2 A filter (low-pass in this case) is specified by its cutoff frequency f3dB, its ripple in the pass-band, and its rejection in the stopband.

FIGURE 2: A filter (low-pass in this case) is specified by its cutoff frequency f3dB, its ripple in the pass-band, and its rejection in the stopband. Click image to enlarge.

But perhaps an attenuation of 3 dB is already too much for your application. The maximum tolerated variation of signal power in the pass-band (here from DC to fPB) is called the ripple of the filter. Lastly, you will very probably want to specify that the filter must provide a given minimum attenuation, called rejection, above some frequency fSB. Of course, these specifications must be established with care. If you decide that you need a filter with 0.01 dB of ripple up to 10 kHz and 100 dB of rejection from 11 kHz upward, you will probably need plenty of time and cash for the design.

RC FILTERS

I propose to start with the most basic designs: RC filters. The basic low-pass filter is built with one series resistor and one capacitor to ground (see Figure 3). The capacitor impedance gets lower when the frequency increases, and the signal power is attenuated. This filter is called a first-order filter, and it provides an attenuation of 6 dB per octave or 20 dB per decade. (. Simply because 23.33 = 10, and 3.33 × 6 = 20.) That means that, above its cut-off frequency, its attenuation is increased by 6 dB each time the frequency is doubled, or by 20 dB each time it is multiplied by 10. I did the simulation for you with Labcenter Electronics Proteus. Figure 3 shows the result. You can do the same with any Spice-based simulator like the free LT-Spice. The attenuation of this RC filter is –20 dB at 100 kHz, and 20 dB more, meaning –40 dB, at 10 × 100 kHz = 1 MHz as expected.

FIGURE 3 A first-order RC filter (top) provides an attenuation of 20 dB/decade (green curve), whereas a second-order filter provides 40 dB/decade (red).

FIGURE 3: A first-order RC filter (top) provides an attenuation of 20 dB/decade (green curve), whereas a second-order filter provides 40 dB/decade (red). Click image to enlarge.

Such a RC filter can be designed for any cutoff frequency. Just select the proper values for R and C. You might wonder how to calculate the values of the R and C. For a single RC cell, it is really easy. The cutoff frequency is 1/(2pRC).

If you want to increase the steepness of the attenuation, you can chain several RCs. For example, I simulated a second-order RC filter, with two RC cells in series (see Figure 3). As expected, the attenuation is now 12 dB (i.e., 2 × 6) per octave, or 40 dB (i.e., 2 × 20) per decade. Nothing magic. The 3-dB cutoff frequency is pushed downward as compared to a single RC cell, simply because at the 3-dB cutoff of each cell the attenuation is now 6 dB. However, you can see in the graph that even if the falloff in high frequencies is two times better, the drop around the cutoff frequency isn’t improved: it is still “soft.” That’s a limitation of cascaded RC cells. I will present you with a better solution.

Maybe a low-pass filter isn’t what you need. If you prefer a high-pass filter, then just exchange capacitors and resistors. A series capacitor and a resistor to ground would make it. Do you want a band-pass? Just put a low-pass cell in series with a high-pass cell with the appropriate cutoff frequencies. For example, a 10-to-50-kHz band-pass can be built with a 10-kHz high pass and a 50-kHz low pass. And for a notch filter? Do the same with the two filters in parallel. With the same example, a 10-to-50-kHz band stop may be implemented with a 10-kHz low pass and 50-kHz high pass in parallel. Easy.

LC FILTERS

For a given filter performance, is it possible to build a passive analog filter with fewer parts than a multicell RC filter and with improved performance? Yes, you can use LC filters. Here the filter is made with capacitors and inductors, as illustrated in Figure 4. How steep can be their attenuation profile? Very easy. It is the same in the case of RC filters. Count the number of capacitors, add the number of inductors, and you’ll get the order or the filter. Then multiply by 6 dB to get the attenuation per octave, or by 20 dB for an attenuation per decade! For example, the first filter simulated in Figure 4 has one inductor and one capacitor. Two parts, so it is a second-order filter, with the same 40 dB/octave attenuation as the dual RC example in Figure 3. The bottom example has three capacitors and two inductors; therefore, its attenuation is 100 dB (i.e., 5 × 5) per decade or 30 dB (i.e., 5 × 6) per octave. I promise. It’s simple!

FIGURE 4: This simulation shows the frequency response of three LC filters, respectively, of order two, three, and five from top to bottom. Their outputs are open-ended, which imply some overshoot.

FIGURE 4: This simulation shows the frequency response of three LC filters, respectively, of order two, three, and five from top to bottom. Their outputs are open-ended, which imply some overshoot. Click image to enlarge.

Well, nearly. Let’s now see the small details. If you refer back to Figure 4, you’ll see that such LC filters have a weird response around their cutoff frequencies. There is an overshoot, which means they have a positive gain at some frequencies. Of course, such passive filters can’t “create energy.” This positive gain is due to the fact that their output is open-circuited so no energy actually flows anywhere. Don’t be confused. This is not an artifact of the simulation. This would be exactly the same on an actual circuit. The amplitude of the overshoot is directly linked to the so-called quality factor of the L and C parts, and in particular their series resistance. If the capacitor and inductors are ideal, then the overshoot will be infinite at the frequency where the L and C oscillate. That’s why I added a small 47-Ω series resistor on the simulations. If you change the value of this series resistor, then the shape of the gain curve changes. I illustrated it in Figure 5 (top graph) which shows a series resistor ranging from 5 to 100 Ω.

FIGURE 5: The top simulation shows the frequency response of an open-ended LC filter with varying serial resistor value. The bottom simulation shows that the overshoot disappears when the filter is connected to a matched load. X varies from 5 to 100 Ω.

FIGURE 5: The top simulation shows the frequency response of an open-ended LC filter with varying serial resistor value. The bottom simulation shows that the overshoot disappears when the filter is connected to a matched load. X varies from 5 to 100 Ω. Click image to enlarge.

How do you avoid such oscillations? Simply connect the filter’s output to a proper load. If you are a regular reader of my columns, you won’t be surprised: this load must provide an impedance matching with the source impedance. Look at the second example in Figure 5. I added a load resistor R3 of the same value as the source resistor R2 (denoted X). I then asked the simulator to show the resulting gain versus frequency graph with different values for these resistors X, ranging from 5 to 100 Ω again. The shapes are varying, but there are no overshoots. Moreover a precise resistor value provides a very clean and flat response, linked of course with the values of the L and C parts. This value, here 50 ohm, is the characteristic impedance of the LC filter.

So LC filters must be calculated to get the required frequency response but also taking into account the impedance of the load. For second order filters, using just one inductor and one capacitor, the calculation are straightforward. The cutoff frequency is f3dB = 1/[2p√(LC)], and the characteristic impedance is Z = √(L/C). If you know the required cutoff frequency and designed impedance, then you can easily calculate L and C from these two formulas.

The calculation is not so straightforward for higher-order filters, especially as the design choices are numerous. More on that below. Our ancestors used the abacus; now we can use web-based design tools. (Refer to the Resources section of this article for some links to free LC filter calculators.) There is even a great design tool from Coilcraft that allows you to directly order the samples of the required inductors with a mouse click. Easy, I promised.

FROM LC TO ACTIVE FILTERS

Using inductors often isn’t pleasant. They can be heavy and large, and they’re always significantly more expensive than capacitors and resistors. Moreover, inductors are often quite far from ideal components. They can have a high series resistance as well as parasitic capacitance, nasty electromagnetic compatibility behavior, and a couple of other issues. How can you keep the performance of an LC filter without using inductors? With an active filter, usually built around our dear friend the op-amp.

There are basically three ways to build an active filter. The first is to simply add an amplifier to the RC filters I’ve already talked about. For example, you can add a voltage follower after an RC cell in order to reduce its output impedance or to provide some gain. You can also wire an op-amp as a differentiator or integrator, which are first-order filters.

The second solution is to build a switched-capacitor filter circuit. (I devoted my Circuit Cellar 277 column to the subject.) So let’s talk about the third option, which is based on so-called gyrators. What is that? A gyrator is a circuit that mimics the behavior of an inductor, using an op-amp and only resistors and capacitors. You will find plenty of literature on the subject. Of course, this is explained in the bible, Paul Horowitz and Winfield Hill’s The Art of Electronics, but Rod Elliott provides a clear presentation on the subject in “Active Filters Using Gyrators – Characteristics, and Examples,” (Elliott Sound Products, 2014).

Look at Figure 6 where I have illustrated the basic concept. The top part of the schematic is a classic second-order LC high-pass filter with matched source and load impedances. I used a 390-nF capacitor and a 1-mH inductor, resulting in a cutoff frequency of 8 kHz and a characteristic impedance of 50 Ω—here roughly matched with source and load 56-Ω resistors.

FIGURE 6 This simulation shows the transformation of an LC high-pass filter (top) into a gyrator-based circuit (middle), which is really close to the common Sallen Key filter (bottom).

FIGURE 6: This simulation shows the transformation of an LC high-pass filter (top) into a gyrator-based circuit (middle), which is really close to the common Sallen Key filter (bottom). Click image to enlarge.

The response curve shows noting surprising with a 40 dB/decade (i.e., 2 × 20) attenuation in the stopband. Its gain is –6 dB in the passband, as the voltage is divided by two due to the source and load resistors. (The power is divided by 22 = 4, giving –6 dB.) Now look at the middle section of the schematic in Figure 6. The circuit is exactly the same, but I replaced the inductor with an op-amp, a capacitor, and two resistors. That’s a gyrator. If you look now at the resulting graph, you will see that its frequency response is exactly the same as the LC version, at least up to 1 MHz where the characteristics of the op-amp start to be limiting.

Now another magic trick. Compare the gyrator-based schematic with the schematic at the bottom of Figure 6. If you move the parts and the wires around, you will see that they are exactly identical, except the output is now directly connected to the op-amp output. Do you recognize the new schematic? It is a Sallen-Key second-order active high-pass filter. I modified the part values to a more reasonable range, but you can see that the output frequency response is still the same. More precisely, it doesn’t suffer from the 6-dB losses as the signal is taken directly at the output of the op-amp. So Sallen-Key filters, gyrator-based filters, and LC filters are more than cousins.

FILTER RESPONSES

If you want to design a single-cell filter, either a first-order RC filter, a second-order LC, or an active filter, then you will not have a lot of design choices. You can select the desired filter type, cutoff frequency, and impedance, but nothing more. However, for higher-order filters, the choices are wider. The filter is made of several cells, and you can tune each cell separately. Therefore, you will have a better attenuation curve thanks to the higher order (remember, 6 dB per octave multiplied by the order of the filter), as well as more control on the shape of the filter.

Nothing prevents you from designing your own filter, tweaking each cell however you want. However, mathematicians have already calculated several “optimal” filters for certain applications. Do you want to have a response curve as flat as possible in the passband? Stephen Butterworth calculated it for you in 1930. It’s now called the Butterworth filter, of course. Do you prefer to attenuate as quickly as possible the stop-band even if it implies a higher level of ripple in the pass-band? Use a Chebyshev filter, derived from the Chebyshev polynomials. More precisely, this is a family of filters based on the acceptable ripple (e.g., 0.5 dB). The so-called elliptic filters are close.

The last common variant, the Bessel filter, is a little more complex. A Bessel filter is not a great option both in terms of flatness and attenuation; however, it has a key advantage in the time domain. Its so-called group delay is nearly flat. That brings us a little too far here, but these characteristics preserve the shape of the filtered signals in the time domain. I will tackle that subject in another article.

Of course, each variant has drawbacks. For the same filter complexity, a higher ripple in the passband must be accepted to get a higher attenuation in the stop-band. Similarly, a better phase flatness implies a worse frequency response. Life is difficult, but you are the designer, so you have the control. Figure 7 shows the characteristic responses of each filter variant.[1] For more information, I strongly encourage you to have a look at the “Analog Filters” chapter in Hank Zumbahlen’s Linear Circuit Design Handbook (Analog Devices, 2008).

FIGURE 7: These plots show the typical frequency and time (step and impluse) response of the three most common filter variants. (Source: Linear Circuit Design Handbook, Analog Devices)

FIGURE 7: These plots show the typical frequency and time (step and impluse) response of the three most common filter variants. Click image to enlarge. (Source: Linear Circuit Design Handbook, Analog Devices)

DESIGNER TOOLS

So you have plenty of options when designing a filter. Fortunately, there are great computer-based design tools made for the design engineer. Some are expensive, but plenty are free. In particular, several op-amp suppliers offer filter design tools for their products. I like Analog Devices’s Analog Filter Wizard (www.analog.com/designtools/en/filterwizard/). It’s powerful and doesn’t require a PC installation. Other solutions include Texas Instruments’s Webench Filter Designer, Microchip Technology’s FilterLab, Linear Technology’s FilterCAD, and some others.

FIGURE 8 With a tool like the Analog Filter Wizard (Analog Devices), life is easy

FIGURE 8: With a tool like the Analog Filter Wizard (Analog Devices), life is easy. Click image to enlarge.

As an example, Figure 8 shows a typical session with Analog Devices’s Analog Filter Design. Basically, you start by selecting the filter type (here a low-pass), the required gain in the pass-band, the cutoff frequency, and the attenuation you want at a given stop-band frequency. A slider enables you to browse through several designs—namely, Chebyshev, Butterworth, and others. The next window enables you select the desired tolerance for the capacitors and resistors and actually draw the filter’s full schematic (of course using an op-amp from the supplier who offered the tool). Lastly, the resulting frequency, phase, and time plots are generated, taking into account the tolerance of the parts. Other options enable you to calculate the power consumption of the design or its noise figure. Of course, the beauty of such a tool is that you can try tens of designs in minutes and select the most adequate for your specifications and budget.

WRAPPING UP

Here we are. As always, I have only scratched the subject’s surface. Anyway, I hope you grasped the key concepts. Go through the content listed in the Resources section of this article, and don’t forget to practice on your own. Maybe you should stop reading this magazine now (don’t forget to come back to the issue later), download one of the filter design tools, and play with the settings. It would be the best way to really understand the difference between a fourth-order Butterworth filter and a third-order Chebyshev filter. Have fun and don’t be afraid of filters.

Robert Lacoste lives in France, near Paris. He has 25 years of experience in embedded systems, analog designs, and wireless telecommunications. A prize winner in more than 15 international design contests, in 2003 he started his consulting company, ALCIOM, to share his passion for innovative mixed-signal designs. His book (Robert Lacoste’s The Darker Side) was published by Elsevier/Newnes in 2009.

Ultra-Low Power Buck Regulator Extends Battery Life

Analog Devices recently launched an ultralow power buck regulator that extends battery life in portable devices by achieving high ultra-light-load power conversion efficiency. With a 90% efficiency rating and consuming only 180-nA quiescent current, the ADP5301 buck regulator provides maximum power for a longer period of time than previously achievable. The regulator’s tiny WLCSP package measures less than 3.1-mm², which makes it suitable for small form factors.

A great solution for Internet of Things (IoT) applications, the ADP5301 has several key features:

  • 90% power conversion efficiency in ultralight load with 180-nA quiescent current boosts battery life
  • 6.5- to 2.05-V input voltage range enables several battery sources or architectures
  • Selectable, low-noise forced PWM mode with low output voltage ripple powers noise-sensitive analog load up to 500-mA output current capability
  • Integrated voltage supervisory function increases overall system reliability

Source: Analog Devices

Low-Jitter 1.25-GSPS Clock Optimizes JESD204B Serial Interface Functionality in GSPS Data Converter Applications

Analog Devices recently introduced the AD9528 JESD204B clock and SYSREF generator defined to support the clock requirements for long-term evolution (LTE) and multicarrier GSM base station designs, defense electronics systems, RF test instrumentation, and more. According to Analog devices, the JESD204B interface was developed “to address high-data rate system design needs, and the AD9528 clock device contains functions that support and enhance the unique capabilities of that interface standard.”

The AD9528 provides a low-power, multi-output, clock distribution function with low-jitter performance, along with an on-chip, two-stage PLL and VCO. The on-chip VCO tunes from 3.6 to 4.0 GHz.

When connected to a recovered system reference clock and a VCXO, the AD9528 generates 12 low-noise outputs with a range of 1 to 400 MHz and two high-speed outputs at up to 1.25 GHz. The frequency and phase of one clock output relative to another clock output can be varied by means of a divider phase-select function that serves as a jitter-free, coarse timing adjustment in increments that are equal to half the period of the signal coming from the VCO output. The SYSREF signals each have additional phase offset capability making it easy to dial-in the optimal arrival time at each target device.

The AD9528 can be designed into wideband RF data acquisition applications with ADI’s AD9680 dual-channel, 14-bit, 1.0-GSPS JESD204B A/D converter.

The AD9528BCPZ costs $8.25 in 1,000-piece quantities. The evaluation board costs $190.

24-Bit Sigma Delta A/D Converter

Analog Devices recently announced a 24-bit sigma-delta A/D converter with a fast and flexible output data rate for high-precision instrumentation and process control applications

The AD7175-2 converter delivers 24 noise-free bits at 20 SPS and 17.2 noise-free bits at 250 ksps providing you with a wider dynamic range. With twice the throughput for the same power consumption versus competing solutions, the AD7175-2 enables faster, more responsive measurement systems providing a 50-ksps/channel scan rate with a 20-µs settling time.Analog-AD7175-2-Product-Release-Image

The integrated, low-noise, true rail-to-rail input buffer enables quick and easy sensor interfacing, reduces design and layout complexity, simplifies analog drive circuitry and reduces PCB area. The AD717x family, with a wide range of pin and software compatible devices, allows consolidation and standardization across system platforms.

According to Analog Devices, the converter gives “designers a wider dynamic range, which enables smaller signal deviations to be measured as required within analytical laboratory instrumentation systems.”

Specs and features:

  • 2x the throughput for the same power consumption in comparison to other devices
  • Enables faster measurement systems providing a 50-ksps/channel scan rate with 20-µs settling time.
  • Integrated true rail-to-rail input buffer for easy sensor interfacing and simplified analog drive circuitry
  • User-configurable input channels
  • 2 differential or 4 single-ended channels
  • Per-channel independent programmability
  • Integrated 2.5-V buffered 2-ppm/°C reference
  • Flexible and per-channel programmable digital filters
  • Enhanced filters for simultaneous 50-Hz and 60-Hz rejection
  • −40°C to +105°C operating temperature range

Source: Analog Devices

Synchronized RF Transceiver Rapid Prototyping Kit for SDR

Analog Devices recently announced a software-defined radio (SDR) rapid prototyping kit with dual 2 x 2 AD9361 RF transceivers to simplify and rapidly prototype 4 × 4 MIMO wireless transceiver applications on the Xilinx Zynq-7000 all-programmable SoC development platforms. The AD-FMCOMMS5-EBZ rapid prototyping kit provides a hardware/software ecosystem solution addressing the challenges of SDR transceiver synchronization experienced by RF and analog designers when implementing systems using MIMO architectures. A webinar is available on how to synchronize multiple RF transceivers in high-channel density applications.

Source: Analog Devices

Source: Analog Devices

The AD-FMCOMMS5-EBZ rapid prototyping kit includes the following:

  • An FPGA mezzanine card (FMC) featuring two of Analog AD9361 2 x 2 RF transceivers and support circuitry
  • Reference designs
  • Design and simulation tools for MathWorks
  • HDL (hardware description language) code
  • Device drivers for Zynq-7000 All Programmable SoCs
  • Online support at ADI’s EngineerZone for rapid prototyping to reduce development time and risk.

The AD-FMCOMMS5-EBZ rapid prototyping kit is the fifth SDR rapid prototyping kit ADI has introduced in the last year to help customers address the global SDR market. SDR MIMO applications range from defense electronics and RF instrumentation to communications infrastructure and include active antennas, transmit beamforming, receive angle of arrival systems, and open-source SDR development projects.

The AD9361 operates over a frequency range of 70 MHz to 6 GHz. It is a complete radio design that combines multiple functions, including an RF front end, mixed-signal baseband section, frequency synthesizers, two analog-to-digital converters and two direct conversion receivers in a single chip. The AD9361 supports channel bandwidth from less than 200 kHz to 56 MHz, and is highly programmable, offering the widest dynamic range available in the market today with state-of-the-art noise figure and linearity.

Source: Analog Devices

 

Bit Banging

Shlomo Engelberg, an associate professor in the electronics department of the Jerusalem College of Technology, is well-versed in signal processing. As an instructor and the author of several books, including Digital Signal Processing: An Experimental Approach (Springer, 2008), he is a skilled guide to how to use the UART “protocol” to implement systems that transmit and receive data without a built-in peripheral.

Implementing serial communications using software rather than hardware is called bit-banging, the topic of his article in Circuit Cellar’s June issue.

“There is no better way to understand a protocol than to implement it yourself from scratch,” Engelberg says. “If you write code similar to what I describe in this article, you’ll have a good understanding of how signals are transmitted and received by a UART. Additionally, sometimes relatively powerful microprocessors do not have a built-in UART, and knowing how to implement one in software can save you from needing to add an external UART to your system. It can also reduce your parts count.”

In the excerpt below, he explains some UART fundamentals:

WHAT DOES “UART” MEAN?
UART stands for universal asynchronous receiver/transmitter. The last three words in the acronym are easy enough to understand. “Asynchronous” means that the transmitter and the receiver run on their own clocks. There is no need to run a wire between the transmitter and the receiver to enable them to “share” a clock (as required by certain other protocols). The receiver/transmitter part of the acronym means just what it says: the protocol tells you what signals you need to send from the transmitter and what signals you should expect to acquire at the receiver.

The first term of the acronym, “universal,” is a bit more puzzling. According to Wikipedia, the term “universal” refers to the fact that the data format and the speed of transmission are variable. My feeling has always been that the term “universal” is basically hype; someone probably figured a “universal asynchronous receiver/transmitter” would sell better than a simple “asynchronous receiver/transmitter.”

Figure 1: The waveform output by a microprocessor’s UART is shown. While “at rest,” the UART’s output is in the high state. The transmission begins with a start bit in which the UART’s output is low. The start bit is followed by eight data bits. Finally, there is a stop bit in which the UART’s output is high.

Figure 1: The waveform output by a microprocessor’s UART is shown. While “at rest,” the UART’s output is in the high state. The transmission begins with a start bit in which the UART’s output is low. The start bit is followed by eight data bits. Finally, there is a stop bit in which the UART’s output is high.

TEAMWORK NEEDED
Before you can use a UART to transfer information from device to device, the transmitter and receiver have to agree on a few things. First, they must agree on a transmission speed. They must agree that each transmitted bit will have a certain (fixed) duration, denoted TBIT. A 1/9,600-s duration is a typical choice, related to a commonly used crystal’s clock speed, but there are many other possibilities. Additionally, the transmitter and receiver have to agree about the number of data bits to be transmitted each time, the number of stop bits to be used, and the flow control (if any).

When I speak of the transmitter and receiver “agreeing” about these points, I mean that the people programming the transmitting and receiving systems must agree to use a certain data rate, for example. There is no “chicken and egg” problem here. You do not need to have an operational UART before you can use your UART; you only need a bit of teamwork.

UART TRANSMISSION
Using a UART is considered the simplest way of transmitting information. Figure 1 shows the form the transmissions must always make. The line along which the signal is transmitted is initially “high.” The transmissions begin with a single start bit during which the line is pulled low (as all UART transmissions must). They have eight data bits (neither more nor less) and a single stop bit (and not one and a half or two stop bits) during which the line is once again held high. (Flow control is not used throughout this article.)

Why must this protocol include start and stop bits? The transmitter and the receiver do not share a common clock, so how does the receiver know when a transmission has begun? It knows by realizing that the wire connecting them is held high while a transmission is not taking place, “watching” the wire connecting them, and waiting for the voltage level to transition from high to low, which it does by watching and waiting for a start bit. When the wire leaves its “rest state” and goes low, the receiver knows that a transmission has begun. The stop bit guarantees that the line returns to its “high” level at the end of each transmission.

Transmissions have a start and a stop bit, so the UART knows how to read the two words even if one transmits that data word 11111111 and follows it with 11111111. Because of the start and stop bits, when the UART is “looking at” a line on which a transmission is beginning, it sees an initial low level (the start bit), the high level repeated eight times, a ninth high level (the stop bit), and then the pattern repeats. The start bit’s presence enables the UART to determine what’s happening. If the data word being transmitted were 00000000 followed by 00000000, then the stop bit would save the day.

The type of UART connection I describe in this article only requires three wires. One wire is for transmission, one is for reception, and one connects the two systems’ grounds.

The receiver and transmitter both know that each bit in the transmission takes TBIT seconds. After seeing a voltage drop on the line, the receiver waits for TBIT/2 s and re-examines the line. If it is still low, the receiver assumes it is in the middle of the start bit. It waits TBIT seconds and resamples the line. The value it sees is then used to determine data bit 0’s value. The receiver then samples every TBIT seconds until it has sampled all the data bits and the stop bit.

Engelberg’s full article, which you can find in Circuit Cellar’s June issue, goes on to explain UART connections and how he implemented a simple transmitter and receiver. For the projects outlined in his article, he used the evaluation kit for Analog Devices’s ADuC841.

“The transmitter and the receiver are both fairly simple to write. I enjoyed writing them,” Engelberg says in wrapping up his article. “If you like playing with microprocessors and understanding the protocols with which they work, you will probably enjoy writing a transmitter and receiver too. If you do not have time to write the code yourself but you’d like to examine it, feel free to e-mail me at shlomoe@jct.ac.il. I’ll be happy to e-mail the code to you.”

Pulse-Shaping Basics

Pulse shaping (i.e., base-band filtering) can vastly improve the behavior of wired or wireless communication links in an electrical system. With that in mind, Circuit Cellar columnist Robert Lacoste explains the advantages of filtering and examines Fourier transforms; random non-return-to-zero NRZ signaling; and low-pass, Gaussian, Nyquist, and raised-cosine filters.

Lacoste’s article, which appears in Circuit Cellar’s April 2014 issue, includes an abundance of graphic simulations created with Scilab Enterprises’s open-source software. The simulations will help readers grasp the details of pulse shaping, even if they aren’t math experts. (Note: You can download the Scilab source files Lacoste developed for his article from Circuit Cellar’s FTP site.)

Excerpts from Lacoste’s article below explain the importance of filtering and provide a closer look at low-pass filters:

WHY FILTERING?
I’ll begin with an example. Imagine you have a 1-Mbps continuous digital signal you need to transmit between two points. You don’t want to specifically encode these bits; you just want to transfer them one by one as they are.

Before transmission, you will need to transform the 1 and 0s into an actual analog signal any way you like. You can use a straightforward method. Simply define a pair of voltages (e.g., 0 and 5 V) and put 0 V on the line for a 0-level bit and put 5 V on the line for a 1-level bit.


This method is pedantically called non-return-to-zero (NRZ). This is exactly what a TTL UART is doing; there is nothing new here. This analog signal (i.e., the base-band signal) can then be sent through the transmission channel and received at the other end (see top image in Figure 1).


Note: In this article I am not considering any specific transmission channel. It could range from a simple pair of copper wires to elaborate wireless links using amplitude, frequency and/or phase modulation, power line modems, or even optical links. Everything I will discuss will basically be applicable to any kind of transmission as it is linked to the base-band signal encoding prior to any modulation.

Directly transmitting a raw digital signal, such as this 1-Mbps non-return-to-zero (NRZ) stream (at top), is a waste of bandwidth. b—Using a pulse-shaping filter (bottom) reduces the required bandwidth for the same bit rate, but with a risk of increased transmission errors.

Figure 1: Directly transmitting a raw digital signal, such as this 1-Mbps non-return-to-zero (NRZ) stream (top), is a waste of bandwidth. Using a pulse-shaping filter (bottom) reduces the required bandwidth for the same bit rate, but with a risk of increased transmission errors.


Now, what is the issue when using simple 0/5-V NRZ encoding? Bandwidth efficiency. You will use more megahertz than needed for your 1-Mbps signal transmission. This may not be an issue if the channel has plenty of extra capacity (e.g., if you are using a Category 6 1-Gbps-compliant shielded twisted pair cable to transmit these 1 Mbps over a couple of meters).


Unfortunately, in real life you will often need to optimize the bandwidth. This could be for cost reasons, for environmental concerns (e.g., EMC perturbations), for regulatory issues (e.g., RF channelization), or simply to increase the effective bit rate as much as possible for a given channel.


Therefore, a good engineering practice is to use just the required bandwidth through a pulse-shaping filter. This filter is fitted between your data source and the transmitter (see bottom of Figure 1).


The filter’s goal is to reduce as much as possible the occupied bandwidth of your base-band signal without affecting the system performance in terms of bit error rate. These may seem like contradictory requirements. How can you design such a filter? That’s what I will try to explain in this article….


LOW-PASS FILTERS

A base-band filter is needed between the binary signal source and the transmission media or modulator. But what characteristics should this filter include? It must attenuate as quickly as possible the unnecessary high frequencies. But it must also enable the receiver to decode the signal without errors, or more exactly without more errors than specified. You will need a low-pass filter to limit the high frequencies. As a first example, I used a classic Butterworth second-order filter with varying cut-off frequencies to make the simulation. Figure 2 shows the results. Let me explain the graphs.

Figure 2: This random non-return-to-zero (NRZ) signal (top row) was passed through a second-order Butterworth low-pass filter. When the cut-off frequency is low (310 kHz), the filtered signal (middle row) is distorted and the eye diagram is closed. With a higher cutoff (410 kHz, bottom row), the intersymbol interference (ISI) is lower but the frequency content is visible up to 2 MHz.

Figure 2: This random non-return-to-zero (NRZ) signal (top row) was passed through a second-order Butterworth low-pass filter. When the cut-off frequency is low (310 kHz), the filtered signal (middle row) is distorted and the eye diagram is closed. With a higher cutoff (410 kHz, bottom row), the intersymbol interference (ISI) is lower but the frequency content is visible up to 2 MHz.

The leftmost column shows the signal frequency spectrum after filtering with the filter frequency response in red as a reference. The middle column shows a couple of bits of the filtered signal (i.e., in the time domain), as if you were using an oscilloscope. Last, the rightmost column shows the received signal’s so-called “eye pattern.” This may seem impressive, but the concept is very simple.

Imagine you have an oscilloscope. Trigger it on any rising or falling front of the signal, scale the display to show one bit time in the middle of the screen, and accumulate plenty of random bits on the screen. You’ve got the eye diagram. It provides a visual representation of the difficulty the receiver will have to recover the bits. The more “open” the eye, the easier it is. Moreover, if the successive bits’ trajectories don’t superpose to each other, there is a kind of memory effect. The voltage for a given bit varies depending on the previously transmitted bits. This phenomenon is called intersymbol interference (ISI) and it makes life significantly more difficult for decoding.


Take another look at the Butterworth filter simulations. The first line is the unfiltered signal as a reference (see Figure 2, top row). The second line with a 3-dB, 310-kHz cut-off frequency shows a frequency spectrum significantly reduced after 1 MHz but with a high level of ISI. The eye diagram is nearly closed (see Figure 2, middle row). The third line shows the result with a 410-kHz Butterworth low-pass filter (see Figure 2, bottom row). Its ISI is significantly lower, even if it is still visible. (The successive spot trajectories don’t pass through the same single point.) Anyway, the frequency spectrum is far cleaner than the raw signal, at least from 2 MHz.

Lacoste’s article serves as solid introduction to the broad subject of pulse-shaping. And it concludes by re-emphasizing a few important points and additional resources for readers:

Transmitting a raw digital signal on any medium is a waste of bandwidth. A filter can drastically improve the performance. However, this filter must be well designed to minimize intersymbol interference.

The ideal solution, namely the Nyquist filter, enables you to restrict the used spectrum to half the transmitted bit rate. However, this filter is just a mathematician’s dream. Raised cosine filters and Gaussian filters are two classes of real-life filters that can provide an adequate complexity vs performance ratio.

At least you will no longer be surprised if you see references to such filters in electronic parts’ datasheets. As an example, see Figure 3, which is a block diagram of Analog Devices’s ADF7021 high-performance RF transceiver.

This is a block diagram of Analog Devices’s ADF7021 high-performance transceiver. On the bottom right there is a “Gaussian/raised cosine filter” block, which is a key factor in efficient RF bandwidth usage.

Figure 3: This is a block diagram of Analog Devices’s ADF7021 high-performance transceiver. On the bottom right there is a “Gaussian/raised cosine filter” block, which is a key factor in efficient RF bandwidth usage.

The subject is not easy and can be easily misunderstood. I hope this article will encourage you to learn more about the subject. Bernard Sklar’s book Digital Communications: Fundamentals and Applications is a good reference. Playing with simulations is also a good way to understand, so don’t hesitate to read and modify the Scilab examples I provided for you on Circuit Cellar’s FTP site.  

Lacoste’s full article is in the April issue, now available for membership download or single issue purchase. And for more information about improving the efficiency of wireless communication links, check out Lacoste’s 2011 article “Line-Coding Techniques,” Circuit Cellar 255, which tells you how you can encode your bits before transmission.