Microchip Launched Two New MCU Families

Microchip Technology has made available its new SAM D5x and SAM E5x microcontroller (MCU) families. These new 32-bit MCU families offer extensive connectivity interfaces, high performance and robust hardware-based security for a wide variety of applications. The SAM D5/E5 MCUs combine the performance of an ARM Cortex-M4 processor with a Floating Point Unit (FPU). This combination offloads the Central Processing Unit (CPU), increasing system efficiency and enabling process-intensive applications on a low-power platform.

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Running at up to 120 MHz, the D5x and E5x MCUs feature up to 1 MB of dual-panel Flash with Error Correction Code (ECC), easily enabling live updates with no interruption to the running system. Additionally, these families are available with up to 256 KB of SRAM with ECC, vital to mission-critical applications such as medical devices or server systems.

These new MCUs have multiple interfaces that provide design flexibility for even the most demanding connectivity needs. Both families include a Quad Serial Peripheral Interface (QSPI) with an Execute in Place (XIP) feature. This allows the system to use high-performance serial Flash memories, which are both small and inexpensive compared to traditional pin parallel Flash, for external memory needs.

The SAM D5/E5 devices also feature a Secure Digital Host Controller (SDHC) for data logging, a Peripheral Touch Controller (PTC) for capacitive touch capabilities and best-in-class active power performance (65 microA/MHz) for applications requiring power efficiency. Additionally, the SAM E5 family includes two CAN-FD ports and a 10/100 Mbps Ethernet Media Access Controller (MAC) with IEEE 1588 support, making it well-suited for industrial automation, connected home and other Internet of Things (IoT) applications.

Both the SAM D5x and E5x families contain comprehensive cryptographic hardware and software support, enabling developers to incorporate security measures at a design’s inception. Hardware-based security features include a Public Key Cryptographic Controller (PUKCC) supporting Elliptic Curve Cryptography (ECC) and RSA schemes as well as an Advanced Encryption Standard (AES) cipher and Secure Hash Algorithms (SHA).

The SAM E54 Xplained Pro Evaluation Kit is available to kick-start development. The kit incorporates an on-board debugger, as well as additional peripherals, to further ease the design process. All SAM D5x/E5x MCUs are supported by the Atmel Studio 7 Integrated Development Environment (IDE) as well as Atmel START, a free online tool to configure peripherals and software that accelerates development. SAM D5x and SAM E5x devices are available today in a variety of pin counts and package options in volume production quantities. Devices in the SAM D5/E5 series are available starting at $2.43 each in 10,000 unit quantities. The SAM E54 Xplained Pro Evaluation Kit is available for $84.99 each.

Microchip | www.microchip.com

Reliability and Failure Prediction: A New Take

HALT methodology has been a popular way to test harsh environment reliability. A new approach involves PCB design simulation for vibration and acceleration for deeper yet faster analyses.

By Craig Armenti & Dave Wiens—Mentor Board Systems Division

Many electronic products today are required to operate under significant environmental stress for countless hours. The need to design a reliable product is not a new concept, however, the days of depending on a product’s “made in” label as an indicator of reliability are long gone. PCB designers now realize the importance of capturing the physical constraints and fatigue issues for a design prior to manufacturing to reduce board failure and improve product quality.

Simulation results should be available in a two-phase post-processor for each simulation, providing broad input on the PCB’s behavior under the defined conditions.

Simulation results should be available in a two-phase post-processor for each simulation, providing broad input on the PCB’s behavior under the defined conditions.

Although every product is expected to fail at some point. That’s inevitable. But premature failures can be mitigated through proper design when proper attention is paid to potential issues due to vibration and acceleration. ….

Read this article in the August 325 issue of Circuit Cellar

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Power Analysis of a Software DES Encryption Routine

This article continues the foray into breaking software security routines, now targeting a software implementation of DES. This builds on a previous example of breaking a hardware AES example.

By Colin O’Flynn

In the previous column, I broke a simple XOR password check using side-channel power analysis. How can we apply this to more complex algorithms though? In my Circuit   Cellar   313   (August   2016) story, I demonstrated how to break the AES encryption standard running on a FPGA.

The EFF’s “Deep Crack” board could brute force a DES key in a matter of days. (Photo courtesy of Electronic Frontier Foundation)

The EFF’s “Deep Crack” board could brute force a DES key in a matter of days. (Photo courtesy of Electronic Frontier Foundation)

While I originally considered breaking a software implementation of AES in this column, there was just too much overlap between those columns. So instead I decided to pick on something new. This time, I’ll cover how we can break a software implementation of DES. The actual process ends up being very similar. But by using a different algorithm, it might help give you a bit of perspective on how the underlying  attack  works.  ….

Read this article in the August 325 issue of Circuit Cellar

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CC266: Microcontroller-Based Data Management

Regardless of your area of embedded design or programming expertise, you have one thing in common with every electronics designer, programmer, and engineering student across the globe: almost everything you do relates to data. Each workday, you busy yourself with acquiring data, transmitting it, repackaging it, compressing it, securing it, sharing it, storing it, analyzing it, converting it, deleting it, decoding it, quantifying it, graphing it, and more. I could go on, but I won’t. The idea is clear: manipulating and controlling data in its many forms is essential to everything you do.

The ubiquitous importance of data is what makes Circuit Cellar’s Data Acquisition issue one of the most popular each year. And since you’re always seeking innovative ways to obtain, secure, and transmit data, we consider it our duty to deliver you a wide variety of content on these topics. The September 2012 issue (Circuit Cellar 266) features both data acquisition system designs and tips relating to control and data management.

On page 18, Brian Beard explains how he planned and built a microcontroller-based environmental data logger. The system can sense and record relative light intensity, barometric pressure, relative humidity, and more.

a: This is the environmental data logger’s (EDL) circuit board. b: This is the back of the EDL.

Data acquisition has been an important theme for engineering instructor Miguel Sánchez, who since 2005 has published six articles in Circuit Cellar about projects such as a digital video recorder (Circuit Cellar 174), “teleporting” serial communications via the ’Net (Circuit Cellar 193), and a creative DIY image-processing system (Circuit Cellar 263). An informative interview with Miguel begins on page 28.

Turn to page 38 for an informative article about how to build a compact acceleration data acquisition system. Mark Csele covers everything you need to know from basic physics to system design to acceleration testing.

This is the complete portable accelerometer design. with the serial download adapter. The adapter is installed only when downloading data to a PC and mates with an eight pin connector on the PCB. The rear of the unit features three powerful
rare-earth magnets that enable it to be attached to a vehicle.

In “Hardware-Accelerated Encryption,” Patrick Schaumont describes a hardware accelerator for data encryption (p. 48). He details the advanced encryption standard (AES) and encourages you to consider working with an FPGA.

This is the embedded processor design flow with FPGA. a: A C program is compiled for a softcore CPU, which is configured in an FPGA. b: To accelerate this C program, it is partitioned into a part for the software CPU, and a part that will be implemented as a hardware accelerator. The softcore CPU is configured together with the hardware accelerator in the FPGA.

Are you now ready to start a new data acquisition project? If so, read George Novacek’s article “Project Configuration Control” (p. 58), George Martin’s article “Software & Design File Organization” (p. 62), and Jeff Bachiochi’s article “Flowcharting Made Simple” (p. 66) before hitting your workbench. You’ll find their tips on project organization, planning, and implementation useful and immediately applicable.

Lastly, on behalf of the entire Circuit Cellar/Elektor team, I congratulate the winners of the DesignSpark chipKIT Challenge. Turn to page 32 to learn about Dean Boman’s First Prize-winning energy-monitoring system, as well as the other exceptional projects that placed at the top. The complete projects (abstracts, photos, schematic, and code) for all the winning entries are posted on the DesignSpark chipKIT Challenge website.