Microchip PICs with Integrated Crypto Engine

Anticipating the need for secure communications for the next level of device connectivity, Microchip Technology has integrated a complete hardware crypto engine into its PIC24F family of microcontrollers. Computers normally use software routines to carry out data encryption number crunching, but for low-power microcontrollers, this method will generally use up too much of the processor’s resources and be too slow.microchipPIC24FGB2

Microchip has integrated several security features into the PIC24F family of microcontrollers (identified by its “GB2″ suffix) to protect embedded data. The fully featured hardware crypto engine supports the AES, DES and 3DES standards to reduce software overhead, lower-power consumption, and enable faster throughput. A Random Number Generator is also implemented that can be used to create random keys for data encryption, decryption, and authentication to provide a high level of security. For additional protection, the one-time-programmable (OTP) key storage prevents the encryption key from being read or overwritten.

These security features increase the integrity of embedded data without sacrificing power consumption. With XLP technology, the “GB2” family achieves 180-µA/MHz run currents and 18-nA sleep currents for long battery life in portable applications.

[via Elektor]

8-Bit Microcontroller IP Core

DigitalCoreDesignThe DF6808 IP core is binary-compatible with the industry-standard Motorola 68HC08 8-bit microcontroller. The IP core uses sophisticated on-chip peripheral capabilities to perform 45 to 100 million instructions per second. FAST architecture implemented in DF6808 enables the 68HC08 microcontroller to run at least three times faster than the original solution.

The DF6808’s 16-bit, free-running timer system has two input-capture lines and two output-compare lines. The IP core is equipped with proprietary safety functions, including self-monitoring circuitry, which helps protect against system errors; the computer operating properly (COP) watchdog system, which protects against software failures; and an illegal opcode detection circuit, which provides a non-maskable interrupt if an illegal opcode occurs.

For power conservation, the IP core includes two software-controlled power-saving modes (Wait and Stop). These modes make the DF6808 IP core well suited for automotive and battery-driven applications.

The DF6808 includes the DoCDTM real-time hardware debugger, which provides built-in support for Digital Core Design’s hardware debug system and the debugging capability of an entire system-on-a-chip (SoC). The DoCDTM enables nonintrusive debugging of running applications. It can halt, run, step into, or skip an instruction and read/write any microcontroller contents, including all registers, user-defined peripherals, data, and program memories.

Contact Digital Core Design for pricing.

Digital Core Design
www.dcd.pl