Tool Environment Upgrade Boosts Efficiency of Multi-Board PCB Designs

The latest release of Zuken’s system-level PCB design environment, CR-8000, includes several enhancements aimed at ensuring performance, quality and manufacturability. The CR-8000 family of applications spans the complete PCB engineering lifecycle: from system level planning through implementation and design for manufacturability. The CR-8000 environment also supports 3D IC packaging and chip/package/board co-design.

The focus of CR-8000 2018 is on enabling efficient front-loading of design constraints and specifications to the design creation process, coupled with sophisticated placement and routing capabilities for physical layout. This will increase efficiency and ensure quality through streamlined collaboration across the PCB design chain.
Front-loading of design intent from Design Gateway to Design Force has been achieved by adding an enhanced, unified constraint browser for both applications. This enables hardware engineers to assign topology templates, modify differential signals and assign clearance classes to individual signals. Using a rule stack editor during the circuit design phase, hardware engineers can now load design rules that include differential pair routing and routing width stacks directly from the design rule library into their schematic. Here they can modify and assign selected rules for improved cross talk and differential pair control. Finally, an enhanced component browser enables component variants to be managed in the schematic, and assigned in a user-friendly table.

Manual routing is supported by a new auto complete & route function that layout designers can use to complete manually routed traces in an automated way. Designers also have the option to look for paths on different layers while automatically inserting vias.

A new bus routing function allows layout designers to sketch paths for multiple nets to be routed over dense areas. An added benefit is the routing of individual signals to the correct signal length as per the hardware engineer’s front loaded constraints, to meet timing skew and budgets. If modifications to fully placed and routed boards are required, an automatic re-route function allows connected component pins to remain connected with a simple reroute operation during the move process. In all operations, clearance and signal length specifications are automatically controlled and adjusted by powerful algorithms.

To address manufacturing requirements for high-speed design, the automatic stitching of vias in poured conductive areas can be specified in comprehensive detail, for example, inside area online, perimeter outline or both inside and perimeter. Design-for-manufacturing (DFM) has been enhanced to include checks for non-conductor items, such as silkscreen and assembly drawing placed reference designators. A design rule check will make sure component reference designators are listed in the same order as the parts for visual inspection accuracy.

As many product engineers do not work with EDA tools, intelligent PDF documentation is required, especially in 3D. Design Force now supports creation of PRC files commonly used for 3D printing. The PRC files can be opened in PDF authoring applications such as Adobe Acrobat, where they are realized as a 3D PDF file complete with 3D models and bookmarks to browse the design.

Zuken Americas |

2017 FloTHERM Award Winners

Mentor has announced its winners for the inaugural annual FloTHERM ΔTJ Award for Excellence in Electronics Thermal Design. For over 30 years, the FloTHERM solution has been the de facto computational fluid dynamics (CFD) solution for electronics cooling. The FloTHERM product provides tight connectivity with electronic design automation (EDA) and mechanical design automation (MDA) development process flows, and is used to predict airflow, temperature, and heat transfer in components, boards and complete systems.

FloTHERM ΔTJ Award winners were required to demonstrate an application using the FloTHERM technology (including FloTHERM XT, FloTHERM PCB or FloTHERM IC) to successfully address a design problem. This included a return on investment (ROI) improvement due to quantifiable use of CFD technology.

First Place Winners of the 2017 Mentor FloTHERM ΔTJ Award: Gong Yue Tang, Yong Han, Boon Long Lau, Xiaowu Zhang, and Daniel Min Woo Rhee,

First Place Winners of the 2017 Mentor FloTHERM ΔTJ Award: Gong Yue Tang, Yong Han, Boon Long Lau, Xiaowu Zhang, and Daniel Min Woo Rhee,

The first place award winner is the team from the Institute of Microelectronics (IME), Agency of Science, Technology and Research in Singapore. The team comprising Gong Yue Tang, Yong Han, Boon Long Lau, Xiaowu Zhang, and Daniel Min Woo Rhee, received a trophy for their paper, Development of a Compact and Efficient Liquid Cooling System with Silicon Micro-cooler for High-Power Microelectronic Devices. The team also received a $1,000 Amazon gift card, which they have donated to the Singapore Children’s Society.

“Microchannel based liquid cooling and thermal management technology has been used to develop the compact and efficient cooling system for high power electronics systems,” stated Gong Yue Tang. “Through the thermal modelling and simulations, FloTHERM has been demonstrated as a fast and cost-effective thermal design tool to evaluate and optimize the thermal performance of the liquid cooling system proposed in this study.”

Two runners-up were also selected. Hugo Ljunggren Falk, KTH School of Industrial Engineering and Management in Sweden received a $500 gift card for his paper, Thermal Management in an IR-Camera. And Gabriel Ciobanu from Continental Corporation in Romania also received the same for his paper, co-written with Boris Marovic from Mentor, entitled The Fundamentals of Improving PCB Thermal Design.

For more information on the FloTHERM 2017 award winners, visit the website:

Mentor, a Siemens business |

New Version of Altium Designer Previewed

Altium has completed an exclusive preview tour of its Altium Designer 18 at a series of upcoming global PCB design conferences. Altium Designer continues its focus on delivering new, easy-to-use and productivity enhancing PCB design tools as part of a single, unified application. Leveraging feedback and suggestions from the design community, Altium Designer 18 features capability updates and performance optimizations to significantly enhance user experience and productivity. In addition to the easy-to-use, modernized user interface, Altium Designer 18 will also feature a much anticipated upgrade to 64-bit architecture and multi-threading for greater stability, speed, and functionality. These updates will allow designers to increase their design speed and task execution, and also provide more flexibility and control, simplifying the overall design process.

Fast and High-Quality RoutingThe Altium Designer 18 release significantly enhances user experience and productivity with a modern interface to simplify the design experience and enable unprecedented performance optimization, aided by 64-Bit architecture and multi-threading for greater stability, speed, and functionality during PCB design.

Connectivity management and enhanced 3D engine allows you to render design models and multi-board assemblies – faster and with better shading and realism. Real-time BOM management in Altium Design 18 links the latest supplier part information to the BOM, enabling users to make educated design decisions on their own timeline. A new, cohesive user interface provides a fresh and intuitive environment, and optimizations that enable unparalleled visualization of your design workflow. Fast and high-quality routing is provided by visual Constraints and user-guided automation. These enable you to route complex topologies across layers. In other words, it routes at the speed of a computer, but the quality of a human.

Altium |