June 2005, Issue 179

Accurate Capacitance Meter
Cypress PSoC High Integration Challenge 2004 Contest Winner

NORMAL OPERATION

We wrote the software in C language using the PSoC Designer V.4.1 environment. The blocks are initialized after power-up. All parameters except V_REF are set to predefined defaults. V_REF is then calibrated. This completes the initialization procedure and the normal measuring cycle begins.

If the capacitor’s voltage is higher than V_LOW, the CurSet DAC is programmed to discharge C_X. After the voltage drops below V_LOW, Timer32 resets and the CurSet DAC is set to charge the capacitor. When V_HIGH (COMP1) switches to logic 1, Timer32 is read and the capacitance is calculated and stored in the capup variable. The procedure then reverses and another measurement is taken. Timer32 is reset and CurSet is programmed to discharge C_X. When the voltage across the capacitor drops below V_LOW, another C_X value is calculated and stored in the capdown variable.

The average of capup and capdown is displayed on the top row of the LCD. On the bottom row is a running average of values that are considered accurate enough. It’s ignored if the current value differs from the running average by more than 10% in either direction.

When a capacitor isn’t attached, the device measures the parasite capacity of the circuit, board, and connectors. After an actual measurement, this value is subtracted from the calculated value of C_X. The device indicates a detached capacitor and holds the last average value on the LCD.