EE Challenge Answers & Winners (Technologic Systems)

We thank everyone for participating in the monthly Electrical Engineering Challenge sponsored by Technologic Systems. Below are the winners for each month’s challenge.


September 2016

Answer:

  • The output of the OR gate, which is really being used as an active-low AND gate, goes low when the output port is selected, but the data latch requires an active-high enable signal. The OR gate should be a NOR gate (‘LS02). An alternate solution would be to change the ‘LS373 to ‘LS374, but this would change the functionality of the circuit somewhat.Challenge 6 Sept Web Answer

Winners:

  • David Bishop (California, USA) – TS-7250-V2 SBC
  • Roberto Campari (Cremona, Italy) – 1-Year Circuit Cellar Digital Subscription
  • Murdock Taylor (North Carolina, USA) – Circuit Cellar Webshop 30% Discount
  • Bernard Duchaine (Quebec, Canada) – Circuit Cellar Webshop 30% Discount
  • Jeff Verive (Illinois, USA) – Circuit Cellar Webshop 30% Discount
  • Jose Orcajo (Barcelona, Spain) – Circuit Cellar Webshop 30% Discount
  • Sally Jelfs (Northants, UK) – Circuit Cellar Webshop 30% Discount

August 2016

Answer:

  • The error is that the value of R1 is too high. Like many power MOSFETs, M1 has an absolute maximum Vgs of ±20 V. However, with 1 mA flowing through R1, it will have about 47 V across it. R1 should be reduced to 10 kΩ.Challenge 5 August Answer

Winners:

  • David Huddart (Bristol, United Kingdom) – TS-7250-V2 SBC
  • Helge Fabricius-Hansen (Staffanstorp, Sweden) – 1-Year Circuit Cellar Digital Subscription
  • David Ciaffa (New Jersey, USA) – Circuit Cellar Webshop 30% Discount
  • Luis Miguel Perez (Vizcaya, Spain) – Circuit Cellar Webshop 30% Discount
  • John Whitmore (Washington, USA) – Circuit Cellar Webshop 30% Discount
  • Donald Peinetti (Alabama, USA) – Circuit Cellar Webshop 30% Discount
  • Jon West (New South Wales, Australia) – Circuit Cellar Webshop 30% Discount

July 2016

Answer:

  • There should be a diode in series with Q8’s emitter. Without it, Q8 does not cut off completely when Q6 and Q7 are on. The diode provides a voltage offset that raises the effective threshold voltage for Q8.Challenge 4 July ANSWER for web

Winners:

  • David Lammert (Missouri, USA) – TS-7250-V2 SBC
  • Angie Tetera (Louisiana, USA) – 1-Year Circuit Cellar Digital Subscription

June 2016

Answer:

  • The VDD (pin 2) and VSS (pin 1) connections on the LCD display are reversed.Challenge 3 June Answer

Winners:

  • John Portsmouth (Essex, UK) – TS-7250-V2 SBC
  • Bruno Ferreira (Pombal, Portugal) – 1-Year Circuit Cellar Digital Subscription

May 2016 

Answer:

  • The 2N7002 is an N-channel FET. Q1 is shown as a P-channel FET.Challenge 2 Answer

Winners:

  • Greg Peek (Oregon, USA) – TS-7250-V2 SBC
  • Heinz Ullrich (Niedersachsen, Germany) – 1-Year Circuit Cellar Digital Subscription

April 2016 

Answer:

  • The LED LD4 is backwardsApril 2016 Answer

Winners:

  • Joe Pedigo (Texas, USA) – TS-7250-V2 SBC
  • Damien Cahill (Victoria, Australia) – 1-Year Circuit Cellar Digital Subscription