Keysight Technologies recently announced the availability of a frequency domain analysis (FDA) option, a user-extensible spectrum frequency domain analysis application solution for real-time oscilloscopes.
Source: Keysight Technologies
The FDA option extends the capabilities of Keysight Infiniium and InfiniiVision Series oscilloscopes by enabling you to acquire live signals from the oscilloscope and visualize them in the frequency domain, as well as make key frequency domain measurements.
Option N8832A-001 includes the application, the application source code for user extensibility, and MATLAB software. These tools enable you to extend an application’s capabilities to meet their current and future testing needs.
With the FDA application, you can address a variety of FDA challenges such as:
- Power spectral density (PSD) and spectrogram visualization
- Frequency domain measurements in an application including relevant peaks in the PSD and measurements such as occupied bandwidth, SNR, total harmonic distortion (THD ), spurious free dynamic range (SFDR), and frequency error
- Oscilloscope configuration through the application to allow for repeatable instrument configuration and measurements; optionally includes additional SCPI commands for more advanced instrument setup
- Insertion of additional custom signal processing commands prior to frequency domain visualization, as needed, for more advanced analysis insight
- Live or post-acquisition analysis of time-domain data in MATLAB software
Source: Keysight Technologies
While testing a project, something strange happened (see the nearby image). The terminal showed nonsense, but the logic analyzer properly displayed “Elektor” in ASCII. The latter also indicated that the UART was operating at 4800 baud instead of the 19200 baud that I had programmed (at least that’s what I thought), a difference with a factor of four. The change I had made in my code was a fourfold increase in the clock speed of the dsPIC. The conclusion I had to arrive at is that the clock speed was not being changed. But why not?
Source: Raymond Vermeulen (Elektor, October 2011)
The inspiration came, and where else, in the shower. In a hobby project, I had used an ATmega32u4 with a bootloader whose only limitation was being unable to program the fuse bits. “That’s not going to be…” I was thinking. But yes, the bootloader I used in my dsPIC cannot program the configuration bits either. Experienced programmers would have realized that long ago, but we all have our off-days. (The solution is to use a “real” programmer, such as the ICD3).—By Raymond Vermeulen (Elektor Labs, Elektor, October 2011)
Analog Devices recently announced a software-defined radio (SDR) rapid prototyping kit with dual 2 x 2 AD9361 RF transceivers to simplify and rapidly prototype 4 × 4 MIMO wireless transceiver applications on the Xilinx Zynq-7000 all-programmable SoC development platforms. The AD-FMCOMMS5-EBZ rapid prototyping kit provides a hardware/software ecosystem solution addressing the challenges of SDR transceiver synchronization experienced by RF and analog designers when implementing systems using MIMO architectures. A webinar is available on how to synchronize multiple RF transceivers in high-channel density applications.
Source: Analog Devices
The AD-FMCOMMS5-EBZ rapid prototyping kit includes the following:
- An FPGA mezzanine card (FMC) featuring two of Analog AD9361 2 x 2 RF transceivers and support circuitry
- Reference designs
- Design and simulation tools for MathWorks
- HDL (hardware description language) code
- Device drivers for Zynq-7000 All Programmable SoCs
- Online support at ADI’s EngineerZone for rapid prototyping to reduce development time and risk.
The AD-FMCOMMS5-EBZ rapid prototyping kit is the fifth SDR rapid prototyping kit ADI has introduced in the last year to help customers address the global SDR market. SDR MIMO applications range from defense electronics and RF instrumentation to communications infrastructure and include active antennas, transmit beamforming, receive angle of arrival systems, and open-source SDR development projects.
The AD9361 operates over a frequency range of 70 MHz to 6 GHz. It is a complete radio design that combines multiple functions, including an RF front end, mixed-signal baseband section, frequency synthesizers, two analog-to-digital converters and two direct conversion receivers in a single chip. The AD9361 supports channel bandwidth from less than 200 kHz to 56 MHz, and is highly programmable, offering the widest dynamic range available in the market today with state-of-the-art noise figure and linearity.
Source: Analog Devices
Parallax released its source code design files for the Propeller 1 (P8X32A) multicore microcontroller at the DEFCON 22 Conference in Las Vegas, where the chip was also featured on the conference’s electronic badge. Parallax managers said they anticipate the release will inspire developers. Hobbyists, engineers, and students can now view and modify the Propeller Verilog design files by loading them into low-cost field programmable gate array (FPGA) development boards. The design was released under the GNU General Public License v3.0.
With the chip’s source code now available, any developer can discover what they need to know about the design. The open release provides a way for developers who have requested more pins, memory, or other architectural improvements to make their own version to run on an FPGA. Universities who have requested access to the design files for their engineering programs will now have them.
The Propeller multicore microcontroller is used in developing technologies where multiple sensors, user interface systems, and output devices such as motors must be managed simultaneously. Some primary applications for Parallax’s chip include flight controllers in UAVs, 3-D printing, solar monitoring systems, environmental data collection, theatrical lighting and sound control, and medical devices.
For more information on Parallax’s open source release of the Propeller P8X32A, visit www.parallax.com.
To add to its growing family of voltage regulator solutions, Linear Technology recently announced the LT3061, a high-voltage, low-noise, low-dropout voltage linear regulator with active output discharge. The device can deliver up to 100 mA of continuous output current with a 250-mV dropout voltage at full load. The LT3061 features an NMOS pull-down that discharges the output when SHDN or IN is driven low. This rapid output discharge is useful for applications requiring power conditioning on both start-up and shutdown (e.g., high-end imaging sensors).
Source: Linear Technology
A single external capacitor provides programmable low noise reference performance and output soft-start functionality. The LT3061 has a quiescent current of 45 μA and provides fast transient response with a minimum 3.3-μF output capacitor. In shutdown, the quiescent current is less than 3 μA and the reference soft-start capacitor is reset.
Its main features include:
- Wide 1.6 V to 45 V input voltage range.
- Adjustable output voltages from 0.6 V to 19 V.
- Ultralow noise operation of 30 µVRMS across a 10 Hz to 100 kHz bandwidth.
- Low quiescent current of 45 µA (operating) and < 2 µA (in shutdown).
The LT3061 is available as an adjustable device with an output voltage range from the 600-mV reference up to 19 V. The chip is supplied in a thermally enhanced eight-lead 2 mm × 3 mm DFN and MSOP outline. For more information visit www.linear.com