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Flowcode 7 (Part 2): Displays in Flowcode (Sponsor: Matrix)

In the first part of this series, you were introduced to Flowcode 7, a flowchart-driven electronic IDE that enables you to produce hex code for more than 1,300 different microcontrollers, including PIC8, PIC16, PIC32, AVR, Arduino, and ARM. In the second free article in this series, embedded engineer Ben Rowland gets you working with displays in Flowcode. He covers: communicating with displays, code and display porting, a bitmap drawer component, and more.

A maze generation algorithm being tested using a graphical LCD and the Flowcode simulation.

A maze generation algorithm being tested using a graphical LCD and the Flowcode simulation.

Want a Free Trial and/or Buy Flowcode 7? Download Now

Flowcode is an IDE for electronic and electromechanical system development. Pro engineers, electronics enthusiasts, and academics can use Flowcode to develop systems for control and measurement based on microcontrollers or on rugged industrial interfaces using Windows-compatible personal computers. Visit www.flowcode.co.uk/circuitcellar to learn about Flowcode 7. You can access a free version, or you can purchase advanced features and professional Flowcode licenses through the modular licensing system. If you make a purchase through that page, Circuit Cellar will receive a commission.

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New ARM Technologies for Secure IoT Applications

ARM recently released a new product suite of technologies for designers of secure Internet of Things (IoT) applications.The product suite comprises procesors, cloud-based services platform, radio technology, subsystems, and comprehensive security.

Cortex-M Processors Integrated with TrustZone

The ARM Cortex-M23 and Cortex-M33 are built on the ARMv8-M architecture featuring ARM TrustZone security and digital signal processing. TrustZone CryptoCell-312 offers security features that protect the authenticity, integrity, and confidentiality of code and data. The Cortex-M23 is a compact, energy-efficient processor well-suited for constrained embedded applications. The highly configurable Cortex-M33 features a variety options including a coprocessor interface, digital signal processing and floating-point computation. Both new Cortex-M processors are backwards compatible with ARMv6-M and ARMv7-M architectures.

ARM System IP Optimized for Cortex-M Processors

ARM CoreLink SIE-200 is already licensed by ARM silicon partners and provides the interconnects and controllers that extend TrustZone to the system. The ARM CoreLink SSE-200 IoT subsystem reduces time to market by integrating Cortex-M33, CryptoCell, and Cordio radio along with software drivers, secure libraries, protocol stack, and the mbed OS.

IoT Connectivity

Connectivity is enhanced by next-generation ARM Cordio radio IP with Bluetooth 5 and 802.15.4-based standards ZigBee and Thread. Developers can choose from a standard radio implementation across a range of process nodes from multiple foundries. The Cordio architecture supports ARM and third-party RF.

Cloud-Based SaaS for Secure IoT Device Management

The ARM mbed IoT Device Platform has been expanded to include mbed Cloud, a new standards and cloud-based SaaS solution for secure IoT device management. Through mbed Cloud, OEMs can:

Simplify connection, provisioning, updating and securing of devices across complex networks
Enable faster scaling, productivity and time to market, allowing developers to use any device on any cloud
Enhance device-side capabilities with mbed OS 5, supported by a global community of 200,000 developers and more than 1 million device builds per month.

Implementation with IoT POP on TSMC 40ULP

Designers can quicken the development of SoCs featuring the latest Cortex-M processors with Artisan IoT POP IP now available for TSMC 40ULP process technology. ARM Artisan IoT POP IP enables low-power designs and optimizing for IoT applications.

Source: ARM 

The Future of Ultra-Low Power Signal Processing

One of my favorite quotes comes from the IEEE Signal Processing magazine in 2010. They attempted to answer the question: What does ultra-low power consumption mean? And they came to the conclusion that it is where the “power source lasts longer than the useful life of the product.”[1] It’s a great answer because it’s scalable. It applies equally to signal processing circuitry inside an embedded IoT device that can never be accessed or recharged and to signal processing inside a car where the petrol for the engine dominates the operating lifetime, not the signal processing power. It also describes exactly what a lot of science fiction has always envisioned: no changing or recharging of batteries, which people forget to do or never have enough batteries for. Rather, we have devices that simply always work.Figure 1

My research focuses on healthcare applications and creating “wearable algorithms”—that is, signal processing implementations that fit within the very small power budgets available in wearable devices. Historically, this focused on data reduction to save power. It’s well known that wireless data transmission is very power intensive. By using some power to reduce the amount of data that has to be sent, it’s possible to save lots of power in the wireless transmission stage and so to increase the overall battery lifetime.

This argument has been known for a long time. There are papers dating back to at least the 1990s based on it. It’s also readily achievable. Inevitably, it depends on the precise situation, but we showed in 2014 that the power consumption of a wireless sensor node could be brought down to the level of a node without a wireless transmitter (one that uses local flash memory) using easily available, easy-to-use, off-the-shelf-devices.[2]

This essay appears in Circuit Cellar 316, November 2016. Subscribe to Circuit Cellar to read project articles, essays, interviews, and tutorials every month!

Today, there are many additional benefits that are being enabled by the emerging use of ultra-low power signal processing embedded in the wearable itself, and these new applications are driving the research challenges: increased device functionality; minimized system latency; reliable, robust operation over unreliable wireless links; reduction in the amount of data to be analyzed offline; better quality recordings (e.g., with motion artifact removal to prevent signal saturations); new closed-loop recording—stimulation devices; and real-time data redaction for privacy, ensuring personal data never leaves the wearable.

It’s these last two that are the focus for my research now. They’re really important for enabling new “bioelectronic” medical devices which apply electrical stimulation as an alternative to classical pharmacological treatments. These “bioelectronics” will be fully data-driven, analyzing physiological measurements in real-time and using this to decide when to optimally trigger an intervention. Doing such as analysis on a wearable sensor node though requires ultra-low power signal processing that has all of the feature extraction and signal classification operating within a power budget of a few 100 µW or less.

To achieve this, most works do not use any specific software platform. Instead they achieve very low-power consumption by using only dedicated and highly customized hardware circuits. While there are many different approaches to realizing low-power fully custom electronics, for the hardware, the design trends are reasonably established: very low supply voltages, typically in the 0.5 to 1 V range; highly simplified circuit architectures, where a small reduction in processing accuracy leads to substantial power savings; and the use of extensive analogue processing in the very lowest power consumption circuits.[3]

Less well established are the signal processing functions for ultra-low power. Focusing on feature extractions, our 2015 review highlighted that the majority (more than half) of wearable algorithms created to date are based upon frequency information, with wavelet transforms being particularly popular.[4] This indicates a potential over-reliance on time–frequency decompositions as the best algorithmic starting points. It seems unlikely that time–frequency decompositions would provide the best, or even suitable, feature extraction across all signal types and all potential applications. There is a clear opportunity for creating wearable algorithms that are based on other feature extraction methods, such as the fractal dimension or Empirical Mode Decomposition.

Investigating this requires studying the three-way trade-off between algorithm performance (e.g., correct detections), algorithm cost (e.g., false detections), and power consumption. We know how to design signal processing algorithms, and we know how to design ultra-low power circuitry. However, combining the two opens many new degrees of freedom in the design space, and there are many opportunities and work to do in mapping feature extractions and classifiers into sub-1-V power supply dedicated hardware.


[1] G. Frantz, et al, “Ultra-low power signal processing,” IEEE Signal Processing Magazine, vol. 27, no. 2, 2010.
[2] S. A. Imtiaz, A. J. Casson, and E. Rodriguez-Villegas, “Compression in Wearable Sensor Nodes,” IEEE Transactions on Biomedical Engineering, vol. 61, no. 4, 2014.
[3] A. J. Casson, et al, “Wearable Algorithms,” in E. Sazonov and M. R. Neuman (eds.), Wearable Sensors, Elsevier, 2014.
[4] A. J. Casson, “Opportunities and Challenges for Ultra Low Power Signal Processing in Wearable Healthcare,” 23rd European Signal Processing Conference, Nice, 2015.


Alex Casson is a lecturer in the Sensing, Imaging, and Signal Processing Department at the University of Manchester. His research focuses on creating next-generation human body sensors, developing both the required hardware and software. Dr. Casson earned an undergraduate degree at the University of Oxford and a PhD from Imperial College London.

New Embedded Solution for Debugging FPGAs

Exostiv Labs recently announced that its EXOSTIV solution for Intel FPGAs will be available in December 2016. Providing up to 200,000 times more visibility on an FPGA than other solutions, EXOSTIV enables the debugging and verification of FPGA board prototypes at speed of operation. It provides extended visibility on internal nodes over long periods of time with minimal impact on the FPGA resources. Thus, you can discover issues related to complex interactions between numerous IPs when simulation is impracticable.

EXOSTIV for Intel FPGAs will be released in December 2016 with support for Arria 10 devices first. Pricing starts at $5,100.

Source: Exostiv Labs 

Wi-Fi-Enabled E-Paper

Pervasive Displays recently released a low-power, Wi-Fi-enabled e-paper display (EPD). The SimpleLink Wi-Fi CC3200 wireless MCU-based EPD is compatible with any of five different EPD panel sizes. You can control it wirelessly over the Internet with the MQTT protocol.pervasive WiFi

The low-power design comprises a SimpleLink Wi-Fi CC3200 LaunchPad development kit featuring n ARM Cortex-M4-based wireless microcontroller. The EPD sits on a BoosterPack-compatible plug-in board, which enables you to choose one of five e-paper display sizes from 1.44″ to 2.7″. An SPI enables communication between the microcontroller and the display.

Operating in the range of 2.3 to 3.6 VDC, the efficient EPD display can be updated via either an attached network or the Internet with a cloud-based application. Application firmware running permits control of the displayed image either via an embedded HTTP page or an MQTT client. With the HTTP client, you can choose from text and image format templates to be displayed and configured according to your needs.

The SimpleLink Wi-Fi CC3200 SDK contains an MQTT example along with the Pervasive Displays driver. The microcontroller uses a FreeRTOS environment with a thread for the SimpleLink functions and a thread for the display communication.

Source: Pervasive Displays

 

eSOL RTOS & Debugger Support for Software Development

Imperas Software recently announced its support for eSOL’s eMCOS RTOS and eBinder debugger. The partnership is intended to accelerate embedded software development, debugging, and testing.

The Imperas Extendable Platform Kit (EPK) features a Renesas RH850F1H device and it runs the eSOL eMCOS real time operating system. Imperas simulators can use the debugger from the eSOL IDE, eBinder, for efficient software debugging and testing.

Source: eSOL

Low Latency 48-Port FPGA Networking Appliance

BittWare and LDA Technologies are collaborating on a low-latency 48-port FPGA networking appliance. The LDA e4 is a 10/25-Gbps-capable FPGA board enclosure that repurposes the serial links on BittWare’s PCIe FPGA boards into high-speed Ethernet ports.

Features, benefits, and specs:

  • 6″ FPGA-to-port trace lengths
  • Layer 1 replication, support for various CPUs and operating systems
  • A high-accuracy clock source enables accurate timestamping
  • Enables out-of-band management and a zero configuration option

Source: BittWare

Conductive Paint: An Interview with Bare Conductive

Back in 2009, a small team of students at the Royal College of Art in London, England, began experimenting with a nontoxic conductive paint. That work laid the foundation for their company Bare Conductive, which inspires artists and engineers to take on innovative projects that involve painting circuits. Circuit Cellar travels to Commercial Street in London and interviews Stefan Dzisiewski-Smith and Isabel Lizardi, two members of Bare Conductive.conductive paint

“There are many conductive paints on the market, and people are using it for various applications,” explained Isabel Lixardi, one of Bare Conductive’s founders. “Many of these paints are ferro-based, making the applications specific and you often have to use protective clothing and gloves to work with it. Our goal was to develop a carbon and water based paint that was non-toxic and easy to use for anybody: from young kids to artists and engineers. We also see interesting examples in businesses.”

New Tricolor E-Paper Displays

Pervasive Displays recently launched the first two products in its Spectra family of three-pigment black, white and red e-paper displays (EPDs). Intended for a wide variety of applications (e.g., electronic shelf labels and smart cards), the thin Spectra EPD is an active matrix TFT glass substrate display with a 180° viewing angle.Pervasive-Spectra

The 2.87″ E2287ES051 module offers a 296 × 128 resolution and 112 dpi pixel density. The 4.2″ E2417ES053 model has 400 × 300 resolution and 120 dpi high-pixel density. Both anti-glare displays have a vertical pixel arrangement.

Spectra EPD features an SPI interface and a fine-tuned embedded waveform for superior optical performance. You can customize the embedded waveform for your specific applications. The bistable Spectra EPD panels require little power to update; they don’t use power to maintain an image. The displays can operate over an ambient temperature range of 0° to 40°. Breakage detection is supported.

Source: Pervasive Displays

New “Easy Integration” Antenna for Small Devices

Antenova recently added the Inca (part no SRFI028) antenna to its flexiiANT FPC family. Designed for small devices in the 433-MHz ISM band, the compact (101 mm × 20 mm × 0.15 mm), lightweight (0.5 g) antenna is well-suited for small electronic devices and Internet of Things (IoT) applications in the 433-MHz band, such as robot control, home automation, and medical devices.Antenova Inca

Features and specs include: flexibility, so you can fold the antenna or place it flat in your design; an I-PEX connector in a choice of three cable lengths (100, 150, or 200 mm); and peel-back, self-adhesive backing.

Inca (SRFI028) is supplied in packs of 100 for convenience and quick delivery. Samples of this antenna are now available.

Source: Antenova

802.11ax Wi-Fi Solution

Quantenna Communications recently introduced the QSR10G-AX Access Point, which supports the latest 802.11ax Draft 1.0 specification. Based on Quantenna’s QSR10G Wave 3 Wi-Fi platform, the QSR10G-AX supports 12 streams—eight streams in the 5-GHz band and four streams in the 2.4-GHz band. In addition, it supports both downlink and uplink Orthogonal Frequency-Division Multiple Access (OFDMA).

The QSR10G-AX’s features, benefits, and specs include:

  • Integrated AP chipset for dual-band (5 and 2.4 GHz), dual-concurrent operation and management
  • Pin-to-Pin compatibility with QSR10G
  • 12-Stream operation
  • Compliant with 802.11ax Draft 1.0
  • Supports interfaces to external hosts (e.g., PCIe Gen3/Gen2, RXAUI, and RGMII)
  • Supports 2.4-GHz coexistence interface
  • Enables full offload for external host
  • Cloud managed

The QSR10G-AX samples should be available in early 2017.

Source: Quantenna Communications

Issue 316: EQ Answers

Question 1: What is the second grid in a tetrode vacuum tube for? How about the third grid in a pentode?

Answer 1: In a triode, there is a certain amount of capacitance between the control grid and the plate, which contributes to negative feedback and stability problems if there’s significant phase shift in the surrounding circuitry. This often requires “neutralization”, which consists of an external capacitance between the plate and the cathode (often just a metal tab along the outside of the tube) that helps cancel out this effect.

The second grid in a tetrode, called the screen grid, is used to electrostatically isolate the control grid from the plate and eliminate this effect. It is usually tied to a voltage that is close to the plate voltage, but it is heavily bypassed (AC-coupled the cathode or to ground). A secondary effect of this grid is to help intensify the E-field near the control grid and accelerate the electrons in this region.

A problem that crops up in tetrodes, however, is that electrons get knocked loose from the plate by the impact of the cathode current in a process called secondary emission. Some of these electrons get drawn to the second grid, creating a current that is proportional to the plate current and partly negating the intended effect of this grid. A pentode introduces a third grid, called a suppressor grid, that is tied to a more negative voltage (in fact, it is usually tied directly to the cathode) and repels these secondary electrons back toward the plate.

Question 2: Wirewound resistors tend to have an undesirable reactance because of their construction. This series inductance causes the overall impedance to rise with frequency. Sometimes it is suggested to wind the resistor as two separate windings and then connect them so that their magnetic fields cancel. However, this creates a different problem. What is it?

Answer 2: In order to get better magnetic cancellation, the two windings are often done by twisting the two wires together and then winding them together on a form. When you connect the windings so as to cancel, it turns out that the terminals of the resistor are the two wires at the same end of the combined winding. Because of their physical proximity, this creates a great deal of parasitic capacitance that appears in parallel with the desired resistance. This causes the overall impedance to fall off at higher frequencies.

Question 3: What is the relationship, if any, between the GPS master clock and the GPS microwave carrier frequencies L1 and L2? Why are two different frequencies used?

Answer 3: The L1 carrier is 1575.42 MHz, which is exactly 154 times the GPS master clock rate of 10.23 MHz.

The L2 carrier is 1227.60 MHz, or 120 times the master clock.

Two frequencies are used so that receivers can make estimates of the bending effects of the ionosphere, which allows them to make corrections to their time-of-flight measurements. Both carriers are modulated with the C/A (coarse acquisition) signal.

Also, high-resolution GPS receivers can lock directly onto the carrier frequencies in order to establish their position more accurately. The carrier wavelength is just 19 or 24 cm, while the C/A “chip” wavelength (at 1.023 MHz) is 293 m. Such receivers can establish absolute position to within a few cm and make relative position measurements to a fraction of 1 cm.

Question 4: Who, exactly, is “ELI the ICE man?”

Answer 4: Not who, but what. It’s a mnemonic phrase that reminds you that voltage (E) in an inductor (L) leads the current (I), or “ELI”, and that current (I) in a capacitor (C) leads the voltage (E), or “ICE”.

What we’re talking about here is the phase relationships between voltage and current when you apply a sinewave voltage to a coil or capacitor. Mnemonic devices can be handy, but it’s better to have a good basic understanding of what’s going on.

An inductor stores energy in the form of a magnetic field produced by the current flowing through it. Although you can apply an arbitrary voltage across a coil, the current will change only by adding or subtracting energy from the field. This causes the current to lag behind the applied voltage.

Similarly, a capacitor stores energy in the form of an electric field produced by the charge on its plates. Although you can apply an arbitrary current to a capacitor, the voltage will change only by adding or subtracting charge from the plates. This causes the voltage to lag behind the applied current, or equivalently, the current to lead the voltage.

Electrical Engineering Crossword (Issue 316)

CC316 crossword

Across

  1. OR—Disjunction
  2. DUMMYLOAD—A simulated electrical load [two words]
  3. AND—Conjunction
  4. TUBE—Valve
  5. ARITY—The number of operands
  6. FACTORIAL—n!
  7. RESONANCE—A circuit’s natural vibrating frequency
  8. DYNAMIC—The opposite of static
  9. ISR—Interrupt handler
  10. TETRADE—Half byte
  11. PERIPHERALMODULE—PMOD
  12. ATTENUATOR—Used to reduce an electronic signal’s amplitude
  13. CRIMP—Join without solder

Down

  1. VOLTMETER—V in a circle
  2. CAPACITANCE—Cap
  3. CONNECTOR—Cable gland
  4. MIDBASS—40 to 80 Hz
  5. CRESTFACTOR—The ratio of the peak value to the RMS value [two words]
  6. WHISKERS—Metal hairs that can short circuit an electrical device
  7. RAREEARTH—Nd, Ce, Dy, Pr, Sm [two words]

Analog Tips & Tricks

Are you looking for ways to improve your analog and RF circuitry? Engineer Ed Nisley provides a few tips for getting started. He shows you how easy it is to take your PCB wiring skills to the next level. Who knows, your digital projects just might improve too.

Circuit Cellar has always attracted readers who enjoy building gizmos, both at work and for their own use. My December 2004 column, “Building Boxes,” prompted enough comments and suggestions regarding additional techniques that I decided a follow-up was in order.

Although these tricks are designed to improve your analog and RF circuitry, even your digital projects will benefit, because digital is just analog with the gain cranked way up. You’re sure to find at least one technique that will make your next project work better.

I wire most of my projects on PCBs built in my basement shop, using a process that produces both circuit documentation and reasonably high-quality hardware without too much effort. I’ve come up with some tricks that should help you get good results too.

I use CadSoft’s EAGLE schematic capture and board layout software, which runs on Windows, Linux, and Mac OS X (www.cadsoftusa.com). The free version can handle most of the circuits in this column, and the Standard version is reasonably priced. EAGLE is perfectly stable on my SuSE Linux 9.2 desktop system. The board layout program can produce output files in nearly any format, including the Gerber files used in board production shops. I save the output for each layer as a Postscript file, and then import the files into the GNU Image Manipulation Program (GIMP) image-editing program at 600 dpi.

The top image is the top copper layer from an EAGLE board design. The bare board shows several flaws, but the one on the bottom came out fine. The ruler scales are 0.050″ vertically and 1 mm horizontally. The board has extremely small features!

The top image is the top copper layer from an EAGLE board design. The bare board shows several flaws, but the one on the bottom came out fine. The ruler scales are 0.050″ vertically and 1 mm horizontally. The board has extremely small features!

The top image in Photo 1 shows the copper plane pattern for the charge pump LED power supply I described in my April 2005 column. I panelize them with the GIMP to produce a single image with multiple patterns in a rectangular grid. Because all this happens digitally, there’s no loss of resolution and no smudges. I then print the image through an HP LaserJet 1200 on a sheet of toner-transfer film from either Pulsar (www.pulsar.gs) or Techniks (www.techniks.com). It turns out that toner contains a thermoplastic that both adheres to bare copper and resists the etching chemical solution.

Because most of my boards are extremely small, they don’t fill a complete sheet of the toner-transfer film even after I panelize them. I print a sheet of paper, tape a square of film that’s approximately 1″ larger than the patterns atop them, and then run the paper through the printer again. The adhesive on cheaper tapes tends to melt at laser printer temperatures, so use good tape and monitor your results. Put a single strip on the leading edge of the toner-transfer film to allow the paper and film to shift slightly as they pass through the fuser rollers.

This article first appeared in Circuit Cellar 181. You can read the entire article here.

Ed Nisley is an electrical engineer, author, and long-time Circuit Cellar columnist living in Poughkeepsie, NY. His column “Above the Ground Plane” appears in Circuit Cellar every other month. You can contact him at ed.nisley@pobox. com. Write “Circuit Cellar” in the subject line to avoid spam filters.