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Circuit Cellar's editorial team comprises professional engineers, technical editors, and digital media specialists. You can reach the Editorial Department at editorial@circuitcellar.com, @circuitcellar, and facebook.com/circuitcellar

New FMEA-Compliant µModule Regulator

Linear Technology recently introduced the LTM8003 step-down DC/DC µModule regulator. With a 40-V input voltage rating and 3.5 A of continuous output current, the LTM8003’s pinout is failure mode effects analysis (FMEA) compliant, so the output voltage remains at or below the regulation voltage in the event of a short-circuit to GND, a short-circuit to a nearby pin, or if a pin is left floating.  Linear 8003

The LTM8003 operates in four operation: Burst Mode, pulse skip mode, pulse skip mode with spread spectrum, and external synch mode. The quiescent current in Burst Mode operation is 25 µA (max), which makes the LTM8003 a good option for battery-operated systems.

The LTM8003’s specs and features:

  • Wide Input Voltage Range: 3.4 to 40 V
  • Wide Output Voltage Range: 0.97 to 18 V
  • 3.5 A Continuous Output Current (6 A Peak)
  • FMEA-compliant pinout
  • 150°C maximum operating temperature (H-Grade)
  • Selectable switching frequency: 200 kHz to 3 MHz
  • External synchronization
  • Low quiescent current = 25 µA
  • Programmable soft-start
  • 6.25 mm × 9 mm × 3.32 mm BGA package

The LTM8003 starts at 1,000-piece pricing starts at $11.30 each in 1,000-piece quantities.

Source: Linear Technology

New Schematic Challenge (Sponsor: Technologic Sysetms)

Can you spot the error in this month’s schematic challenge (sponsored by Technologic Systems)? This your chance to put your technical skills to test. Find the error in the schematic for a shot to win prizes, such as a TS-7250-V2 High-Performance Embedded Computer or a Circuit Cellar Digital Subscription.

Find the error and submit your answer via the online submission form. Click to access the form.

Click to enlarge. Find the error and submit your answer via the online submission form.

Take the challenge now!

Find the Code Error: Take This Engineering Challenge (Sponsor: Programming Research)

Ready to put your programming skills to the test? Take the new Electrical Engineering Challenge (sponsored by Programming Research). Find the error in the code for a shot to win prizes, such as an Amazon Gift Card or a Circuit Cellar magazine digital subscription.

Click to enlarge. Find the error and submit your answer via the online submission form.

Click to enlarge. Visit the challenge page to access the submission form.

Take the challenge now!

A Smarter, Deeper Resource for Electronics Engineers (Sponsored)

It’s an exciting time to work with electronics. If you’re an engineer, there are opportunities to develop products as new technologies intersect and trends such as the Internet of Things (IoT) and wearables open up new possibilities.

This intersection also challenges engineers to be multi-disciplinary in their understanding of electronics, covering everything from memory and storage, to network and communications, to power supplies and batteries. While the internet is resplendent with all sorts of resources for the knowledge-hungry engineer, it’s easy to fall down a Google-search rabbit hole that leads deep into an aging message board. It’s easy to end up on a wild goose chase of stale links to outdated content.


This post brought to you by Arrow.com. The Arrow.com site is simple but expansive, pulling together resources on a wide array of components so that users spend more time doing than searching.


Arrow.com solves that problem by reducing the time engineers spend searching for information on their specific areas of interest. They do so by corralling together information on electronics across disciplines and where they intersect.

More Than Just Products

From a straightforward product perspective, Arrow.com is a repository of more than one million products, all searchable by keyword. Updated daily, it’s a treasure trove of everything from amplifiers, audio components and capacitors to transceivers, wires and cables. Drill deeper into product categories to find the specific component you’re looking for with detailed specifications with clear options on how to purchase that item.

If you already have item or aren’t sure you will need it, you can access a hoard of data sheets across product categories, as well a complete reference designs, which you can browse by application, end product or manufacturer. An added bonus: nearly a quarter of the designs on Arrow.com are interactive.

Insightful and Interactive

The site is not just about offering a great deal of static information about electronics – it’s also about providing insight and guidance for best practices so engineers can get the most from the datasheets and reference designs that are available to them.

Arrow.com also offers a wealth of articles, compiled by a team of experts who work in the everyday trenches of engineering. They don’t stop at covering the products and components listed on the site at a high level; they also provide insight into how to better incorporate them into your designs.

Articles cover issues around power, such as how to battery-power your Pi (by highlighting three ways to get around your precise 5V requirements), how to protect your system when lightening strikes or why you need power factor correction. If you’re into the hot area of IoT, you can learn about the inner workings of BAC sensors, industrial connectivity protocols or the relationship between AVX and IoT devices. Explore technology in sports or see how you do at Arrow Tech Trivia. And if you’re more of a visual learner, Arrow.com has you covered with a library of videos that include specific product insights, broad overviews and lab demos.

Get Your Motor Running

March 11, 2015. Photo by Ellen Jaskol.

March 11, 2015. Photo by Ellen Jaskol.

One segment that’s seeing even more electronics use is automotive. Cars are getting smarter, both in terms of the dashboard systems for the driver and throughout the vehicle. If you’re looking to build a better motor, Arrow has you covered. And it can give you some ideas that you may not have considered for innovative projects. Arrow.com’s IoT experts recently collaborated on modifying a car so that it can be controlled by head movements alone.

Arrow.com’s site is not just about imparting information. The Design Center offers tools to accelerate your design cycle. For example, the Arrow enVision tool helps engineers who want a simple block diagram or a full reference design, while the cloud-based Lighting Designer lets you design a complete LED lighting system in minutes. You can also find a specialist to help you out by connecting with one of nearly 200 engineers via the site.

While sometimes it’s fun to get lost clicking through sites to find resources to help you solve an electronics conundrum or discover a new way of doing something, deadlines mean it’s good to have a reliable online resource at your fingertips. Arrow’s easily navigable site pulls together a wide range of electronics information that makes it a first choice for engineers.

Visit Sponsors Site

Power Interface Module Simplifies Low-EMI Design in ATCA Applications

Ericsson recently announced the availability of the PIM4610PD power interface module (PIM), which simplifies low-EMI design in Advanced Telecom Computing Architecture (ATCA) applications. An extension of Ericsson’s 3E* PIM family, the new PIM4610PD has been optimized to simplify design in blade server-applications based on ATCA and PICMG 3.7 systems.

  • The PIM4610PD’s features and specs:

    Minimized ripple and noise characteristics have been minimized

  • Operates over an input range of 36 to 75 V
  • Delivers 864 W with a 54-V input, 768 W at 48 V, and 600 W at 37.5 V
  • Built-in digital monitoring and an extensive range of energy-monitoring functionalities via an I2C/PMBus interface
  • Protection against input transients, reverse polarity, over-temperature, over-current, input under-voltage, and inrush current
  • A well-controlled shutdown procedure that enables de-assertion of the Power Good pin when input power is below a certain level
  • Quarter-brick format, measuring 57.9 × 36.8 × 21.33 mm

The  PIM4610PD starts at $72 for OEM quantities.

Source: Ericsson

Narrowband IoT Module Optimized for Secure Applications

u-blox new SARA-N2 Narrowband IoT (NB-IoT) module is a cellular radio module compliant to the 3GPP Release 13, Narrowband IoT (LTE Cat. NB1) standard. Intended for a wide variety of IoT applications (e.g., smart buildings and cities, utilities metering, and asset tracking), the compact (16 mm × 26 mm) SARA-N2 module will operate for up to 20 years from a single-cell primary battery. With a 20-dB link budget improvement over GPRS, the module delivers high performance under poor coverage conditions (e.g., underground or inside a building).UB047 u-blox

The SARA-N2 module’s advantages include:

  • Secure, private communications
  • Peak downlink rates of up to 227 kbps and uplink rates of up to 21 kbps
  • Simultaneous support for three RF bands so you can use the same module in most geographic regions.
  • Lower latency than mesh networks due to its point-to-point topology,
  • Ability to run next to existing 2G and LTE networks
  • Allows for robust two-way communication
  • The possibility for global roaming

 

Samples of the SARA-N2 NB-IoT module are scheduled to be available in Q4 2016.

Source: u-blox

Software-Programmable FPGAs

Modern workloads demand higher computational capabilities at low power consumption and cost. As traditional multi-core machines do not meet the growing computing requirements, architects are exploring alternative approaches. One solution is hardware specialization in the form of application specific integrated circuits (ASICs) to perform tasks at higher performance and lower power than software implementations. The cost of developing custom ASICs, however, remains high. Reconfigurable computing fabrics, such as field-programmable gate arrays (FPGAs), offer a promising alternative to custom ASICs. FPGAs couple the benefits of hardware acceleration with flexibility and lower cost.

FPGA-based reconfigurable computing has recently taken the spotlight in academia and industry as evidenced by Intel’s high-profile acquisition of Altera and Microsoft’s recent announcement to deploy thousands of FPGAs to speed up Bing search. In the coming years, we should expect to see hardware/software co-designed systems supported by reconfigurable computing to become common. Conventional RTL design methodologies, however, cannot productively manage the growing complexity of algorithms we wish to accelerate using FPGAs. Consequently, FPGA programmability is a major challenge that must be addressed both technologically by leveraging high-level software abstractions (e.g., language and compilers), run-time analysis tools, and readily available libraries and benchmarks, as well as scholastically through the education of rising hardware/software engineers.

Recent efforts related to software-programmable FPGAs have focused on designing high-level synthesis (HLS) compilers. Inspired by classical C-to-gates tools, HLS compilers automatically transform programs written in traditional untimed software languages to timed hardware descriptions. State-of-the-art HLS tools include Xilinx’s Vivado HLS (C/C++) and SDAccel (OpenCL) as well as Altera’s OpenCL SDK. Although HLS is effective at translating C/C++ or OpenCL programs to RTL hardware, compilers are only a part of the story in realizing truly software-programmable FPGAs.

 
Efficient memory management is central to software development. Unfortunately, unlike traditional software programming, current FPGA design flows require application-specific memories to sustain high performance hardware accelerators. Features such as dynamic memory allocation, pointer chasing, complex data structures, and irregular memory access patterns are also ill-supported by FPGAs. In lieu of basic software memory abstractions techniques, experts must design custom hardware memories. Instead, more extensible software memory abstractions would facilitate software-programmability of FPGAs.

In addition to high-level programming and memory abstractions, run-time analysis tools such as debuggers and profilers are essential to software programming. Hardware debuggers and profilers in the form of hardware/co-simulation tools, however, are not ready for tackling exascale systems. In fact, one of the biggest barriers to realizing software-programmable FPGAs are the hours, even days, it takes to generate bitstreams and run hardware/software co-simulators. Lengthy compilation and simulation times cause debugging and profiling to consume the majority of FPGA development cycles and deter agile software development practices. The effect is compounded when FPGAs are integrated into heterogeneous systems with CPUs and GPUs over complex memory hierarchies. New tools, following architectural simulators, may aid in rapidly gathering performance, power, and area utilization statistics for FPGAs in heterogeneous systems. Another solution to long compilation and simulation times is using overlay architectures. Overlay architectures mask the FPGA’s bit-level configurability with a fixed network of simple processing nodes. The fixed hardware in overlay architectures enables faster programmability at the expense of finer grained, bit-level parallelism of FPGAs.

Another key facet of software programming is readily available libraries and benchmarks. Current FPGA development is marred with vendor specific IPs cores that span limited domains. As FPGAs become more software-programmable, we should expect to see more domain experts providing vendor agnostic FPGA-based libraries and benchmarks. Realistic, representative, and reproducible vendor-agnostic libraries and benchmarks will not only make FPGA development more accessible but also serve as reference solutions for developers.

Finally, the future of software-programmable FPGAs lies not only in technological advancements but also in educating the next generation of hardware/software co-designing engineers. Software engineers are rarely concerned with the downstream architecture except when exercising expert optimizations. Higher-level abstractions and run-time analysis tools will improve FPGA programmability but developers will still need a working knowledge of FPGAs to design competitive hardware accelerators. Following reference libraries and benchmarks, software engineers must become fluent with the notion of pipelining, unrolling, partitioning memory into local SRAM blocks and hardened IPs. Terms like throughout, latency, area utilization, power and cycle time will enter software engineering vernacular.

Recent advances in HLS compilers have demonstrated the feasibility of software-programmable FPGAs. Now, a combination of higher-level abstractions, run-time analysis tools, libraries and benchmarks must be pioneered alongside trained hardware/software co-designing engineers to realize a cohesive software engineering infrastructure for FPGAs.
 

Udit Gupta earned a BS in Electrical and Computer Engineering at Cornell University. He is currently studying toward a PhD in Computer Science at Harvard University. Udit’s past research includes exploring software-programmable FPGAs by leveraging intelligent design automation tools and evaluating high-level synthesis compilers with realistic benchmarks. He is especially interested in vertically integrated systems—exploring the computing stack from applications, tools, languages, and compilers to downstream architectures

Latest Release of COMSOL Multiphysics and COMSOL Server

COMSOL has announced the latest release of the COMSOL Multiphysics and COMSOL Server simulation software environment. With hundreds of user-driven features and enhancements, COMSOL software version 5.2a expands electrical, mechanical, fluid, and chemical design and optimization capabilities. COMSOL_Multiphysics

In COMSOL Multiphysics 5.2a, three new solvers deliver faster and more memory-efficient computations:

  • The smoothed aggregation algebraic multigrid (SA-AMG) solver is efficient for linear elastic analysis and many other types of analyses. It is very memory conservative, making it possible to run structural assemblies with millions of degrees of freedom on a standard desktop or laptop computer.
  • The domain decomposition solver has been optimized for handling large multiphysics models. “
  • A new explicit solver based on the discontinuous Galerkin (DG) method for acoustics in the time-domain enables you to perform more realistic simulations for a given memory size than was previously possible.

The complete suite of computational tools provided by COMSOL Multiphysics software and its Application Builder enables you to design and optimize your products and create apps. Simulation apps enable users without any previous experience using simulation software to run the apps. With version 5.2a, designers can build even more dynamic apps where the appearance of the user interface can change during run time, centralize unit handling to better serve teams working across different countries, and include hyperlinks and videos.

Source: COMSOL

BenchVue 3.5 Software Update for Instrument Control, Test Automation, & More

Keysight Technologies recently released BenchVue 3.5, which is an intuitive platform for the PC that provides multiple-instrument measurement applications, data capture, and solution applications. Programming or separate instrument drivers are not required.

When you connect an instrument to your PC over LAN, GPIB or USB, the instrument is automatically configured for use in BenchVue. With the BenchVue Test Flow app, you can quickly create automated test sequences. BenchVue 3.5 also features new apps that support signal generators, universal counters, and Keysight’s FieldFox Series of handheld analyzers.

BenchVue’s features and specs:

  • Expandable apps that provide instrument control with plug and play functionality
  • Data logging for instruments (e.g., digital multimeters, power supplies, oscilloscopes, and FieldFox analyzers
  • Rapid test automation development and analysis
  • Three-click exporting to common data formats (e.g., .csv, MATLAB, Word, and Excel)

BenchVue 3.5 software is available free of charge. Upgrades to extend BenchVue’s functionality are also available and are priced accordingly.

Source: Keysight

Super-Compact, Nine-Axis Motion Sensor

Bosch Sensortec recently announced the launch of the compact BMX160 nine-axis motion sensor, which a great option for small, power-constrained applications ranging from “smart” wearables to virtual reality (VR) devices. Housed in a compact 2.5 × 3 × 0.95 mm3 package, the sensor combines advanced accelerometer, gyroscope, and geomagnetic sensor technologies.Bosch-BMX160

The BMX160’s features, specs, and benefits:

  • Compact size: 2.5 × 3 × 0.95 mm3
  • Reduces power consumption below 1.5 mA
  • Enables Android wearable applications that rely on sensor data
  • You can use the sensor with the Bosch Sensortec BSX sensor data fusion software library.
  • Pin- and register-compatibility with the six-axis BMI160 IMU s
  • Built-in power management unit

BMX160 samples are now available for development partners.

Source: Bosch Sensortec

Virtual Software Development for Embedded Developers

Embeddetech will launch a Kickstarter campaign on June 20 for its Virtuoso software. Virtuoso is a powerful virtual device framework intended for custom electronics designers. With it, you can virtualize embedded systems. This means that firmware application developers can drag-and-drop commonly used components (e.g., LEDs, touch screens, and keypads) or develop new components from scratch and then start developing applications. With Virtuoso, a fully functional replica of the hardware accelerates firmware development while the hardware is developed in parallel.EmbeddedTech - Virtuoso

In early 2017, Embeddetech plans to bring photo-realistic, real-time, 3-D virtualization to embedded software development using Unreal Engine, which is a powerful game engine developed by Epic Games. Embeddetech has developed a second framework which adapts Unreal Engine to Microsoft’s .NET Framework, allowing business applications to leverage the power of the modern 3-D game development workflow.

Source: Embeddetech

Light-Weight Data Encryption for IoT and M2M Applications

LSE Technologies recently announced it is enabling secure end-to-end network data transfers for M2M applications and IoT devices with its Lightweight Stream Encryption Technology (LSET) C source code packages. LSE tech

Three versions of the LSET Professional product line are available for different levels of security and processing resources:

  • LSET Pro is targeted at 8-bit and low-end 16/32-bit microcontrollers and offers basic encryption algorithm for short control/status messages.
  • LSET ProX is targeted at mid-range 16/32-bit microcontrollers with an enhanced encryption/decryption engine and key security features. It is suitable for short control/status messaging as well as video and firmware updates.
  • LSET ProXT is targeted at higher end 32-bit microcontrollers and provides a more advanced encryption/decryption engine and additional key security features. It is suitable for longer messages such as in gateway applications as well as for video and firmware updates.

On a common 32-bit microcontroller, a typical implementation of the LSET ProX package would require about 600 bytes of code space plus 64 bytes of RAM and with a 20-MHz CPU clock encryption/decryption could be performed in about 2.5 µs per byte.

The LSET source code packages were designed to be easily incorporated into existing code bases. In many cases data encryption can be added to a product in just a few hours. The LSET Professional C source code packages start at $500 for the LSET Pro package.

Source: LSE Technologies

High-Performance 100-kHz Handheld LCR Meter

B&K Precision recently announced the availability of a 100-kHz handheld LCR meter that includes features usually found only in bench-top meters. You can use the portable 880 model LCR meter to measure inductance, capacitance, and resistance with 0.1% basic impedance accuracy. Its provides test frequencies up to 100 kHz, selectable test signal levels, and four-terminal measurement capabilities.BK-LCR-Meter

Key features and specs include:

  • A fast auto-ranging function, convenient single-push auto detect mode, and versatile functions such as data recording, tolerance sorting, and relative mode
  • Four-terminal shielded configurations
  • A dual display with 40,000-count and 10,000-count resolution for primary and secondary measurements, respectively.
  • DC resistance measurement capability
  • Standard accessories such as an AC adapter with rechargeable 9-V battery, a mini USB cable, a shorting plate, banana-to-alligator test leads, Kelvin clip test leads, and an additional tweezer tool for measuring SMD components.

The 880 LCR meter comes with a three-year warranty and costs $399.

Source: B&K Precision

Issue 308: EQ Answers

Problem 1—The circuit shown below is an audio amplifier with a slightly unusual topology. Explain how to analyze its DC operating point.eq0675_fig1

 Answer 1—For the DC analysis, start by calculating the Thevenin equivalent of the bias network: 8.0 V and 16.67 kΩ. This sets the emitter of Q1 at about 7.3 V.

Now, consider R6. Since the voltage across it is limited to 0.7 V, it is carrying at most about 0.15 mA. If we assume for the moment that the contribution of Q3’s base is negligible (we’ll verify this shortly), then that same current is flowing through R12, which gives it a voltage drop of 1.5 V, setting the collector voltage of Q3 at about 5.8 V.

This means that R10 is carrying a total current of about 1.23 mA, which means that the remaining current (1.08 mA) is flowing through Q3. If Q3 has a gain of 100, then its base current is about 10.8 µA, which is less than 10% of the R6 current, as surmised.

You could iterate through this analysis a few more times to get more exact figures, but that’s what circuit simulators are for.

Problem 2—What is the AC gain of the circuit, and what is its lower cutoff frequency?

Answer 2—As far as the AC analysis goes, Q1 by itself has a gain that is set by R6 and R8 to about 21, but since Q3 has no emitter resistor, its voltage gain is very large. Therefore, the overall gain of the circuit is almost entirely controlled by the negative feedback (R12 and R8), which makes the gain about 46.

Each of the capacitors has a high-pass effect on the circuit:

  • C1 working with the impdeance of the bias network has a time constant of 16.67 ms, which corresponds to a corner frequency of 9.5 Hz.
  • C2 working with R8 has a time constant of 22 ms, which corresponds to a corner frequency of 7.2 Hz.
  • C5 working with R10 and Rload has a time constant of 26.7 ms, which corresponds to a corner frequency of 6.0 Hz.

The overall circuit response will be dominated by the input network, for a cutoff frequency of about 10 Hz.

Problem 3—What is the analog video bandwidth required for a VGA display of 640 × 480 pixels at 60 frames/second?

 Answer 3—For a good-quality computer video display, where fine vertical lines show the same contrast as fine horizontal lines, the video bandwidth should be able to pass at least the 3rd harmonic of the fastest square wave that appears in the image.

The fastest square wave is alternating dark/light pixels, so its fundamental frequency is half the frequency of the dot clock. For VGA at 25.175 MHz, this would be 12.59 MHz. Three times this fundamental frequency is 37.76 MHz.

Problem 4—Some radar systems use a “chirped pulse”. What exactly is a chirped pulse, and what are its advantages?

 Answer 1—The basic problem in radar is to get both adequate power for total range and good timing resolution for range resolution. It is hard to build high-power amplifiers for microwave frequencies. You want to have a lot of energy in each transmitted pulse, but you also want to keep the pulse short.

There is a kind of all-pass filter (constant amplitude response) that has the property that it delays different frequency components by different amounts (linear phase response). When given a narrow pulse at its input, it produces a waveform that starts at a high frequency and then ramps down to a low frequency, over a much longer period of time. When done at audio frequencies, the result sounds like the chirp of a bird or insect, which is where the name comes from. This stretched pulse allows the power amplifier to operate at a lower peak power for a longer time in order to get the same total pulse energy.

Now, in radar, it doesn’t matter if you don’t compress the pulse again before feeding it to the antenna — the chirped pulse works just as well as the compressed pulse in terms of detecting objects.

In fact, you gain additional advantages when the reflections come back. You can amplify the chirped signal in the receiver (getting some of the same advantages as in the transmitter amplifier regarding peak-to-average power). And you can use a “matched filter” (which has the opposite phase characteristic from the transmit filter) to compress the pulse just prior to detection. This filter has the additional advantage of rejecting a lot of potential interference sources as well. The narrow pulses coming out of the receiver filter provide the required time resolution (range resolution).