About Circuit Cellar Staff

Circuit Cellar's editorial team comprises professional engineers, technical editors, and digital media specialists. You can reach the Editorial Department at editorial@circuitcellar.com, @circuitcellar, and facebook.com/circuitcellar

Near-Zero-Power Voice-Activation for Battery-Powered Devices

Vesper, DSP Group and Sensory have demonstrated a turnkey development platform that boasts the lowest overall power consumption for far-field always-listening voice interfaces. The DSP Group also recently unveiled its new DBMD5 audio SoC built to drive clearer human-machine voice interactions.Vesper Sensory

The Vesper-DSP Group-Sensory integrated development platform features Sensory’s voice algorithms, enabling ultra-low-power consumer electronics that wake at voice input. This platform is the first to achieve overall power consumption low enough to enable battery-powered always-listening far-field systems.

The new development platform integrates Vesper’s VM1010 wake-on-sound piezoelectric MEMS microphone with DSP Group’s DBMD4, an ultra-low-power, always-on voice and audio processor based on Sensory’s Truly Handsfree voice control embedded algorithms. The platform gives developers the ability to initiate voice processing through Sensory’s wake-up word technology, which ensures that only a specific trigger word activates the device.

DSP Group’s new DBMD5 audio SoC built to drive clearer human-machine voice interactions in microphone-equipped devices. By leveraging DBMD5 with HDClear technology to support hands-free device control, manufacturers can now add a voice-user interface (VUI) to their products for accuracy in high-noise environments along with control over voice triggers and barge-in capabilities.

The DBMD5 solution offers sophisticated voice enhancement algorithms, including echo cancellation, noise suppression, beam forming and far-field support. Its programmable dual-core DSP supports digital and analog microphones, incorporating various application processor interfaces—such SPI, I2C, UART, and SLIMbus—while a complete suite of drivers allow rapid development and fast time-to-market.

Source: Vesper

Transform IoT Audio, Voice, and Video Interactions

NXP Semiconductors (now part of Qualcomm) recently introduced the new i.MX 8M family of applications processors specifically designed to meet increasing audio and video system requirements for smart home and smart mobility applications such as over-the-top (OTT) set-top boxes, digital media adapters, surround sound, sound bars, A/V receivers, voice control, voice assistance, digital signage, and general-purpose human machine interface (HMI) solutions.NXP-iMX8M-FS

The concept of the smart home is expanding rapidly, heightening consumers’ expectations for audio and video entertainment and transforming the requirements for consumer electronics devices. NXP’s i.MX 8M family addresses the major inflection points currently underway in streaming media: voice recognition and networked speakers in audio, and the move to 4K High Dynamic Range (HDR) and the growth of smaller, more compact form factors in video.

NXP’s i.MX 8M family of processors has up to four 1.5-GHz ARM Cortex-A53 and Cortex-M4 cores, flexible memory options and high-speed connectivity interfaces. The processors also feature full 4K UltraHD resolution and HDR (Dolby Vision, HDR10 and HLG) video quality, the highest levels of pro audio fidelity, up to 20 audio channels and DSD512 audio. The i.MX 8M family is tailored to streaming video devices, streaming audio devices and voice control applications.

Capable of driving dual displays, the new devices include:

  • The i.MX 8M Dual/i.MX 8M Quad, which integrates two or four ARM Cortex-A53 cores, one Cortex- M4F core, a GC7000Lite GPU and 4kp60, h.265 and VP9 video capability.
  • The i.MX 8M QuadLite, which integrates four ARM Cortex-A53 cores, one Cortex- M4F core and a GC7000Lite GPU.
  • The i.MX 8M Solo, which integrates one ARM Cortex-A53 core, one Cortex-M4F core and a GC7000nanoULTRA GPU.

The i.MX 8 applications processor is highly scalable with a pin- and power-compatible package and comprehensive software support. The i.MX 8 multi-sensory enablement kit (MEK) is now available to prototype i.MX 8M systems. Limited sampling of i.MX 8M will begin in the second quarter of 2017, and general availability is expected in the fourth quarter of 2017.

Source: NXP Semiconductors

700-V CoolMOS P7 Family for Flyback-Based, Low-Power SMPS Applications

Infineon Technologies recently launched the 700-V CoolMOS P7 family for quasi-resonant flyback topologies. Offering performance advantages over superjunction technologies, the MOSFETs are well suited for mobile device chargers and notebook adapters. They also support fast switching and high power density designs for TV adapters, lighting, and moreInfineon CoolMOS_P7

Features and benefits include:

  • Finely graduated RDS(on) x Eoss; lower Qg, Eon and Eoff
  • High switching frequency capable
  • Integrated Zener diode
  • Large variety of packages
  • Low losses
  • Additional 50 V of blocking voltage compared to C6 technology
  • Meets EMI requirements
  • High ESB ruggedness
  • Lower case temperatures

The 700 V CoolMOS P7 family is available with the most relevant RDS(on) package combinations including 360 mΩ up to 1400 mΩ in IPAK SL, DPAK, and TO-220FP.

Source: Infineon Technologies

The Future of Test-First Embedded Software

The term “test-first” software development comes from the original days of extreme programming (XP). In Kent Beck’s 1999 book, Extreme Programming Explained: Embrace Change (Addison-Wesley), his direction is to create an automated test before making any changes to the code.

Nowadays, test-first development usually means test-driven development (TDD): a well-defined, continuous feedback cycle of code, test, and refactor. You write a test, write some code to make it pass, make improvements, and then repeat. Automation is key though, so you can run the tests easily at any time.

TDD is well regarded as a useful software development technique. The proponents of TDD (including myself) like the way in which the code incrementally evolves from the interface as well as the comprehensive test suite that is created. The test suite is the safety net that allows the code to be refactored freely, without worry of breaking anything. It’s a powerful tool in the battle against code rot.

To date, TDD has had greater adoption in web and application development than with embedded software. Recent advances in unit test tools however are set to make TDD more accessible for embedded development.

In 2011 James Grenning published his book, Test Driven Development for Embedded C (Pragmatic Bookshelf). Six years later, this is still the authoritative reference for embedded test-first development and the entry point to TDD for many embedded software developers. It explains how TDD works in detail for an unfamiliar audience and addresses many of the traditional concerns, like how will this work with custom hardware. Today, the book is still completely relevant, but when it was published, the state-of-the art tools were simple unit test and mocking frameworks. These frameworks require a lot of boilerplate code to run tests, and any mock objects need to be created manually.

In the rest of the software world though, unit test tools are significantly more mature. In most other languages used for web and application development, it’s easy to create and run many unit tests, as well as to create mock objects automatically.
Since 2011, the current state of TDD tools has advanced considerably with the development of the open-source tool Ceedling. It automates running of unit tests and generation of mock objects in C applications, making it a lot easier to do TDD. Today, if you want to test-drive embedded software in C, you don’t need to roll-your-own test build system or mocks.

With better tools making unit testing easier, I suspect that in the future test-first development will be more widely adopted by embedded software developers. While previously relegated to the few early adopters willing to put in the effort, with tools lowering the barrier to entry it will be easier for everyone to do TDD.
Besides the tools to make TDD easier, another driving force behind greater adoption of test-first practices will be the simple need to produce better-quality embedded software. As embedded software continues its infiltration into all kinds of devices that run our lives, we’ll need to be able to deliver software that is more reliable and more secure.

Currently, unit tests for embedded software are most popular in regulated industries—like medical or aviation—where the regulators essentially force you to have unit tests. This is one part of a strategy to prevent you from hurting or killing people with your code. The rest of the “unregulated” embedded software world should take note of this approach.

With the rise of the Internet of things (IoT), our society is increasingly dependent on embedded devices connected to the Internet. In the future, the reliability and security of the software that runs these devices is only going to become more critical. There may not be a compelling business case for it now, but customers—and perhaps new regulators—are going to increasingly demand it. Test-first software can be one strategy to help us deal with this challenge.


This article appears in Circuit Cellar 318.


Matt Chernosky wants to help you build better embedded software—test-first with TDD. With years of experience in the automotive, industrial, and medical device fields, he’s excited about improving embedded software development. Learn more from Matt about getting started with embedded TDD at electronvector.com.

New Radiation-Hardened MOSFETs for Space Applications

IR HiRel (an Infineon Technologies company) recently launched its first radiation-hardened MOSFETs based on the proprietary N-channel R9 technology platform. Offering size, weight, and power improvements over previous technologies, the 100-V, 35-A MOSFETs are ideally suited to mission-critical applications requiring an operating life up to and beyond 15 years. Target applications include space-grade DC-DC converters, intermediate bus converters, motor controllers, and high-speed switching designs.Infineon - RAD-hard-MOSFET

The IRHNJ9A7130’s and IRHNJ9A3130’s features, benefits, and specs:

  • Characterized for total ionizing dose (TID) immunity to radiation of 100 krads and 300 krads, respectively.
  • An R DS(on) of 25 mΩ (typical) is 33% lower than the previous device generation.
  • Provide increased power density and reduced power losses in switching applications
  • Improved Single Event Effect (SEE) immunity and have been characterized for useful performance with Linear Energy Transfer (LET) up to 90 MeV/(mg/cm²); at least 10 percent higher than previous generations.
  • Both of the new devices are packaged in a hermetically sealed, lightweight, surface-mount ceramic package (SMD-0.5) measuring just 10.28 mm × 7.64 mm × 3.12 mm.
  • Available in bare die form.

Source: Infineon Technologies

New Low-Profile, 450-W DC/DC Converter Module

Ericsson recently launched a low-profile, 450-W DC/DC converter module, which provides a 12-V output voltage at up to 37.5 A to point-of-load (POL) DC/DC converters. Offered in a five-pin 1/8-brick footprint, the new PKB4413D advanced bus converter has an input range from 36 to 60 V.Ericsson PKB 4413D

Ideal for intermediate bus conversion in Information and Communication Technologies (ICT) applications, the PKB4413D incorporates Ericsson’s cutting-edge HRR Hybrid Regulated Ratio (HRR) technology to deliver high-power conversion from a wide input voltage range while keeping power losses low. Offering class-leading performance in thermally challenging environments and delivering a typical efficiency of 96%, with a 48-V input and 12-V output at half-load, the module significantly reduces energy and cooling costs. Competitive products typically dissipate 18% or more of their input power at 30-A loads. Meeting the deployment requirements for distributed power and intermediate bus voltage architectures, the module particularly targets high-power and high-performance use in networking and telecommunications equipment, servers and data storage applications, as well as industrial equipment.

Features, specs, and benefits:

  • Industry-standard eighth-brick format, 58.4 × 22.7 × 13.2 mm (2.30 × 0.89 × 0.52″)
  • Offers up to 96% efficiency at 12-V output, significantly reducing energy and cooling costs
  • Provides 1500 V(dc) I/O isolation
  • Meets the safety requirements of IEC/EN/UL60950-1
  • Calculated MTBF of 8.5 million hours

The PKB4413D is priced at $39.00 in OEM quantities of 1,000 pieces or more.

Source: Ericsson

LUXEON UV U1 Offers 2× Performance Smallest UV Emitter

Lumileds recently announced the LUXEON UV U1 LED for use in a variety of UV applications, including UV curing, counterfeit detection, analytical instrumentation, inspections and other UVA and Violet (380–420 nm). Featuring the same micro package size as LUXEON Z UV, the new version enables a higher power density.

The LUXEON UV U1 LED is nominally tested at 500 mA, but it can be driven at up to 1 A to achieve higher irradiances. For the application of UV curing at 395 nm, LUXEON UV U1 achieves 700 mW at 500 mA and greater than 1300 mW at 1 A under 25°C. Compared to the 3.5 × 3.5 mm2 package size of most UV LEDs, LUXEON UV U1’s unique micro package size delivers superior packing density as well as greater than 5× higher power density. The LUXEON UV U1’s footprint is a drop-in replacement for the LUXEON Z UV, while providing twice the typical radiometric power as its predecessor at 380–390 nm.

Source: Lumileds

High-Performance Analog Technology A30 for IoT Applications and More

ams AG recently announced the availability of its High Performance Analog Low Noise CMOS process (“A30”). The new A30 technology features performance optimized, isolated 3.3-V devices (NMOSI and PMOSI), isolated 3.3-V low Vt devices (NMOSIL and PMOSIL), an isolated high-voltage device with thin gate oxide (NMOSI20T), vertical bipolar transistors (VERTN1 and VERTPH), and an isolated 3.3-V super-low-noise transistor (NMOSISLN). It enables flicker noise reduction by at least a factor of 4 to 10 for high drain currents compared to H35 process. Passive devices such as various capacitors (poly, sandwich, and MOS varactor) and resistors (diffusion, well based, poly, high resistive poly and precision) complete the device offering.

The A30 process is well suited for ultra-low noise sensing applications and analog read-out ICs that require noise optimized input stages or high signal-to-noise ratios. It allows the development of innovative solutions for consumer electronics, automotive, medical and IoT devices. The A30 process is fully qualified and manufactured in ams’ state of the art 200-mm fabrication facility ensuring very low defect densities and highest yield. All 0.30-µm elements are drawn and verified as 0.35µm devices. The optical shrink (factor of 0.9) is done in the mask shop on the completed GDSII data and results in smaller die sizes respectively more dies per wafer.

The A30 process is supported by the well-known hitkit, ams’s industry benchmark process design kit. Based on Virtuoso Custom IC technology 6.1.6 from Cadence, the new hitkit helps design teams to significantly reduce time-to-market for products in the analog-intensive, mixed-signal arena. The hitkit provides a comprehensive design environment and a proven route to silicon. The new hitkit v4.15 for A30 process is now available on ams’s foundry support server.

Source: ams

Cypress Begins Volume Shipments of MCUs Based on eCT Embedded Flash

Cypress Semiconductor Corp. recently started volume shipments of microcontrollers containing its proprietary 40-nm Embedded Charge-Trap (eCT) Flash manufactured at United Microelectronics Corporation (UMC). The shipments are part of a multiple-year collaboration between Cypress and UMC to integrate Cypress’s flash technology with UMC’s 40-nm Low Power (40LP) logic process.

With a 0.053 µm2 cell size, the eCT Flash macro is capable of 8-ns random access and 30-μs word-programming speed, making it well suited for high-performance applications as well as stringent automotive reliability requirements. The eCT Flash macros are also available for licensing from Cypress.

Source: Cypress Semiconductor

Flowcode (Part 4): Dev Boards to Pro Apps

In the first article in this series, you were introduced to Flowcode 7, flowchart-driven electronic IDE that enables you to produce hex code for more than 1,300 different microcontrollers, including PIC8, PIC16, PIC32, AVR, Arduino, and ARM. The second article detailed how to get working with displays in Flowcode. The third article detailed some of the more complex communications components, Modbus and DMX. This article details the Matrix Industrial Automotive Controller (MIAC), which gives you the ruggedness and power of a PLC with the flexibility and ease of programming a controller. You learn how to use a MIAC and Flowcode 7 in an application. Download the article.

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Want a Free Trial and/or Buy Flowcode 7? Download Now

Flowcode is an IDE for electronic and electromechanical system development. Pro engineers, electronics enthusiasts, and academics can use Flowcode to develop systems for control and measurement based on microcontrollers or on rugged industrial interfaces using Windows-compatible personal computers. Visit www.flowcode.co.uk/circuitcellar to learn about Flowcode 7. You can access a free version, or you can purchase advanced features and professional Flowcode licenses through the modular licensing system. If you make a purchase through that page, Circuit Cellar will receive a commission.

Electrical Engineering Crossword (Issue 318)

 

The answers to the Circuit Cellar 318 crossword puzzle are now available.318 crossword (key)

Across

  1. ANTIPARTICLE—Same mass, opposite charge
  2. AMORPHOUS—A solid without form and shape
  3. BIFURCATE—Split
  4. BAUD—Bd
  5. TOKEN—Permission to communicate
  6. LED—Holonyak, General Electric
  7. UHF—300 MHz–1 GHz
  8. CRC—Code for error detection
  9. VOLUME—Total space in a solid
  10. SKEW—Unparalleled lines that don’t intersect
  11. RECEPTACLE—Jack

Down

  1. ANGSTROM—1/10,000,000,000 m
  2. ENUMERATED—enum
  3. PYRAMID—V = 1/3Bh
  4. MAXWELL—Magnetic flux
  5. ATOMICNUMBER—Protons in a nucleus
  6. ULTRASONIC—Above 20,000 Hz
  7. JFET—Voltage-controlled transistor, not current-controlled
  8. UNIVERSAL—Motor that can operate via an AC or DC source
  9. CERMET—Has properties of both ceramic and metal

Issue 318: EQ Answers

Here are the answers to the four EQ problems that appeared in Circuit Cellar 318.

Problem 1: Outside of simply moving data from one place to another, most of the work of a computer is performed by “dyadic” operators — operations that combine two values to form a third value. Examples include addition, subtraction and multiplication for arithmetic; AND, OR and XOR for logical operations. A dyadic operation requres three operands — two “source” values and a “destination” location. One way to classify a computer’s ISA (instruction set architecture) is by the number of operands that are explicitly specified in a dyadic instruction. The classifications are:

  • 0-address (stack machine)
  • 1-address (accumulator-based)
  • 2-address
  • 3-address

Can you describe some of the pros and cons of each of these choices?

Answer 1:

0-address

A 0-address machine is also known as a “stack” machine. All operators take their source operands from the stack and place their result on it. The only instructions that contain memory addresses are the “load” and “store” locations that transfer data between the stack and main memory.

Pros: Short instructions, no implicit limit on the size of the stack.

Cons: More instructions required to implement most computations. Parallel computations and common subexpressions require a lot of “stack shuffling” operations.

1-address

In this type of machine, the ALU output is always loaded into an “accumulator” register, which is also always one of the source operands.

Pros: Simple to construct. Eliminates many of the separate “load” operations.

Cons: Requires results to be explicitly stored before doing another calculation. Longer instructions, depending on the number of registers, etc.

2-address

This type of machine allows the two source operands to be specified independently, but requires that the destination be the same as one of the source operands.

Pros: Allows more than one destination, eliminating more “move” operations.

Cons: Even longer instructions.

3-address

This type of machine allows all three operands to be specified independently.

Pros: Most flexible, eliminates most data moves.

Cons: Longest instructions.

To summarize, the short instructions of the stack machine allow a given computation to be done in the smallest amount of program memory, but require more instruction cycles (time) to complete it. The flexibility of the 3-address architecture allow a computation to be done in the fewest instruction cycles (least time), but it consumes more program memory.


Problem 2: In order to be generally useful, a computer ISA must be “Turing complete”, which means that it can — at least theoretically, if not in practice — perform any computation that a Turing Machine can do. This includes things like reading and writing data from a memory, performing arithmetic and logical computations on the data, and altering its behavior based on the values in the data. Most practical computers have relatively rich instruction sets in oder to accomplish this with a reasonable level of efficiency. However, what is the minimum number of instructions required to achieve Turing-completeness?

Answer 2: Just one instruction, chosen carefully, is sufficient to achieve Turing-completeness. One example would be the instruction “subtract one from memory and branch if the result is not zero”. All of the operations of an ordinary computer can be synthesized as sequences of these “DJN” instructions. Note that since there is only one choice, there is no need to include an “opcode” field in the coding of each instruction. Instead, each instruction simply contains a pair of addresses: the data to be decremented, and the destination address of the jump.


Problem 3: Some processor ISAs are notorious for not being “friendly” to procedure-oriented languages such as C, requiring a lot of work on the part of the compiler in order produce reasonably efficient code, and even then, often introducing some restrictions for the programmer. What are some key features of an ISA that would make it “C-friendly”

Answer 3: The key concept in procedure-oriented languages like C is that of function composition. This means that it must be easy to produce new functions by combining calls to existing functions, and that functions can be called in the process of building argument lists for other functions. The C language takes this to the extreme, in the sense that every operator &mdash including the assignment operator — creates an expression that has a result value that can be used to build larger expressions. Therefore, one key architectural element is the ability to create function contexts — sets of parameters, local variables and return values — that can be “stacked” to arbitrary levels. In terms of an ISA, this means that it must support the direct implementation of at least one data stack that includes the ability to index locations within that stack relative to a stack pointer and/or a frame pointer. This concept is a direct abstraction from the hardware addressing modes of the PDP-11 minicomputer, the machine on which the first versions of C were developed. The PDP-11 ISA allows any of its 8 general-purpose registers to be used to address memory, with addressing modes that include “predecrement” and “postincrement” — implementing “push” and “pop” operations as single instructions — as well as “indexed indirect”, which allows local variables to be addressed as an offset from the stack pointer.


Problem 4: Sometimes a computer must work on data that is wider than its native word width. What is the key feature of its ISA that makes this easy to do?

Answer 4: The key feature in an ISA that allows arithmetic and shift operations to be extended to multiples of the processor’s native word width is that of a “carry” status bit. This bit allows one bit of information to be “carried” forward from one instruction to the next without requiring extra instructions to be executed.

For arithmetic operations, this bit remembers whether the instruction operating on the lower-order words of the operands resulted in a numerical “carry” or “borrow” that will affect the instruction operating on the next-higher-order words. Similarly, for shift and rotate instructions, this bit remembers the state of the bit shifted out of one word that needs to be shifted into the next word.

Contributor: David Tweed

Raspberry Pi Maker: An Interview with Eben Upton

About five years ago, a small group of enthusiast designers led by Eben Upton launched a small, inexpensive computer that looked nothing like a normal computer. The bare green PCB board appealed to makers and hackers and the option to connect a keyboard and screen appealed to traditional computer nerds. Today, the Raspberry Pi is the best-selling personal computer in the United Kingdom.

Circuit Cellar recently visited Cambridge, England, to interview Upton about his work at the Raspberry Pi Foundation and more. Check it out.

Arrow Electronics and Conexant Systems Collaborate on Development of Amazon Alexa-Enabled Smart Home Products

Arrow Electronics recently agreed to distribute and source components and provide technical design support for Conexant’s AudioSmart 2-Mic Development Kit for Amazon Alexa Voice Service (AVS). Conexant recently announced a collaboration with Amazon on an AVS-approved AudioSmart 2-Mic Development Kit. Featuring the Conexant AudioSmart CX20921 high-performance hands-free Voice Input Processor and “Alexa” wake word technology, the Conexant AudioSmart 2-Mic Development Kit will help developers and manufacturers quickly and easily build Alexa-enabled products that provide users with an ideal voice experience.Arrow Conexant - kit

The Conexant AVS-approved AudioSmart 2-Mic Development Kit is designed to be easily integrated into any third-party AVS system prototype based on the Raspberry Pi. Its dual-microphone voice processing capability recognizes the “Alexa” wake word and delivers speech requests from anywhere in a room—even in noisy, real-world conditions. It also enables voice barge-in capabilities, allowing users to interrupt their Alexa device when it is playing music or other types of sound.

Source: Conexant

New Scalable Biometric Sensor Platform for Wearables and the IoT

Valencell and STMicroelectronics recently launched a new development kit for biometric wearables. Featuring STMicro’s compact SensorTile turnkey multi-sensor module and Valencell’s Benchmark biometric sensor system, the platform offers designers a scalable solution for designers building biometric hearables and wearables.

The SensorTile IoT module’s specs and features:

  • 13.5 mm × 13.5 mm
  • STM32L4 microcontroller
  • Bluetooth Low Energy chipset
  • a wide spectrum of MEMS sensors (accelerometer, gyroscope, magnetometer, pressure, and temperature sensor)
  • Digital MEMS microphone

Valencell’s Benchmark sensor system’s specs and features:

  • PerformTek processor communicates with host processor using a simple UART or I2C interface protocol
  • Acquires heart rate, VO2, and calorie data
  • Standard flex connector interface

Source: Valencell