On-Chip Flash MCU Uses 28 nm Process Technology

Renesas Electronics has announced the sample shipment of the industry’s first on-chip flash memory microcontroller using a 28 nm process technology. To contribute to the realization of next-generation green cars and autonomous vehicles with higher efficiency and higher reliability, the RH850/E2x Series MCU incorporates up to six 400 MHz CPU cores. According to Renesas, that makes it the first on-chip flash memory automotive MCU to achieve processing performance of 9600 MIPS. The new MCU series also features a built-in flash memory of up to 16 MB as well as enhanced security functions and functional safety.

Under Renesas Autonomy, an open, innovative and trusted platform for assisted and automated driving, Renesas provides end-to-end solutions that advance the evolution of vehicles towards next-generation green cars, connected cars and autonomous-driving vehicles. There are two main pillars of the Renesas Autonomy Platform. One is this new 28 nm automotive control MCU. And the other is the R-Car Family of SoCs designed for cloud connectivity and sensing.
Car OEMs and Tier 1 manufacturers, such as Denso, have already started to adopt the new 28 nm MCU. Reasons cited include the MCU’s superior processing performance capable of developing next-generation fuel-efficient engines, as well as its scalability. Scalability is important because of the expected electronic control unit (ECU) integration to come from changes in automotive electrics/electronics (E/E) architecture.

Following the development of the 28 nm embedded flash memory in February 2015, Renesas announced its collaboration with TSMC on 28nm MCUs in September 2016. The company today hit a major milestone by reaching sample shipment of the world’s first 28nm embedded flash memory MCU on the market. Renesas has already succeeded in verifying large-scale operation of fin-structure MONOS flash memory targeting 16/14nm and beyond generations of MCUs. As the leading supplier of automotive semiconductor solutions, Renesas is committed to advancing the industry through continued technological innovation to achieve a safe and secure automotive society.

To assure scalability in the RH850/E2x Series, in addition to the 28 nm flash memory MCU, Renesas has also launched a 40 nm process MCU. Samples of this MCU are available now. Samples of both 28 nm and 40 nm MCUs from RH850/E2x are  available.

Renesas Electronics | www.renesas.com

Automotive Echo Cancellation Available for NXP Processors

NXP Semiconductors has announced a new echo cancellation noise reduction solution (ECNR) that significantly reduces the problem of noisy voice communications and provides carmakers with a consumer pleasing, hands-free calling experience. The cost-effective solution combines innovative ECNR software that can be easily ported onto NXP i.MX processors and NXP’s leading car radio tuners and DSPs. The new NXP ECNR solution is also ITU-T P1110 and CarPlay pre-certified.
Echo and noise can make communication on the road difficult. Echo occurs when the speakers within a car transmit a voice signal from an incoming call, which subsequently ricochets through the vehicle and returns to the microphone. This causes the caller to hear their own voice, which is distracting and can result in broken communications. Additionally, road noise from fans, exhaust, tires, windows and passengers can infiltrate calls and render them unintelligible, ultimately disrupting the driving experience and causing frustration.

The new NXP ECNR solution deals with both problems by removing echoes and filtering out unwanted noise from the cockpit to enhance the sound quality of conversations. Since the ECNR solution can be ported to NXP chipsets and is ITU-T P1110 and CarPlay pre-certified, it can reduce carmakers’ R&D expenses and speed up the design cycle.

NXPs SAF775x integrates up to 2 AM/FM tuners, radio processing, an automotive audio hub and an open HiFi2 core for advanced audio algorithms. SAF775x has rich analog and digital interfaces, flexible audio mixer and filter structure, and core audio processing algorithms. The SAF775x family radio-audio one chip is a market-proven solution and has been successfully designed in major automotive OEM platforms.

i.MX applications processors offer a feature and performance-scalable multicore platform that includes single, dual and quad-core families based on the Arm® v7-A and Arm v8 architecture based solutions with powerful processing for neural networks, advanced graphics, machine vision, video, audio, voice and safety-critical requirements.

The ECNR algorithm is running on the HiFi2 core of SAF775x, ready be activated by a key code.

NXP Semiconductors | www.nxp.com

Instrumentation Design Challenges and Solutions

Electronic instrumentation and measurement designs are pushing the boundaries of performance, power, and integrated features to meet or exceed the design challenges of various industries. Mouser takes a look at the characteristics modern instruments require to meet customer expectations and important properties of instrumentation amplifiers.

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Designing a Debug and Test Tool

While developing mixed signal IC products, I often longed for a personal, simple to use, analog and digital pattern generator tool. So after retiring, I decided to create one. Read how Validator 1, a USB benchtop debug and test tool, was developed.


 

by William Holt, retired founder of Holt IC

During a career largely spent developing mixed signal IC products, I often longed for a personal, simple to use, analog and digital pattern generator tool. Numerous occasions arose where it was necessary to check performance or parameters of an IC, a breadboard, or an application board. Sometimes the setup was trivial: a few supplies and a signal generator or two. And sometimes the setup was quite complex.  I had a few tools for the tougher problems but there was usually something not quite matching up – logic or interface voltages, offset, synchronization, limited pattern width or length, and limited pattern control options. After retiring, I looked for a project to fill the void and decided to take on the challenge of creating a personal debug and test tool.

The first step was to make a wish list for performance and functions:

  • 16 digital input / output (DIO) pins and 2 high voltage DACs
  • Able to interface with any digital voltage standard
  • run digital patterns from DC to 50 Mhz
  • have a pattern depth of at least 4 Meg per pin and up to 1,000 clocks at each pattern line
  • pattern controls for looping and branching
  • easily expandable to synchronously drive up to 64 channels in parallel
  • test any channel for its digital state at any time step and show where the fault is in the pattern
  • output arbitrary analog waveforms in the -10V to +10V range in sync with the digital
  • start patterns from either an edge or a button push
  • nonvolatile memory for standalone operation
  • easy to program
  • under $500

But first, why should I try to create such a tool if one is already available? There are indeed options to consider. Let’s take a closer look at some possibilities:

Off the Shelf Pattern Generators

A variety of commercial products could fulfill the digital pattern generator function and some include analog capability. However the “under $500” criteria eliminates most. The remaining options usually require converting the pattern to code if the pattern is large and complex. Some do provide software to input patterns via a timing diagram. Timing diagrams work fine for simple requirements.

Microcontrollers with GPIO and DACs

This option can work provided the output/input voltages available at the digital and analog pins are compatible with the DUT.  Manufacturers provide development boards and software that allow access to the GPIO pins and other peripheral assets. The issues are:

1. Getting significant pattern depth (memory) behind each pin
2. Finding an easy way to translate pattern into code.

FPGA

FPGAs can provide adequate memory bits behind each pin and a variety of on-chip resources.  If you are willing to spend the time to design the tool yourself, this path will work. Indeed, this became my solution. I embarked on a software / hardware design project to make a unique product called Validator 1

The Validator Pattern Generator Design

The hardware implementation of a digital and analog bit pattern generator is straightforward. Consider the architecture shown in the Block Diagram below. The basic output mechanism is to clock the memory address counter, read the next line of massively parallel memory bits, and feed the result to the outside world. The faster this path, the higher the maximum frequency. The data accessed with each read cycle is a line of pattern data.  Lines of pattern then correspond to a memory address.

Before a pattern can be run, we need a convenient way to load memory with the pattern. The method selected was by USB communication with a host program.

     

USB Interface

Setup and pattern data will be read from a CSV file and passed by host software, via USB, to pattern memory RAM and, simultaneously, to duplicate nonvolatile pattern memory RAM. The ideal design would combine both RAMs into one memory but issues with speed and available FPGA resources prohibit this option for now.

The 8051 microcontroller provides the USB interface. A host command initiates an 8051 sequence to convert the serial USB stream into 8 bit bytes which are transferred to the Memory Write State Machine by GPIO.   Additional GPIO pins signal start, finish, and byte order. The first bytes pass a code telling the State Machine whether this will be a memory load or alternatively, a command for the Pattern Control block, like Run or Reset.

The Auto Load Sequencer block provides the mechanism to read back nonvolatile memory into pattern memory when initiated by a Load button closure. This fulfills the goal of standalone operation. Data flow to the State Machine from nonvolatile memory is identical to a USB download from the 8051.

The Periodic Status Transmit block creates a serial UART string at set intervals and sends it to the 8051.   This string is coded to display the status, address, and fail channels on the host program control panel. The 8051 automatically passes it by USB to the host.

Setup Memory block

Each pattern load starts with a string of Setup Data for these setup choices:

Select External or Internal Clock
Select Clock division from 1 to 1024 (0 equals divide by 1,000,000)
Select whether to start on a SYNC input edge or on the Run button closure
Select which SYNC edge, positive or negative
Select whether to stop the pattern immediately on any Fail condition
Select whether to output the internal clock at the EXT CLK input (provide a clock source for parallel units)

Jump Address Memory block

The pattern memory address counter can be jammed with a Jump address. The CSV file has a label column which, if not void, will trigger a write of the current Line address into one of 15 bytes of Jump address memory. When a subsequent line command requires a jump, the label specified is the address of the Jump address. The Jump can be qualified by the result of a test at the current line.

Pattern Control and Timing block

What is seen at the DIO and DAC pins as a pattern executes is under the control of the Pattern Memory Address Counter.   Clocking or jamming the counter always causes a Read cycle.  So controlling when to clock or jam the counter controls the pattern. The Control Block does this task. It reads Line commands and the number of clocks to issue. It also controls start and stop and reports run status to the host.

DIO State Decoder and Test block

DIO data is not just force 1 or 0. To test and to interface to 3 state busses, the pins need further options:

Drive a One
Drive a Zero
High impedance
Test to be a One
Test to be a Zero
Output the System Clock

Miscellaneous

The entire design, excepting the DACs and nonvolatile memory, fits an FPGA, the Lattice MachX02 7000.  The design includes several housekeeping details such as :

  1. For parallel units running in synchronous operation, the FPGA provides two pins, a Start input and a Start output. One unit is chosen the master and its Start output would be wired to all slave Start inputs.
  2. Pause and then step or run again.
  3. Backup the control panel display with LEDs for standalone status display.
  4. Provide outputs that pulse the moment a test fails.

Mechanical Design

A Toolless plastic design was chosen for the enclosure which mates to a single PCB.


The final Validator hardware

The next step was to figure out the best way to get pattern data into a CSV file.

PATTERN TEMPLATE DESIGN

A pattern generator tool might sit in the toolbox for long periods until setup stimuli are needed. If specialized software is required to program the pattern, a refresher study of the manuals might have to proceed preparing patterns. Might there be an advantage if the pattern creation method used familiar software?

Since its inception, spreadsheet software has been adopted for a variety of chores, both business and personal. It could fit the label of “familiar software” and has advantages for creating patterns. The format could look like traditional ATE (Automated Test Equipment) with line by line time steps. Strong editing capabilities and auto indexing could make large patterns manageable. With an elapsed time column it would be possible to write equations as a function of time for the DAC voltages. For frequently used communication protocols, a couple of worksheets could make data handling simple, one for inputting data for transactions and another to automatically read the data and distribute to the right places for the download file. Choosing a fixed spreadsheet template should make it possible to enter pattern data immediately without refresher issues. A spreadsheet is easily saved as a CSV file.

Once settled on using the spreadsheet to input patterns, the next step was to assign the order of data in a template. The selected presentation was arbitrary and hopefully flows in a logical sequence.

FIGURE 2.  Pattern Entry Template

When the host software reads the CSV file, it will ignore any line without a Line Number in column A with the exception of Setup Data in row 7. It also ignores any data after the last column, which is column H for Setup Data and column X for Line Data. The ignored columns and rows can be used for annotation or housekeeping.

HOST SOFTWARE DESIGN

With hardware and pattern entry template defined, a host program is required to read the CSV file, format and deliver data to the USB sequencer, and receive back USB data to display status and results.

Visual C++ MFC was selected for this task.   A simple control panel with buttons and edit boxes was constructed using a Dialog Application:

                                        MFC Dialog Panel

Host software design tasks included:

  • Recognize and administrate the USB connection
  • Provide browsing for a CSV file to download
  • Error check the CSV file and provide intuitive messages to assist user debugging.
  • Send data from the selected download file to hardware by USB
  • Send codes to hardware when control button controls are pushed.
  • Periodically check for USB data coming from hardware and update the display in the edit boxes.


ADD A BREAKOUT BOARD

The DIO channels from the FPGA are 3.3V. To satisfy the “any digital voltage” objective, translators are required. A Breakout Board accessory is also needed to provide a connector option for interfacing DIO channels to a DUT. It was decided to combine the two requirements and design a Breakout Board with translators.

Each translated DIO channel should be bidirectional just like the non-translated FPGA DIO pins. One way to accomplish this is to use two 3.3V channels to make one translated channel. One 3.3V DIO channel is data (one, zero, or input) and the other 3.3V channel supplies direction. A TI SN74LVC1T45 bus transceiver was selected for the translators.

For translated patterns, a worksheet was made to look like the 16 channel template except there are only 8 DIO channels. The data from this worksheet is read by the cells of a standard 16 DIO template in a separate worksheet. The “reading” worksheet will become the CSV file. The “reading” DIO cells interpret the 8 translation DIO channel inputs to automatically create 8 pairs, direction and data. The user only has to remember to save the “reading” worksheet to CSV format for download.

The Breakout Board has duplicate connectors on each side of the board. One set is input to the translators. The other set is near the uncommitted area for wiring a mating connector to the DUT or perhaps to add interface electronics like protocol bus transceivers.

                                                        Breakout Board with Translators

 

EXAMPLE APPLICATION

To illustrate applying the Validator to a real world task, I wrote a step by step Example Application note, “Measure an ARINC 429 Receiver Threshold”. The DACs were used to generate a ramping amplitude differential voltage and the digital was used to do SPI communication. The target is a mixed signal IC, the HI-3598 which has an analog receiver whose threshold is measured.


Example Application Setup

 SPI routines followed by differential DAC waveforms

VALIDATOR 1 IS AVAILABLE

The finished product is available for purchase by a newly formed business called Sequim Tek located in, of course, Sequim, Washington.

Example Patterns are available for download including a pulse generator, a waveform generator, and an SPI communication example. They are meant to illustrate a few of the ways a pattern created by a spreadsheet can be customized.

About the Author
William Holt started designing CMOS ICs at Motorola SPD in 1970 after receiving a BSEE from the University of Utah. In 1976, he founded Holt IC in Southern California which provides standard IC products to the avionics and military markets.

Sponsored by: Sequim Tek

Wi-Fi Bluetooth LTE Companion Module Targets IoT

Telit has announced the release of a new module, the WE866C3.  A companion to Telit’s LTE LE910Cx family, the new module advances the ability to deliver LTE and Wi-Fi integration for IoT applications including security panels, video bridges, medical devices, telematics and remote sensors.

Telit’s WE866C3 is a low power, high bandwidth 802.11ac and Bluetooth 4.2 module with a small footprint that provides an easy and cost-effective way for manufacturers to add wireless connectivity to new and existing products. Advanced LTE, Wi-Fi and Bluetooth coexistence dramatically reduces complexity designing cellular back haul with the LE910Cx 4G LTE module family, making the WE866C3 ideal for a wide range of IoT applications including commercial building automation, OEM telematics, fleet management and video surveillance.

The module shortens time to market with off-the-shelf cloud connectivity through deviceWISE, over-the-air firmware updating, support for WPA/WPA2 personal and enterprise security and more. Developer tools, engineering support and comprehensive global certifications make it easy for integrators and OEMs to upgrade or launch new products.

Telit | www.telit.com

Dual-Mode Bluetooth Module for the Industrial IoT

U‑blox has announced the new NINA‑B2 dual‑mode Bluetooth 4.2 stand‑alone module, enabling industrial IoT applications thanks to its built‑in secure boot and wide temperature ranges. Pre‑flashed with U‑blox connectivity software which supports many common use cases such as Beacon, GATT client, GATT server and serial port, NINA‑B2 is configured easily using AT commands over UART, without requiring deep knowledge of the Bluetooth protocol.  Already tested and certified globally, it also reduces development costs and speeds time to market.

NINA‑B2’s built‑in secure boot guarantees that the software is authenticated by u‑blox and has therefore not been tampered with. This provides a secure operating environment for the Bluetooth module. NINA‑B2 is very compact, at 10 mm x 10.6 mm x 2.2mm (without antenna) and 10 mm x 14 mm x 3.8 mm (with antenna).

Most of the Bluetooth modules at this scale are single‑mode Bluetooth low energy or Bluetooth BR/EDR devices. NINA‑B2’s size makes it an easy fit in any IoT device. It is also pin‑compatible with the u‑blox NINA family, allowing it to be easily swapped in or out with other NINA modules, with their different radio technologies such as Bluetooth low energy and Wi‑Fi.

Apart from industrial automation such as machine control devices, industrial terminals and products for remote control, possible applications also include wireless‑connected and configurable equipment, point of sale, telematics and health devices. NINA‑B2 is expected to go into production in summer 2018.

U-Blox | www.u-blox.com

Tiny, Rugged IoT Gateways Offer 10-Year Linux Support

By Eric Brown

Moxa has announced the UC-2100 Series industrial IoT gateways along with its new UC 3100 and UC 5100 Series, but it offered details only on the UC-2100. All three series will offer ruggedization features, compact footprints, and on some models, 4G LTE support. They all run Moxa Industrial Linux and optional ThingsPro Gateway data acquisition software on Arm-based SoCs.

 

Moxa UC-2111 or UC-2112 (left) and UC-2101 (click image to enlarge)

Based on Debian 9 and a Linux 4.4 kernel, the new Moxa Industrial Linux (MIL) is a “high-performance, industrial-grade Linux distribution” that features a container-based virtual-machine-like middleware abstraction layer between the OS and applications,” says Moxa. Multiple isolated systems can run on a single control host “so that system integrators and engineers can easily change the behavior of an application without worrying about software compatibility,” says the company.

MIL provides 10-year long-term Linux support, and is aimed principally at industries that require long-term software, such as power, water, oil & gas, transportation, and building automation industries. In December, Moxa joined the Linux Foundation’s Civil Infrastructure Platform (CIP) project, which is developing a 10-year SLTS Linux kernel for infrastructure industries. MIL appears to be in alignment with CIP standards.

Diagrams of ThingsPro Gateway (top) and the larger ThingsPro eco-system (bottom) (click images to enlarge)

Moxa’s ThingsPro Gateway software enables “fast integration of edge data into cloud services for large-scale IIoT deployments,” says Moxa. The software supports Modbus data acquisition, LTE connectivity, MQTT communication, and cloud client interfaces such as Amazon Web Services (AWS) and Microsoft Azure. C and Python APIs are also available.

 

Moxa’s UC-3100 (source: Hanser Konstruktion), and at right, the similarly Linux-driven, ThingsPro ready UC-8112 (click images to enlarge)

Although we saw no product pages on the UC-3100 and UC-5100, Hanser Konstruktion posted a short news item on the UC-3100 with a photo (above) and a few details. This larger, rugged system supports WiFi and LTE with two antenna pairs, and offers a USB port in addition to dual LAN and dual serial ports.

The new systems follow several other UC-branded IoT gateways that run Linux on Arm. The only other one to support ThingsPro is the UC-8112, a member of the UC-8100 family. This UC-8100 is similarly ruggedized, and runs Linux on a Cortex-A8 SoC.

UC-2100

The UC-2100 Series gateways runs MIL on an unnamed Cortex-A8 SoC clocked at 600MHz except for the UC-2112, which jumps to 1GHz. There are five different models, all with 9-48 VDC 3-pin terminal blocks and a maximum consumption of 4 Watts when not running cellular modules.

The five UC-2100 models have the following dimensions, weights, and maximum input currents:

  • UC-2101 — 50 x 80 x 28mm; 190 g; 200 mA
  • UC-2102 — 50 x 80 x 28mm; 190 g; 330 mA
  • UC-2104 — 57 x 80 x 30.8mm; 220 g; 800 mA
  • UC-2111 — 77 x 111 x 25.5mm; 290 g; 350 mA
  • UC-2112 — 77 x 111 x 25.5mm; 290 g; 450 mA

All five UC-2100 variants default to a -10 to 60°C operating range except for the UC-2104, which moves up to -10 to 70°C. In addition, they are all available in optional -40 to 75°C versions.

Other ruggedization features are the same, including anti-vibration protection per IEC 60068-2-64 and anti-shock per IEC 60068-2-2. A variety of safety, EMC, EMI, EMS, and hazardous environment standards are also listed.

The first three models ship with 256MB DDR3, while the UC-2111 and UC-2112 offer 512MB. These two are also the only ones to offer micro-SD slots. All five systems ship with 8GB eMMC loaded with the MIL distribution.

The UC-2100 systems vary in the number and type of their auto-sensing, 1.5 kV isolated Ethernet ports. The UC-2101 and UC-2104 each have a single 10/100Mbps port, while the UC-2102 and UC-2111 have two. The UC-2112 has one 10/100 and one 10/100/1000 port. The UC-2104 is the only model with a mini-PCIe socket for 4G or WiFi.

The UC-2111 and UC-2112 offer 2x RS-232/422/48 ports while the UC-2101 has one. It would appear that the UC-2102 and UC-2104 lack serial ports altogether except for the RS-232 console port available on all five systems.

The UC-2100 provides push buttons and dip switches, an RTC, a watchdog, and LEDs, the number of which depend on the model. A wall kit is standard, and DIN-rail mounting is optional. TPM 2.0 is also optional. A 5-year hardware warranty is standard.

Further information

The UC-2100 Series gateways appear to be available for order, with pricing undisclosed. More information may be found on Moxa’s UC-2100 product page. More information about the UC-2100, as well as the related, upcoming UC-3100 and UC-5100 Series, will be on tap at Hannover Messe 2018, April 23-27, at the Arm Booth at Hall 6, Booth A46.

Moxa | www.moxa.com

This article originally appeared on LinuxGizmos.com on April 16.

Microsoft Unveils Secure MCU Platform with a Linux-Based OS

By Eric Brown

Microsoft has announced an “Azure Sphere” blueprint for for hybrid Cortex-A/Cortex-M SoCs that run a Linux-based Azure Sphere OS and include end-to-end Microsoft security technologies and a cloud service. Products based on a MediaTek MT3620 Azure Sphere chip are due by year’s end.

Just when Google has begun to experiment with leaving Linux behind with its Fuchsia OS —new Fuchsia details emerged late last week— long-time Linux foe Microsoft unveiled an IoT platform that embraces Linux. At RSA 2018, Microsoft Research announced a project called Azure Sphere that it bills as a new class of Azure Sphere microcontrollers that run “a custom Linux kernel” combined with Microsoft security technologies. Initial products are due by the end of the year aimed at industries including whitegoods, agriculture, energy and infrastructure.

Based on the flagship, Azure Sphere based MediaTek MT3620 SoC, which will ship in volume later this year, this is not a new class of MCUs, but rather a fairly standard Cortex-A7 based SoC with a pair of Cortex-M4 MCUs backed up by end to end security. It’s unclear if future Azure Sphere compliant SoCs will feature different combinations of Cortex-A and Cortex-M, but this is clearly an on Arm IP based design. Arm “worked closely with us to incorporate their Cortex-A application processors into Azure Sphere MCUs,” says Microsoft. 

Azure Sphere OS architecture (click images to enlarge)

Major chipmakers have signed up to build Azure Sphere system-on-chips including Nordic, NXP, Qualcomm, ST Micro, Silicon Labs, Toshiba, and more (see image below). The software giant has sweetened the pot by “licensing our silicon security technologies to them royalty-free.”

Azure Sphere SoCs “combine both real-time and application processors with built-in Microsoft security technology and connectivity,” says Microsoft. “Each chip includes custom silicon security technology from Microsoft, inspired by 15 years of experience and learnings from Xbox.”

The design “combines the versatility and power of a Cortex-A processor with the low overhead and real-time guarantees of a Cortex-M class processor,” says Microsoft. The MCU includes a Microsoft Pluton Security Subsystem that “creates a hardware root of trust, stores private keys, and executes complex cryptographic operations.”

The IoT oriented Azure Sphere OS provides additional Microsoft security and a security monitor in addition to the Linux kernel. The platform will ship with Visual Studio development tools, and a dev kit will ship in mid-2018.

Azure Sphere security features (click image to enlarge)

The third component is an Azure Sphere Security Service, a turnkey, cloud-based platform. The service brokers trust for device-to-device and device-to-cloud communication through certificate-based authentication. The service also detects “emerging security threats across the entire Azure Sphere ecosystem through online failure reporting, and renewing security through software updates,” says Microsoft.

Azure Sphere eco-system conceptual diagram (top) and list of silicon partners (bottom)

In many ways, Azure Sphere is similar to Samsung’s Artik line of IoT modules, which incorporate super-secure SoCs that are supported by end-to-end security controlled by the Artik Cloud. One difference is that the Artik modules are either Cortex-A applications processors or Cortex-M or -R MCUs, which are designed to be deployed in heterogeneous product designs, rather than a hybrid SoC like the MediaTek MT3620.Hybrid, Linux-driven Cortex-A/Cortex-M SoCs have become common in recent years, led by NXP’s Cortex-A7 based i.MX7 and -A53-based i.MX8, as well as many others including the -A7 based Renesas RZ/N1D and Marvell IAP220.

MediaTek MT3620

The MediaTek MT3620 “was designed in close cooperation with Microsoft for its Azure Sphere Secure IoT Platform,” says MediaTek in its announcement. Its 500MHz Cortex-A7 core is accompanied by large L1 and L2 caches and integrated SRAM. Dual Cortex-M4F chips support peripherals including 5x UART/I2C/SPI, 2x I2S, 8x ADC, up to 12 PWM counters, and up to 72x GPIO.

The Cortex-M4F cores are primarily devoted to real-time I/O processing, “but can also be used for general purpose computation and control,” says MediaTek. They “may run any end-user-provided operating system or run a ‘bare metal app’ with no operating system.”

In addition, the MT3620 features an isolated security subsystem with its own Arm Cortex-M4F core that handles secure boot and secure system operation. A separate Andes N9 32-bit RISC core supports 1×1 dual-band 802.11a/b/g/n WiFi.

The security features and WiFi networking are “isolated from, and run independently of, end user applications,” says MediaTek. “Only hardware features supported by the Azure Sphere Secure IoT Platform are available to MT3620 end-users. As such, security features and Wi-Fi are only accessible via defined APIs and are robust to programming errors in end-user applications regardless of whether these applications run on the Cortex-A7 or the user-accessible Cortex-M4F cores.” MediaTek adds that a development environment is avaialble based on the gcc compiler, and includes a Visual Studio extension, “allowing this application to be developed in C.”

Microsoft learns to love LinuxIn recent years, we’ve seen Microsoft has increasingly softened its long-time anti-Linux stance by adding Linux support to its Azure service and targeting Windows 10 IoT at the Raspberry Pi, among other experiments. Microsoft is an active contributor to Linux, and has even open-sourced some technologies.

It wasn’t always so. For years, Microsoft CEO Steve Ballmer took turns deriding Linux and open source while warning about the threat they posed to the tech industry. In 2007, Microsoft fought back against the growth of embedded Linux at the expense of Windows CE and Windows Mobile by suing companies that used embedded Linux, claiming that some of the open source components were based on proprietary Microsoft technologies. By 2009, a Microsoft exec openly acknowledged the threat of embedded Linux and open source software.

That same year, Microsoft was accused of using its marketing muscle to convince PC partners to stop providing Linux as an optional install on netbooks. In 2011, Windows 8 came out with a new UEFI system intended to stop users from replacing Windows with Linux on major PC platforms.


Azure Sphere promo video

Further information

Azure Sphere is available as a developer preview to selected partners. The MediaTek MT3620 will be the first Azure Sphere MCU, and products based on it should arrive by the end of the year. More information may be found in Microsoft’s Azure Sphere announcement and product page.

Microsoft | www.microsoft.com

This article originally appeared on LinuxGizmos.com on April 16.

STM32 Software Brings Alexa Tech to Simple Connected Objects

The X-CUBE-AVS software package from STMicroelectronics enables Amazon’s Alexa Voice Service (AVS) to run on STM32 microcontrollers, allowing simple connected objects such as smart appliances, home-automation devices, and office products to support advanced conversational user interfaces with Cloud-based intelligence like automatic speech recognition and natural-language understanding.

As an expansion package for the STM32Cube software platform, X-CUBE-AVS contains ready-to-use libraries and open routines that accelerate porting the AVS SDK (Software Development Kit) to the microcontroller. With application samples also included, it abstracts developers from the complex software layers needed to host AVS on an embedded device. Being the first such package to cater specifically for microcontrollers, whereas AVS development usually targets more power-hungry and expensive microprocessors, X-CUBE-AVS makes Alexa technology accessible to a wider spectrum of developers and projects.
The software handles low-layer communication and connection to AVS servers, provides application-specific services, and encapsulates the AVS protocol to ease application implementation. Connection management includes a persistent-token mechanism for directly restoring connection losses without repeated user authentication. A software test harness is provided for endurance testing, which can simulate events such as network disconnection to facilitate robustness testing and validation of the user application.

X-CUBE-AVS comes with a demonstration example for the STM32F769 Discovery Kit (order code: 32F769IDISCOVERY), which shows how to connect a simple smart-speaker to AVS, leveraging the board-configuration interface included in the software. X-CUBE-AVS can be used with other STM32F7 microcontrollers, or any STM32 device with adequate CPU performance and memory to run the AVS SDK.

X-CUBE-AVS is available now to download, free of charge, from http://www.st.com/x-cube-avs

STMicroelectronics | www.st.com

May (issue #334) Circuit Cellar Article Materials

Click here for the Circuit Cellar article code archive

p. 6: Temperature Logger Uses Raspberry Pi: Sensor and Software Challenges, By Nick Boers

Bus buffer datasheet: www.nxp.com/docs/en/data-sheet/P82B715.pdf
Temperature sensor datasheet: ww1.microchip.com/downloads/en/DeviceDoc/21909d.pdf
Analog-digital converter datasheet: ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf
DC-DC converter datasheet: www.diodes.com/assets/Datasheets/AP1509.pdf
LCD display datasheet: www.newhavendisplay.com/specs/NHD-0420D3Z-NSW-BBW-V3.pdf

Newhaven Display | www.newhavendisplay.com
Adafruit | www.adafruit.com
Diodes Incorporated | www.diodes.com
Microchip Technology | www.microchip.com

p 12: Obsolescence-Proof Your UI (Part 2): Web Server Strategy, By Steve Hendrix

Definition of “Wedged”:  A “wedge” is an older technique, less commonly used today, whereby a programmer would add functionality to an existing program (often a device driver) by inserting a call to his custom function in the middle of that existing program. In this way, he could leverage the work already done in the device driver, but add a new function. As an example, I inserted a wedge in the keyboard driver of my very first PC, an Ohio Scientific Superboard II, to remap the keyboard to the Dvorak arrangement. In much the same way, this “wedge” deflects your attention from the mainline text to add a bit of functionality!

References:
Jeff Bachiochi, “Serving Up HTML”, Circuit Cellar, June 2016 / July 2016
Microchip, “TCPIP Stack Help.chm”, provided with the downloadable TCP/IP stack
Steve Hendrix, “Personal Solar Power Setup”, Circuit Cellar, July 2014 / August 2014

HTML Elements: https://developer.mozilla.org/en-US/docs/Web/HTML/Element
HPGL tools: http://www.ke5fx.com/gpib/readme.htm
Announcement monitor: www.logview4net.com

Angry IP Scanner | www.angryip.org
Digi-Key | www.digikey.com
Microchip | www.microchip.com

p. 18: Device Silences TV Commercials: Arduino-Controlled Solution,
By Tommy Tyler

AliExpress: YurKuong Shenzhen YK Remote Control Store

Parts List:
Item                      Description                                      Quantity       DigiKey Part #   
R10, R30              Resistor, 1/4W, 10K 5%                            2        CF14JT10K0CT-ND
R20                       Resistor, 1/4W, 1K 5%                              1        CF14JT1K00CT-ND
LED10                  BLUE LED, 4.8MM                                     1        VAOL-5LSBY2-ND
LED20                  RED LED, 5MM                                          1        67-1105-ND
U10                       IC, SPST CMOS sw/TS12A4514               1         296-21908-5-ND
XU10                     IC Socket, 8-pin                                          1        AE9986-ND
S10, S20               Switch, Tactile, SPST-NO                          2        450-1647-ND
UHF Module          Shenzhen YK Remote Control                   1         (See text)
IR Module              Chunghop Learning Remote Control         1         (See text)
Timer Module        Trinket Mini MCU Board, 3.3V                     1         1528-1020-ND
Enclosure              Bud Utilibox CU-1941                                 1         377-2068-ND

Adafruit | www.adafruit.com
Chunghop | www.chunghop.com/en/
Digi-Key | www.digikey.com
Microchip Technology | www.microchip.com
Oshpark | www.oshpark.com


p. 26: Exploring the Benefits of eFPGAs: FPGAs Used as IP Blocks, By Geoff Tate

Flex Logix Technologies | www.flex-logix.com

p.32: Drones Embrace a Variety of Video Solutions: Eyes in the Skies, By Jeff Child

Ambarella | www.ambarella.com
FLIR Systems | www.flir.com
Lucint Systems | www.lucintsystems.com
Overwatch Imaging | www.overwatchimaging.com
Rajant | www.rajant.com
Sightline Applications | www.sightlineapplications.com
Silvus Technologies | www.silvustechnologies.com
Visual Intelligence | www.visualintelligenceinc.com

p.40: Quick Prototyping Solutions: PCB Makers Up Their Game, By Jeff Child

Accutrace | www.pcb4u.com
Advanced Circuits | www.4pcb.com
AP Circuits | www.apcircuits.com
Beta Layout | uk.beta-layout.com
Custom Circuit Boards | www.customcircuitboards.com
EzPCB | www.ezpcb.com
Epec | www.epectec.com
Imagineering | www.pcbnet.com
MacroFab | www.macrofab.com
OurPCB | www.ourpcb.com
PCBCART | www.pcbcart.com
PCB Unlimited | www.pcbunlimited.com
Screaming Circuits | www.screamingcircuits.com
Sierra Circuits | www.protoexpress.com
SlingShot Assembly | www.slingshotassembly.com

p. 50: The Populist Side-Channel Attack: An Overview of Spectre, By Colin O’Flynn

Paul Kocher, Daniel Genkin, Daniel Gruss, Werner Haas, Mike Hamburg, Moritz Lipp, Stefan Mangard, Thomas Prescher, Michael Schwarz, Yuval Yarom. “Spectre Attacks: Exploiting Speculative Execution”. See https://spectreattack.com/ for paper & demos.

Daniel J. Berstein. “Cache-timing attacks on AES”.

Microchip Technology | www.microchip.com

p. 54: Stepper Motor Waveforms: A Journey in Microsteps, By Ed Nisley

Background columns:
March 2018 Circuit Circuit issue 332: Stepper Motor Waveforms

Background blog posts:
MPCNC assembly: https://softsolder.com/2017/11/06/mostly-printed-cnc-mechanical-build

Components:
Mostly Printed CNC: https://www.v1engineering.com
Protoneer Arduino CNC Shield v3: https://blog.protoneer.co.nz/arduino-cnc-shield-v3-00-assembly-guide
GRBL G-code firmware: https://github.com/gnea/grbl

Resources:
Protoneer.co.nz | www.blog.protoneer.co.nz
Tektronix | www.tek.com
V1 Engineering | www.v1engineering.com

p. 61: Accelerometers Revisited: MEMS and More, By George Novacek

March 2018 Circuit Circuit issue 332: Measuring Acceleration

Choosing Most Suitable MEMS Accelerometer 1
Choosing Most Suitable MEMS Accelerometer 2
Introduction to MEMS vibration Monitoring

Analog Devices | www.analog.com
SparkFunElectronics | www.sparkfun.com

p. 66: Wireless Charging: Electric Field of Dreams, By Jeff Bachiochi

WPC- Wireless Power Consortium: www.wirelesspowerconsortium.com
Qi specifications V1.2.2 :   www.wirelesspowerconsortium.com/developers/specification.html
A4WP -Alliance For Wireless Power www.airfuel.org
PMA – Power Matters Alliance www.airfuel.org

Adafruit Qi Wireless Charging Transmitter – www.adafruit.com/product/2162
Adafruit Qi Wireless Receiver Module –        www.adafruit.com/product/1901
Texas Instruments: bq51013B – Highly Integrated Wireless Receiver Qi (WPC v1.1) Compliant Power Supply
ST Microelectronics: STC4054  800mA Standalone linear Li-Ion Battery Charger with thermal regulation
Recom Power: REE-0505S     –           1W DC/DC-Converter
RKZ-0505S     –           2W DC/DC-Converter
RKZ3-0505S  –           3W DC/DC-Converter

Adafruit | www.adafruit.com
RECOM | www.recom-power.com
STMicrolectronics | www.st.com
Texas Instruments | www.ti.com

Tuesday’s Newsletter: IoT Tech Focus

Coming to your inbox tomorrow: Circuit Cellar’s IoT Technology Focus newsletter. Tomorrow’s newsletter covers what’s happening with Internet-of-Things (IoT) technology–-from devices to gateway networks to cloud architectures. This newsletter tackles news and trends about the products and technologies needed to build IoT implementations and devices.

Bonus: We’ve added Drawings for Free Stuff to our weekly newsletters. Make sure you’ve subscribed to the newsletter so you can participate.

Already a Circuit Cellar Newsletter subscriber? Great!
You’ll get your IoT Technology Focus newsletter issue tomorrow.

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Don’t be left out! Sign up now:

Our weekly Circuit Cellar Newsletter will switch its theme each week, so look for these in upcoming weeks:

Embedded Boards.(4/24) The focus here is on both standard and non-standard embedded computer boards that ease prototyping efforts and let you smoothly scale up to production volumes.

Analog & Power. (5/1) This newsletter content zeros in on the latest developments in analog and power technologies including DC-DC converters, AD-DC converters, power supplies, op amps, batteries and more.

Microcontroller Watch (5/8) This newsletter keeps you up-to-date on latest microcontroller news. In this section, we examine the microcontrollers along with their associated tools and support products.

Step-Down Converters Target Always-On Car Systems

Maxim Integrated Products has announced the ultra-compact, pin-compatible MAX20075 and MAX20076 step-down converters that enable system designers looking to create small and highly efficient 40-V load dump-tolerant applications. The MAX20075 and MAX20076 step-down converters offer low quiescent current (IQ) and feature integrated compensation. This enables minimal external components that can lead up to 50% savings in board space making them well-suited for always-on automotive applications.

According to Maxim Integrated, car customers expect always-on applications to bring them experiences richer and more compelling than ever before. However, car system designers are challenged with having to balance delivering advanced features with meeting size constraints, power-saving features and high efficiency.

The MAX20075 and MAX20076 in peak current mode draw just 3.5 µA in the low power operating mode, which is key to meeting the stringent OEM IQ consumption requirements of 100 µA per module. The converters enable low noise operation via pin-controlled spread spectrum and fixed 2.1 MHz operation to meet CISPR 25 Class 5 EMI compliance. Furthermore, added advantage of the 2.1 MHz operation and internal compensation is that it lowers the solution size and the bill of materials (BOM) compared to a non-synchronous device that operates in the AM band.

The MAX20075 and MAX20076 are available with a low minimum on-time mode operation, which allows the converters to support large input-to-output conversion ratios. For example, Vbatt input to Vout of less than 3 V at 2.1 MHz; this translates to not having to use a secondary supply, which reduces overall BOM cost by $0.30 to incorporate new functions into the design for greater flexibility. The MAX20075 and MAX20076 meet AEC-Q100, are available in a 3 mm x 3 mm TDFN package, and operate over the -40°C to +125°C temperature range.

Maxim Integrated | www.maximintegrated.com

Non-isolated Up Converters Support High-Performance GPUs

Vicor has announced a 12 V to 48 V non-isolated up converter to support 48 V high-performance GPUs in data centers that are still relying on legacy 12 V power distribution. The 2317 NBM converts 12 V to 48 V with over 98% peak efficiency, 750 W continuous and 1 kW peak power in a 23 mm x 17 mm x 7.4mm surface-mount SM-ChiP package. The NBM (NBM2317S14B5415T00) provides a complete solution with no external input filter or bulk capacitors required. By switching at 2 MHz with ZVS and ZCS, the NBM provides low output impedance and Megahertz-fast transient response to dynamic loads. The NBM incorporates hot-swap and inrush current limiting.

The NBM supports state-of-the-art 48 V input GPUs using Power-on-Package (“PoP”) Modular Current Multipliers (“MCMs”) driven from a 48 V node sourcing a small fraction (1/48th) of the GPU current. Current multiplication overcomes the power delivery boundaries imposed by traditional 12 V systems standing in the way of higher bandwidth and connectivity.

The Vicor Power-on-Package modules build upon Factorized Power Architecture (FPA) systems deployed in high-performance computers and large-scale data centers. FPA provides efficient power distribution and direct conversion from 48 V to 1 V for GPUs, CPUs and ASICs demanding up to 1,000 A. By deploying current multiplication in close proximity to high-current Artificial Intelligence (AI) processors, PoP MCMs enable higher performance and system efficiency.

Vicor | www.vicorpower.com

 

Preventing IOT Edge Device Vulnerabilities

FREE White Paper –
Security issues around IoT edge devices are rarely mentioned in the literature. However, the projected billions of IoT edge devices out in the wild makes for a vast attack surface. Should hardware designers be concerned about security for IoT edge devices? And, is it worth the effort and cost to ensure security at this level? We explore internal design vulnerabilities and 3rd-party attacks on IoT edge devices in this paper in order to answer that question.

Get your copy – here