Amplifier Classes from A to H

Engineers and audiophiles have one thing in common when it comes to amplifiers. They want a design that provides a strong balance between performance, efficiency, and cost.

If you are an engineer interested in choosing or designing the amplifier best suited to your needs, you’ll find columnist Robert Lacoste’s article in Circuit Cellar’s December issue helpful. His article provides a comprehensive look at the characteristics, strengths, and weaknesses of different amplifier classes so you can select the best one for your application.

The article, logically enough, proceeds from Class A through Class H (but only touches on the more nebulous Class T, which appears to be a developer’s custom-made creation).

“Theory is easy, but difficulties arise when you actually want to design a real-world amplifier,” Lacoste says. “What are your particular choices for its final amplifying stage?”

The following article excerpts, in part, answer  that question. (For fuller guidance, download Circuit Cellar’s December issue.)

CLASS A
The first and simplest solution would be to use a single transistor in linear mode (see Figure 1)… Basically the transistor must be biased to have a collector voltage close to VCC /2 when no signal is applied on the input. This enables the output signal to swing

Figure 1—A Class-A amplifier can be built around a simple transistor. The transistor must be biased in so it stays in the linear operating region (i.e., the transistor is always conducting).

Figure 1—A Class-A amplifier can be built around a simple transistor. The transistor must be biased in so it stays in the linear operating region (i.e., the transistor is always conducting).

either above or below this quiescent voltage depending on the input voltage polarity….

This solution’s advantages are numerous: simplicity, no need for a bipolar power supply, and excellent linearity as long as the output voltage doesn’t come too close to the power rails. This solution is considered as the perfect reference for audio applications. But there is a serious downside.

Because a continuous current flows through its collector, even without an input signal’s presence, this implies poor efficiency. In fact, a basic Class-A amplifier’s efficiency is barely more than 30%…

CLASS B
How can you improve an amplifier’s efficiency? You want to avoid a continuous current flowing in the output transistors as much as possible.

Class-B amplifiers use a pair of complementary transistors in a push-pull configuration (see Figure 2). The transistors are biased in such a way that one of the transistors conducts when the input signal is positive and the other conducts when it is negative. Both transistors never conduct at the same time, so there are very few losses. The current always goes to the load…

A Class-B amplifier has more improved efficiency compared to a Class-A amplifier. This is great, but there is a downside, right? The answer is unfortunately yes.
The downside is called crossover distortion…

Figure 2—Class-B amplifiers are usually built around a pair of complementary transistors (at left). Each transistor  conducts 50% of the time. This minimizes power losses, but at the expense of the crossover distortion at each zero crossing (at right).

Figure 2—Class-B amplifiers are usually built around a pair of complementary transistors (at left). Each transistor conducts 50% of the time. This minimizes power losses, but at the expense of the crossover distortion at each zero crossing.

CLASS AB
As its name indicates, Class-AB amplifiers are midway between Class A and Class B. Have a look at the Class-B schematic shown in Figure 2. If you slightly change the transistor’s biasing, it will enable a small current to continuously flow through the transistors when no input is present. This current is not as high as what’s needed for a Class-A amplifier. However, this current would ensure that there will be a small overall current, around zero crossing.

Only one transistor conducts when the input signal has a high enough voltage (positive or negative), but both will conduct around 0 V. Therefore, a Class-AB amplifier’s efficiency is better than a Class-A amplifier but worse than a Class-B amplifier. Moreover, a Class-AB amplifier’s linearity is better than a Class-B amplifier but not as good as a Class-A amplifier.

These characteristics make Class-AB amplifiers a good choice for most low-cost designs…

CLASS C
There isn’t any Class-C audio amplifier Why? This is because a Class-C amplifier is highly nonlinear. How can it be of any use?

An RF signal is composed of a high-frequency carrier with some modulation. The resulting signal is often quite narrow in terms of frequency range. Moreover, a large class of RF modulations doesn’t modify the carrier signal’s amplitude.

For example, with a frequency or a phase modulation, the carrier peak-to-peak voltage is always stable. In such a case, it is possible to use a nonlinear amplifier and a simple band-pass filter to recover the signal!

A Class-C amplifier can have good efficiency as there are no lossy resistors anywhere. It goes up to 60% or even 70%, which is good for high-frequency designs. Moreover, only one transistor is required, which is a key cost reduction when using expensive RF transistors. So there is a high probability that your garage door remote control is equipped with a Class-C RF amplifier.

CLASS D
Class D is currently the best solution for any low-cost, high-power, low-frequency amplifier—particularly for audio applications. Figure 5 shows its simple concept.
First, a PWM encoder is used to convert the input signal from analog to a one-bit digital format. This could be easily accomplished with a sawtooth generator and a voltage comparator as shown in Figure 3.

This section’s output is a digital signal with a duty cycle proportional to the input’s voltage. If the input signal comes from a digital source (e.g., a CD player, a digital radio, a computer audio board, etc.) then there is no need to use an analog signal anywhere. In that case, the PWM signal can be directly generated in the digital domain, avoiding any quality loss….

As you may have guessed, Class-D amplifiers aren’t free from difficulties. First, as for any sampling architecture, the PWM frequency must be significantly higher than the input signal’s highest frequency to avoid aliasing….The second concern with Class-D amplifiers is related to electromagnetic compatibility (EMC)…

Figure 3—A Class-D amplifier is a type of digital amplifier (at left). The comparator’s output is a PWM signal, which is amplified by a pair of low-loss digital switches. All the magic happens in the output filter (at right).

Figure 3—A Class-D amplifier is a type of digital amplifier. The comparator’s output is a PWM signal, which is amplified by a pair of low-loss digital switches. All the magic happens in the output filter.

CLASS E and F
Remember that Class C is devoted to RF amplifiers, using a transistor conducting only during a part of the signal period and a filter. Class E is an improvement to this scheme, enabling even greater efficiencies up to 80% to 90%. How?
Remember that with a Class-C amplifier, the losses only occur in the output transistor. This is because the other parts are capacitors and inductors, which theoretically do not dissipate any power.

Because power is voltage multiplied by current, the power dissipated in the transistor would be null if either the voltage or the current was null. This is what Class-E amplifiers try to do: ensure that the output transistor never has a simultaneously high voltage across its terminals and a high current going through it….

CLASS G AND CLASS H
Class G and Class H are quests for improved efficiency over the classic Class-AB amplifier. Both work on the power supply section. The idea is simple. For high-output power, a high-voltage power supply is needed. For low-power, this high voltage implies higher losses in the output stage.

What about reducing the supply voltage when the required output power is low enough? This scheme is clever, especially for audio applications. Most of the time, music requires only a couple of watts even if far more power is needed during the fortissimo. I agree this may not be the case for some teenagers’ music, but this is the concept.

Class G achieves this improvement by using more than one stable power rail, usually two. Figure 4 shows you the concept.

Figure 4—A Class-G amplifier uses two pairs of power supply rails. b—One supply rail is used when the output signal has a low power (blue). The other supply rail enters into action for high powers (red). Distortion could appear at the crossover.

Figure 4—A Class-G amplifier uses two pairs of power supply rails. b—One supply rail is used when the output signal has a low power (blue). The other supply rail enters into action for high powers (red). Distortion could appear at the crossover.

The Future of Nanotube Computing

For decades, silicon-based transistors have been the workhorse of the semiconductor industry, achieving remarkable advances in computational power. While advances continue to be made, alternative technologies are being explored to increase computational power and efficiency beyond the limits of silicon.

Carbon nanotubes (CNTs) are nanocylinders of carbon atoms, approximately 1 nm in diameter. They have amazing electrical, thermal, and physical properties. CNTs can be used to form CNT field-effect transistors (CNFETs), which use CNTs as the channel material of the transistor, with traditional lithographically defined sources, drains, and gates. It has been projected that digital systems made from carbon nanotubes can achieve more than an order of magnitude benefit in energy delay product (a common metric to compare a circuit’s performance and energy efficiency) compared to competing technologies.

However, it has been impracticable to realize these system-level benefits due to the inability to manufacture CNT-based circuits. This limitation stems from substantial imperfections inherent with the CNTs, including mispositioned and metallic CNTs. Mispositioned CNTs cause erroneous connections in a circuit, metallic (rather than semiconducting) CNTs decrease Ion/Ioff ratio, both potentially resulting in incorrect logic functionality and power wastage.

The trivial solution to these obstacles is to grow 100% perfectly aligned and semiconducting CNTs. However, this is currently infeasible, and likely never will be. Thus, to overcome these inherent imperfections, our Stanford University research team uses the imperfection-immune design paradigm. This paradigm combines processing solutions and design “tricks” to overcome these imperfections in the very-large-scale integration (VLSI) compatible manner.

Max Shulaker, a graduate student at Stanford University and author of this essay, holds a wafer filled with CNTs. (Photo: Norbert von der Groeben )

Max Shulaker, a graduate student at Stanford University and author of this essay, holds a wafer filled with CNTs. (Photo credit: Norbert von der Groeben )

We begin by growing the CNTs highly aligned. This is accomplished by growing the CNTs on a crystalline quartz substrate. The CNTs grow along the crystalline boundary of the quartz and result in highly aligned growths—99.5% alignment. However, for VLSI applications, there are millions or billions of transistors, resulting in billions of CNTs. Thus 99.5% is insufficient.

In addition, we employ mispositioned CNT immune design, which is a technique that renders the circuits that we make 100% immune to any mispositioned CNTs that would be left on the wafer. An important point is that the design is not dependent on the exact placement of the individual CNTs. It works for any arbitrary configuration of CNTs, and thus is manufacturable and scalable to very-large-scale circuits.

To remove metallic CNTs, we break them down, much like a fuse. We turn off all semiconducting CNTs in the circuit and pulse a large voltage across the transistors. Only the metallic CNTs conduct current, and by passing enough current, eventually heat up to

Max M. Shulaker, who holds a wafer filled with carbon nanotubes (CNTs), is a PhD candidate at Stanford University where he earned his BS in Electrical Engineering. He is part of a Stanford research team that recently built the first functioning computer using CNTs. Max works on experimentally demonstrating nanosystems with emerging technologies. His current research focuses on realizing increased levels of integration for CNT-based digital logic circuits. (Photo credit: Norbert von der Groeben)

Max M. Shulaker, who wrote this essay for Circuit Cellar, holds a wafer filled with carbon nanotubes (CNTs). Max is a PhD candidate at Stanford University where he earned his BS in Electrical Engineering. He is part of a Stanford research team that recently built the first functioning computer using CNTs. Max works on experimentally demonstrating nanosystems with emerging technologies. His current research focuses on realizing increased levels of integration for CNT-based digital logic circuits. (Photo credit: Norbert von der Groeben)

the point where they break down, much like a fuse. The trick is being able to perform this breakdown at a chip  scale. Computers today have billions of transistors. It would be infeasible to breakdown each transistor one by one. VLSI-compatible metallic CNT removal (VMR) is a design technique that enables the breakdown to be performed at an entire chip scale.

The imperfection-immune design paradigm, coupled with CNT-specific fabrication processing resulting in high-yield devices, permits, for the first time, the realization of larger-scale digital systems using this very promising technology. Most recently, a basic computer was fabricated at Stanford University completely using CNFETs. The CNT computer was composed of tens of thousands of CNTs, demonstrating the ability to manufacture CNT circuits in a scalable, and thus manufacturable, manner. The computer executes the subtract and branch if negative (SUBNEG) instruction, which is Turing complete, adding to the computer’s generality. As a demonstration, the CNT computer concurrently counted integers and sorted integers, continuously swapping between the two processes. To demonstrate the computer’s flexibility, it also emulated 20 different instructions from the commercial MIPS instruction set.

The CNT computer, culminating years of work by a team of researchers at Stanford University led by Professors Subhasish Mitra and Philip Wong, demonstrates that CNTs are a manufacturable and feasible technology. Beyond CNTs, it is a step forward for the broader field of emerging nanotechnologies. While many alternatives to silicon are being explored, the CNT computer represents an initial demonstration of one of these emerging technologies coming to fruition.

High-Speed Laser Range Finder Board with IMU

Integrated

The NavRanger-OEM

The NavRanger-OEM combines a 20,000 samples per second laser range finder with a nine-axis inertial measurement unit (IMU) on a single 3“ × 6“ (7.7 × 15.3 cm) circuit board. The board features I/O resources and processing capability for application-specific control solutions.

The NavRanger‘s laser range finder measures the time of flight of a short light pulse from an IR laser. The time to digital converter has a 65-ps resolution (i.e., approximately 1 cm). The Class 1M laser has a 10-ns pulse width, a 0.8 mW average power, and a 9° × 25° divergence without optics. The detector comprises an avalanche photo diode with a two-point variable-gain amplifier and variable threshold digitizer. These features enable a 10-cm × 10-cm piece of white paper to be detected at 30 m with a laser collimator and 25-mm receiver optics.

The range finder includes I/O to build a robot or scan a solution. The wide range 9-to-28-V input supply voltage enables operation in 12- and 24-V battery environments. The NavRanger‘s IMU is an InvenSense nine-axis MPU-9150, which combines an accelerometer, a gyroscope, and a magnetometer on one chip. A 32-bit Freescale ColdFire MCF52255 microcontroller provides the processing the power and additional I/O. USB and CAN buses provide the board’s high-speed interfaces. The board also has connectors and power to mount a Digi International XBee wireless module and a TTL GPS.

The board comes with embedded software and a client application that runs on a Windows PC or Mac OS X. It also includes modifiable source code for the embedded and client applications. The NavRanger-OEM costs $495.

Integrated Knowledge Systems, Inc.
www.iknowsystems.com

2.4-GHz RF High-Power Amplifier

Microchip

The SST12CP12 high-power amplifier

The SST12CP12 is a 2.4-GHz RF high-power amplifier that adds support for 256-QAM ultra-high data rate modulation. With its high linear output power, this amplifier significantly extends the range of IEEE 802.11b/g/n WLAN systems while providing excellent power at the maximum 256-QAM data rate. The amplifier is also spectrum-mask compliant up to 28.5 dBm for 802.11b/g communication and utilizes orthogonal frequency-division multiplexing (OFDM) to correct severe channel conditions without using complex equalization filters.

The SST12CP12 power amplifier has a 380mA at 23 dBm low operating current, which enables more transmission channels and a higher data rate for each system. The amplifier also features easy to use 50-Ω on-chip input match and simple output match. In addition, the integrated linear power detector provides temperature stability and immunity to voltage standing wave ratio (VSWR) radio-wave reflection to provide accurate output power control.

The SST12CP12 costs $0.97 each, in 10,000-unit quantities. It ships in a 3-mm × 3-mm × 0.55-mm, 16-pin QFN package.

Microchip Technology, Inc.
www.microchip.com

Brian Shewan Wins the CC Code Challenge (Week 27)

We have a winner of last week’s CC Weekly Code Challenge, sponsored by IAR Systems! We posted a code snippet with an error and challenged the engineering community to find the mistake!

Congratulations to Brian Shewan of Nova Scotia, Canadafor winning the CC Weekly Code Challenge for Week 27! Brian will receive Circuit Cellar 2011 and 2012 Archive CD.

Brian’s correct answer was randomly selected from the pool of responses that correctly identified an error in the code. Brian answered:

Line 22: Shift register won’t shift. Change to “ShiftReg_ClkB <= {ShiftReg_ClkB[1:0], clkA_Change}”

2013_code_challenge_27_answer

You can see the complete list of weekly winners and code challenges here.

What is the CC Weekly Code Challenge?
Each week, Circuit Cellar’s technical editors purposely insert an error in a snippet of code. It could be a semantic error, a syntax error, a design error, a spelling error, or another bug the editors slip in. You are challenged to find the error.Once the submission deadline passes, Circuit Cellar will randomly select one winner from the group of respondents who submit the correct answer.

Inspired? Want to try this week’s challenge? Get started!

Submission Deadline: The deadline for each week’s challenge is Sunday, 12 PM EST. Refer to the Rules, Terms & Conditions for information about eligibility and prizes.